AlGaInP light emitting diode epitaxial wafer, preparation method thereof and LED

Abstract

The invention relates to the technical field of photoelectricity, and discloses an AlGaInP light emitting diode epitaxial wafer and a preparation method thereof, and the method comprises the following steps: providing a GaAs substrate; sequentially depositing a buffer layer, a C-doped GaInP cut-off layer, a C-doped contact layer, a P-type window layer, a P-type transition layer, a P-type hole layer, a P-type hole barrier layer, an active layer, an N-type electron barrier layer, an N-type limiting layer, an N-type current expansion layer and an N-type coarsening layer on the GaAs substrate; evaporating a SiO2 bonding layer on the N-type coarsening layer, and then bonding the SiO2 bonding layer and the sapphire substrate; and the GaAs substrate is removed, so that the AlGaInP light emitting diode epitaxial wafer can be obtained. According to the preparation method of the AlGaInP light emitting diode epitaxial wafer, the current expansion effect can be improved, so that the thickness of a window layer is reduced, light absorption is reduced, and the light extraction efficiency is improved.

Description

Technical Field

[0001] The invention relates to the field of optoelectronic technology, and in particular to an AlGaInP light emitting diode epitaxial wafer and a preparation method thereof, and an LED. Background Art

[0002] The light-emitting layer of conventional GaAs-based AlGaInP light-emitting diodes is the GaP layer, which also plays an important role as an ohmic contact layer and current expansion. However, the low-resistance, high-transmittance GaP window layer requires high temperature preparation, and its current expansion effect is not good. Most importantly, the thickness of the GaP window layer is too thick, which will lead to light absorption problems and affect the brightness of the light. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a method for preparing an AlGaInP light-emitting diode epitaxial wafer, which can increase the current spreading effect, thereby thinning the window layer thickness, reducing light absorption, and improving light extraction efficiency.

[0004] The technical problem to be solved by the present invention is to provide an AlGaInP light emitting diode epitaxial wafer, which has a simple process and can stably produce the AlGaInP light emitting diode epitaxial wafer with good luminous efficiency.

[0005] In order to solve the above technical problems, the present invention provides a method for preparing an AlGaInP light-emitting diode epitaxial wafer, comprising the following steps:

[0006] Providing a GaAs substrate;

[0007] Depositing a buffer layer, a C-doped GaInP cutoff layer, a C-doped contact layer, a P-type window layer, a P-type transition layer, a P-type hole layer, a P-type hole blocking layer, an active layer, an N-type electron blocking layer, an N-type limiting layer, an N-type current spreading layer, and an N-type roughening layer in sequence on the GaAs substrate;

[0008] Vapor-depositing a SiO2 bonding layer on the N-type roughened layer, and then bonding the SiO2 bonding layer to a sapphire substrate;

[0009] The GaAs substrate is removed to obtain the AlGaInP light emitting diode epitaxial wafer.

[0010] In some embodiments, the growth temperature of the buffer layer and the C-doped GaInP cut-off layer are both 300° C. to 800° C.;

[0011] The growth temperatures of the C-doped contact layer, P-type window layer, P-type transition layer, P-type hole layer, P-type hole blocking layer, active layer, N-type electron blocking layer, N-type limiting layer, N-type current spreading layer and N-type roughening layer are all 650°C to 800°C.

[0012] In some embodiments, the buffer layer is a GaAs buffer layer, and the thickness of the GaAs buffer layer is 0.2 μm to 0.5 μm;

[0013] The thickness of the C-doped GaInP cut-off layer is 0.1 μm to 0.8 μm;

[0014] The active layer is an AlGaInP active layer, and the thickness of the AlGaInP active layer is 0.1 μm to 0.8 μm;

[0015] The C-doped contact layer is a C-doped GaP contact layer;

[0016] The thickness of the C-doped GaP contact layer is 0.02 μm to 0.1 μm;

[0017] The carbon doping concentration of the C-doped GaP contact layer is 1×10 20 atoms / cm 3 ~1×10 22 atoms / cm 3 .

[0018] In some embodiments, the P-type window layer is a P-type GaP window layer, and the thickness of the P-type GaP window layer is 1 μm to 5 μm;

[0019] The P-type transition layer is a P-type GaInP transition layer, and the thickness of the P-type GaInP transition layer is 0.01 μm to 0.08 μm;

[0020] The P-type hole layer is a P-type AlInP hole layer, and the thickness of the P-type AlInP hole layer is 0.1 μm to 0.8 μm;

[0021] The P-type hole blocking layer is a P-type AlGaInP hole blocking layer, and the thickness of the AlGaInP hole blocking layer is 0.02 μm to 0.2 μm;

[0022] In some embodiments, the Mg doping concentration of the P-type GaP window layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0023] The Mg doping concentration of the P-type GaInP transition layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0024] The Mg doping concentration of the P-type AlInP vacancy layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0025] The Mg doping concentration of the AlGaInP hole blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0026] In some embodiments, the N-type electron blocking layer is an N-type AlGaInP electron blocking layer, and the thickness of the N-type AlGaInP electron blocking layer is 0.02 μm to 0.2 μm;

[0027] The N-type restriction layer is an N-type AlInP restriction layer, and the thickness of the N-type AlInP restriction layer is 0.1 μm to 0.8 μm;

[0028] The N-type current spreading layer is an N-type AlGaInP current spreading layer, and the thickness of the N-type AlGaInP current spreading layer is 0.1 μm to 0.5 μm;

[0029] The N-type roughened layer is an N-type GaAs roughened layer, and the thickness of the N-type GaAs roughened layer is 0.02 μm to 0.2 μm.

[0030] In some embodiments, the Si doping concentration of the N-type AlGaInP electron blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0031] The Si doping concentration of the N-type AlInP confinement layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0032] The Si doping concentration of the N-type AlGaInP current spreading layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0033] The Si doping concentration of the N-type GaAs roughened layer is 1×10 17atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0034] In some embodiments, the step of evaporating a SiO2 bonding layer on the N-type roughened layer and then bonding the SiO2 bonding layer to the sapphire substrate comprises:

[0035] Vapor depositing a first SiO2 bonding layer on the N-type roughened layer;

[0036] A sapphire substrate on which a second SiO2 bonding layer is evaporated is bonded to the first SiO2 bonding layer;

[0037] The temperature during bonding is 300°C to 500°C, and the pressure is 0.1 MPa to 0.4 MPa.

[0038] In some embodiments, removing the GaAs substrate includes:

[0039] The GaAs substrate and the buffer layer are removed by etching part of the C-doped GaInP cut-off layer with a hydrochloric acid etching solution, thereby realizing the stripping of the GaAs substrate.

[0040] In order to solve the above problems, the present invention further provides an AlGaInP light emitting diode epitaxial wafer, wherein the AlGaInP light emitting diode epitaxial wafer is prepared by the preparation method of the AlGaInP light emitting diode epitaxial wafer described above.

[0041] In some embodiments, the AlGaInP light-emitting diode epitaxial wafer includes a sapphire substrate, on which are arranged, from bottom to top, a SiO2 bonding layer, an N-type roughening layer, an N-type current spreading layer, an N-type limiting layer, an N-type electron blocking layer, an active layer, a P-type hole blocking layer, a P-type hole layer, a P-type transition layer, a P-type window layer, a C-doped contact layer, and a C-doped GaInP cutoff layer.

[0042] Furthermore, the present invention further provides an AlGaInP light-emitting diode chip, which includes the AlGaInP light-emitting diode epitaxial wafer.

[0043] The implementation of the present invention has the following beneficial effects:

[0044] In the preparation method of the AlGaInP light-emitting diode epitaxial wafer provided by the present invention, the growth order of the epitaxial wafer is changed, the P-type layer is grown before the active layer is grown, and the N-type layer is grown after the active layer is grown, and the structures of the N-type layer and the P-type layer are adjusted, so that after the P-type layer, which was originally at the bottom and the holes need to migrate laterally, is adjusted to the top, the holes in the P-type layer are changed from lateral migration to longitudinal migration, which can effectively reduce the hole migration distance; and the electron conduction direction is changed, so that the original lateral conduction of holes is changed to lateral conduction of electrons. Since the electron migration efficiency is much higher than that of holes, the current expansion effect can be effectively increased, thereby reducing the thickness of the P-type GaP window layer, reducing light absorption, reducing the cost and difficulty of epitaxial growth, and improving the light extraction efficiency of the light-emitting diode, thereby improving the benefits. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A flow chart of a method for preparing an AlGaInP light-emitting diode epitaxial wafer provided by the present invention;

[0046] Figure 2 This is a schematic structural diagram of the AlGaInP light emitting diode chip provided by the present invention. DETAILED DESCRIPTION

[0047] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. In addition, it should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0048] In the description of the present invention, it is necessary to understand that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0049] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0050] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0051] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0052] The disclosure below provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the examples of various specific processes and materials provided by the present invention, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0053] In the present invention, "preferred" and "better" are only used to describe implementation methods or embodiments with better effects, and it should be understood that they do not constitute a limitation on the scope of protection of the present invention. In the present invention, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features. In the present invention, when involving numerical ranges, unless otherwise specified, the two endpoints of the numerical range are included.

[0054] To solve the above problems, Figure 1 As shown, the present invention provides a method for preparing an AlGaInP light-emitting diode epitaxial wafer, comprising the following steps:

[0055] S1. Provide a GaAs substrate;

[0056] A GaAs substrate is used as the growth substrate for the epitaxial layer. The substrate has a mature and stable preparation process and has a high cost-performance ratio.

[0057] S2. A buffer layer, a C-doped GaInP cutoff layer 13, a C-doped contact layer 12, a P-type window layer 11, a P-type transition layer 10, a P-type hole layer 9, a P-type hole blocking layer 8, an active layer 7, an N-type electron blocking layer 6, an N-type confinement layer 5, an N-type current spreading layer 4, and an N-type roughening layer 3 are sequentially deposited on the GaAs substrate.

[0058] In some embodiments, the method specifically includes the following steps:

[0059] S201, depositing a buffer layer on a gallium arsenide substrate;

[0060] In some embodiments, the growth temperature of the buffer layer is 300°C to 800°C; the buffer layer is a GaAs buffer layer, and the thickness of the GaAs buffer layer is 0.2μm to 0.5μm. The buffer layer is a GaAs buffer layer, which is consistent with the substrate material. The GaAs buffer layer can effectively improve the lattice defects caused by lattice mismatch and thermal mismatch between the subsequently grown epitaxial layer and the substrate.

[0061] S202, depositing a C-doped GaInP cut-off layer on the buffer layer;

[0062] In some embodiments, the growth temperature of the C-doped GaInP cut-off layer is 300° C. to 800° C.; the thickness of the C-doped GaInP cut-off layer is 0.1 μm to 0.8 μm; and the carbon doping concentration of the C-doped GaInP cut-off layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 The C-doped GaInP cut-off layer is used to control the flow of current and prevent the current from leaking in an unwanted direction.

[0063] S203, depositing a C-doped contact layer on the C-doped GaInP cutoff layer;

[0064] In some embodiments, the C-doped contact layer is a C-doped GaP contact layer; the thickness of the C-doped GaP contact layer is 0.02 μm to 0.1 μm; the carbon doping concentration of the C-doped GaP contact layer is 1×10 20 atoms / cm 3 ~1×10 22 atoms / cm 3 .

[0065] S204, depositing a P-type window layer on the C-doped contact layer;

[0066] In some embodiments, the P-type window layer is a P-type GaP window layer, the thickness of the P-type GaP window layer is 1 μm to 5 μm, and the Mg doping concentration of the P-type GaP window layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0067] As a semiconductor material, GaP has a conductive property that is affected by its band structure. In P-type GaP, holes are the dominant conductive carriers. Compared with electrons, holes usually have a lower mobility, resulting in a weaker current diffusion capacity of P-type GaP. This causes the current to be more likely to concentrate in certain areas of the chip rather than to be evenly distributed, resulting in the luminous efficiency and uniformity of the light-emitting diode chip being limited. In order to improve the current expansion capacity of the P-type GaP window layer of the light-emitting diode chip, a very thick P-type GaP window layer (>8um) is usually grown, which greatly increases the cost and difficulty of epitaxial growth. The thicker thickness also makes the P-type GaP window layer absorb light more strongly, further reducing the light extraction efficiency of the light-emitting diode. The present invention changes the epitaxial growth structure, adjusts the growth order of the N-type layer and the P-type layer, changes the electron-hole conduction direction, and makes the holes that were originally transversely conducted become electrons for transverse conduction. Since the electron migration efficiency is much higher than that of the hole, the current expansion effect can be effectively increased, thereby reducing the thickness of the window layer, reducing light absorption, and improving the light extraction efficiency and benefits.

[0068] S205, depositing a P-type transition layer on the P-type window layer;

[0069] In some embodiments, the P-type transition layer is a P-type GaInP transition layer, the thickness of the P-type GaInP transition layer is 0.01 μm to 0.08 μm; the Mg doping concentration of the P-type GaInP transition layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0070] S206, depositing a P-type hole layer on the P-type transition layer;

[0071] In some embodiments, the P-type hole layer is a P-type AlInP hole layer, the thickness of the P-type AlInP hole layer is 0.1 μm to 0.8 μm; the Mg doping concentration of the P-type AlInP hole layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0072] S207, depositing a P-type hole blocking layer on the P-type hole layer;

[0073] In some embodiments, the P-type hole blocking layer is a P-type AlGaInP hole blocking layer, the thickness of the AlGaInP hole blocking layer is 0.02 μm to 0.2 μm; the Mg doping concentration of the AlGaInP hole blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0074] S208, depositing an active layer on the P-type hole blocking layer;

[0075] In some embodiments, the active layer is an AlGaInP active layer, and the thickness of the AlGaInP active layer is 0.1 μm to 0.8 μm.

[0076] S209, depositing an N-type electron blocking layer on the active layer;

[0077] In some embodiments, the N-type electron blocking layer is an N-type AlGaInP electron blocking layer, the thickness of the N-type AlGaInP electron blocking layer is 0.02 μm to 0.2 μm; the Si doping concentration of the N-type AlGaInP electron blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0078] S210, depositing an N-type confinement layer on the N-type electron blocking layer;

[0079] In some embodiments, the N-type confinement layer is an N-type AlInP confinement layer, the thickness of the N-type AlInP confinement layer is 0.1 μm to 0.8 μm; the Si doping concentration of the N-type AlInP confinement layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0080] S211, depositing an N-type current spreading layer on the N-type limiting layer;

[0081] In some embodiments, the N-type current spreading layer is an N-type AlGaInP current spreading layer, the thickness of the N-type AlGaInP current spreading layer is 0.1 μm to 0.5 μm; the Si doping concentration of the N-type AlGaInP current spreading layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ;

[0082] S212, depositing an N-type roughening layer on the N-type current spreading layer.

[0083] In some embodiments, the N-type roughened layer is an N-type GaAs roughened layer, the thickness of the N-type GaAs roughened layer is 0.02 μm to 0.2 μm, and the Si doping concentration of the N-type GaAs roughened layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

[0084] The roughening method of the N-type contact layer can use wet etching and dry etching. In some embodiments, the roughening method of the N-type contact layer is wet etching. The specific process is to infiltrate the N-type GaAs layer in the light-emitting diode epitaxial wafer into the etching solution to roughen the surface of the exposed N-type GaAs layer, wherein the etching solution can be any one of hydrochloric acid solution, phosphoric acid solution, hydrofluoric acid solution, sulfuric acid solution, and hydrogen peroxide or a combination thereof. Preferably, the etching solution can be composed of hydrochloric acid solution, phosphoric acid solution, sulfuric acid solution, and hydrogen peroxide. More preferably, the solvent of the hydrochloric acid solution is water, and the mass fraction of the salt solution is 35%, the solvent of the phosphoric acid solution is water, and the mass fraction of the phosphoric acid solution is 30%, the solvent of the sulfuric acid solution is water, and the mass fraction of the sulfuric acid solution is 60%, and the mass fraction of the hydrogen peroxide is 70%, and the volume ratio of the hydrochloric acid solution volume: the phosphoric acid solution volume: the sulfuric acid solution volume: the hydrogen peroxide volume ratio is 15:35:15:35 in the etching solution.

[0085] The P-type GaAs layer is wet-etched using this etching solution to form a bowl-shaped etching hole morphology on the surface of the P-type GaAs layer, thereby improving the light output efficiency and performance of the light-emitting diode chip, and at the same current, the axial light intensity of the light-emitting diode will be significantly improved.

[0086] In some embodiments, the growth temperatures of the C-doped contact layer, P-type window layer, P-type transition layer, P-type hole layer, P-type hole blocking layer, active layer, N-type electron blocking layer, N-type confinement layer, N-type current spreading layer and N-type roughening layer are all 650°C to 800°C.

[0087] S3, evaporating a SiO2 bonding layer 2 on the N-type roughened layer 3, and then bonding the SiO2 bonding layer 2 and the sapphire substrate 1;

[0088] In some embodiments, the steps include:

[0089] Vapor depositing a first SiO2 bonding layer on the N-type roughened layer;

[0090] A sapphire substrate on which a second SiO2 bonding layer is evaporated is bonded to the first SiO2 bonding layer;

[0091] The temperature during bonding is 300°C to 500°C, and the pressure is 0.1 MPa to 0.4 MPa.

[0092] Preferably, the epitaxial wafer is placed on the sample stage of the evaporation chamber, a SiO2 evaporated layer with a thickness of 1.5μm to 4μm is evaporated, and the evaporated SiO2 layer is polished by physical grinding and polishing so that the thickness of the SiO2 evaporated layer after polishing is 1μm to 3μm, and then a sapphire substrate with the same polished SiO2 evaporated layer evaporated is bonded to the SiO2 evaporated layer.

[0093] S4, removing the GaAs substrate to obtain the AlGaInP light emitting diode epitaxial wafer.

[0094] In some embodiments, the steps include:

[0095] The GaAs substrate and the buffer layer are removed by etching part of the C-doped GaInP cut-off layer with a hydrochloric acid etching solution, thereby realizing the stripping of the GaAs substrate.

[0096] Preferably, one side of the C-doped GaInP cutoff layer in the light-emitting diode epitaxial wafer is placed in an etching solution, which may be a hydrochloric acid solution, and the ratio of hydrochloric acid to water in the hydrochloric acid solution may be 3:1. After the GaInP cutoff layer is etched, the light-emitting diode epitaxial wafer from which the GaAs substrate has been stripped is removed. Acetone, isopropanol, and deionized water are used to clean in sequence to remove residual etching solution and impurities, and then drying is performed.

[0097] As described above, in the preparation method of the AlGaInP light-emitting diode epitaxial wafer, the growth order of the epitaxial wafer is changed, the P-type layer is grown before the active layer, and the N-type layer is grown after the active layer is grown. The structures of the N-type layer and the P-type layer are adjusted so that the P-type layer, which was originally at the bottom and the holes need to migrate laterally, is adjusted to the top, and the holes in the P-type layer are changed from lateral migration to longitudinal migration, which can effectively reduce the hole migration distance; and the electron conduction direction is changed so that the original lateral conduction of holes is changed to lateral conduction of electrons. Since the electron migration efficiency is much higher than that of holes, the current expansion effect can be effectively increased, thereby reducing the thickness of the P-type GaP window layer, reducing light absorption, reducing the cost and difficulty of epitaxial growth, and improving the light extraction efficiency of the light-emitting diode, thereby improving the benefits.

[0098] Correspondingly, the present invention further provides an AlGaInP light emitting diode epitaxial wafer, and the AlGaInP light emitting diode epitaxial wafer is prepared by the preparation method of the AlGaInP light emitting diode epitaxial wafer described above.

[0099] In some embodiments, the AlGaInP light-emitting diode epitaxial wafer includes a sapphire substrate, on which are arranged, from bottom to top, a SiO2 bonding layer, an N-type roughening layer, an N-type current spreading layer, an N-type limiting layer, an N-type electron blocking layer, an active layer, a P-type hole blocking layer, a P-type hole layer, a P-type transition layer, a P-type window layer, a C-doped contact layer, and a C-doped GaInP cutoff layer.

[0100] Furthermore, the present invention also provides an AlGaInP light emitting diode chip, such as Figure 2 As shown, it includes the AlGaInP light emitting diode epitaxial wafer, a P-type electrode and an N-type electrode.

[0101] The P-type electrode and the N-type electrode are prepared by the following method:

[0102] Photoresist is coated on the surface of the GaAs contact layer, and the required electrode area is obtained by exposure and development. The photoresist is stripped off and washed with acetone, isopropyl alcohol and deionized water in sequence. After drying, the epitaxial wafer after removing the GaAs substrate is etched by ICP to expose the N-type spreading layer platform on which the N electrode can be evaporated. The N electrode is evaporated on the N-type current spreading layer by electron beam evaporation, and the P electrode is evaporated on the P-type GaP window layer.

[0103] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0104] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A method for preparing an AlGaInP light-emitting diode epitaxial wafer, characterized in that: The following steps are involved: Providing a GaAs substrate; Depositing a buffer layer, a C-doped GaInP cutoff layer, a C-doped contact layer, a P-type window layer, a P-type transition layer, a P-type hole layer, a P-type hole blocking layer, an active layer, an N-type electron blocking layer, an N-type limiting layer, an N-type current spreading layer, and an N-type roughening layer in sequence on the GaAs substrate; Vapor-depositing a SiO2 bonding layer on the N-type roughened layer, and then bonding the SiO2 bonding layer to a sapphire substrate; The GaAs substrate is removed to obtain the AlGaInP light emitting diode epitaxial wafer.

2. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The growth temperature of the buffer layer and the C-doped GaInP cut-off layer are both 300° C. to 800° C.; The growth temperatures of the C-doped contact layer, P-type window layer, P-type transition layer, P-type hole layer, P-type hole blocking layer, active layer, N-type electron blocking layer, N-type limiting layer, N-type current spreading layer and N-type roughening layer are all 650°C to 800°C.

3. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The buffer layer is a GaAs buffer layer, and the thickness of the GaAs buffer layer is 0.2 μm to 0.5 μm; The thickness of the C-doped GaInP cut-off layer is 0.1 μm to 0.8 μm; The active layer is an AlGaInP active layer, and the thickness of the AlGaInP active layer is 0.1 μm to 0.8 μm; The C-doped contact layer is a C-doped GaP contact layer; The thickness of the C-doped GaP contact layer is 0.02 μm to 0.1 μm; The carbon doping concentration of the C-doped GaP contact layer is 1×10 20 atoms / cm 3 ~1×10 22 atoms / cm 3 .

4. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The P-type window layer is a P-type GaP window layer, and the thickness of the P-type GaP window layer is 1 μm to 5 μm; The P-type transition layer is a P-type GaInP transition layer, and the thickness of the P-type GaInP transition layer is 0.01 μm to 0.08 μm; The P-type hole layer is a P-type AlInP hole layer, and the thickness of the P-type AlInP hole layer is 0.1 μm to 0.8 μm; The P-type hole blocking layer is a P-type AlGaInP hole blocking layer, and the thickness of the AlGaInP hole blocking layer is 0.02 μm to 0.2 μm.

5. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 4, characterized in that: The Mg doping concentration of the P-type GaP window layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Mg doping concentration of the P-type GaInP transition layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Mg doping concentration of the P-type AlInP vacancy layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Mg doping concentration of the AlGaInP hole blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

6. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The N-type electron blocking layer is an N-type AlGaInP electron blocking layer, and the thickness of the N-type AlGaInP electron blocking layer is 0.02 μm to 0.2 μm; The N-type restriction layer is an N-type AlInP restriction layer, and the thickness of the N-type AlInP restriction layer is 0.1 μm to 0.8 μm; The N-type current spreading layer is an N-type AlGaInP current spreading layer, and the thickness of the N-type AlGaInP current spreading layer is 0.1 μm to 0.5 μm; The N-type roughened layer is an N-type GaAs roughened layer, and the thickness of the N-type GaAs roughened layer is 0.02 μm to 0.2 μm.

7. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 6, characterized in that: The Si doping concentration of the N-type AlGaInP electron blocking layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Si doping concentration of the N-type AlInP confinement layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Si doping concentration of the N-type AlGaInP current spreading layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 ; The Si doping concentration of the N-type GaAs roughened layer is 1×10 17 atoms / cm 3 ~5×10 18 atoms / cm 3 .

8. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The method of evaporating a SiO2 bonding layer on the N-type roughened layer and then bonding the SiO2 bonding layer to the sapphire substrate comprises: Vapor depositing a first SiO2 bonding layer on the N-type roughened layer; A sapphire substrate on which a second SiO2 bonding layer is evaporated is bonded to the first SiO2 bonding layer; The temperature during bonding is 300°C to 500°C, and the pressure is 0.1 MPa to 0.4 MPa.

9. The method for preparing an AlGaInP light emitting diode epitaxial wafer according to claim 1, characterized in that: The removing of the GaAs substrate comprises: The GaAs substrate and the buffer layer are removed by etching part of the C-doped GaInP cut-off layer with a hydrochloric acid etching solution, thereby realizing the stripping of the GaAs substrate.

10. An AlGaInP light emitting diode epitaxial wafer, characterized in that: The AlGaInP light emitting diode epitaxial wafer is prepared by the preparation method of the AlGaInP light emitting diode epitaxial wafer according to any one of claims 1 to 9.

11. The AlGaInP light emitting diode epitaxial wafer according to claim 10, characterized in that: The AlGaInP light-emitting diode epitaxial wafer comprises a sapphire substrate, on which a SiO2 bonding layer, an N-type roughening layer, an N-type current spreading layer, an N-type limiting layer, an N-type electron blocking layer, an active layer, a P-type hole blocking layer, a P-type hole layer, a P-type transition layer, a P-type window layer, a C-doped contact layer, and a C-doped GaInP cutoff layer are arranged in sequence from bottom to top.

12. An AlGaInP light emitting diode chip, characterized in that: It comprises the AlGaInP light emitting diode epitaxial wafer as claimed in claim 10 or 11.

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