Module test system of high-stability power semiconductor chip

Abstract

The invention discloses a module test system for a high-stability power semiconductor chip, and relates to the technical field of chip testing, the module test system comprises a packaging detection end, a module test end and a failure judgment end, the packaging detection end is used for carrying out region division on the surface of the packaged semiconductor chip and monitoring the divided corresponding regions in real time, and the module test end is used for testing the failure of the semiconductor chip; the module test end is used for applying feedback to signal parameters generated by the test machine and then comparing a measured value formed by test vectors in real time with a programming value in real time, and the failure judgment end is used for judging whether a semiconductor chip fails or not by detecting the measured value in real time, so that the failure of the semiconductor chip is judged. And the accuracy of failure adjustment of the semiconductor chip is ensured. The module test system of the high-stability power semiconductor chip can monitor the packaging state of the semiconductor chip in real time, improve the packaging reliability of the semiconductor chip, find out failure reasons in time and carry out corresponding adjustment, and improve the module test effect of the semiconductor chip.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular to a module testing system for a high-stability power semiconductor chip. Background Art

[0002] Module testing of semiconductor chips is a process of detecting the performance and functions of each module of the chip. The purpose is to verify whether the chip meets the design goals and ensure its quality. This test is crucial in chip design and production. It can not only detect potential defects, but also improve the yield of the final product.

[0003] Patent No. CN201811229687.0 discloses a test method, device and system for a semiconductor chip, the test method for the semiconductor chip comprising: generating target test data; writing the target test data into a target address of the semiconductor chip; reading target storage data of the target address; judging whether an error occurs at the target address and the number of bits where the error occurs based on the target test data and the target storage data; if an error occurs at the target address and the number of bits where the error occurs exceeds a first preset bit, judging that the target test item test of the target address fails; wherein the first preset bit is a positive integer greater than or equal to 1; the semiconductor chip or the controller of the semiconductor chip comprises an error correction circuit, the error correction circuit being used to correct the error bit of the first preset bit of the target address of the semiconductor chip.

[0004] After searching the above patents, it was found that the module test of semiconductor chips has the following deficiencies: 1. After the semiconductor chip is packaged, there will be poor bonding wire connections or abnormal changes in electrical performance caused by packaging, and the semiconductor chip packaging status cannot be monitored in real time, affecting the reliability of semiconductor chip packaging; 2. The signal generated by the module test of the semiconductor chip by the tester is applied and fed back to form a test mode or vector. The measured output value cannot be compared with the programmed value in real time to timely judge the quality of the semiconductor chip; 3. After judging the quality of the semiconductor chip, it is impossible to analyze the results in detail in time to find out the cause of the failure and make corresponding adjustments, which affects the module test effect of the semiconductor chip.

[0005] Therefore, a module testing system for high-stability power semiconductor chips is proposed to solve the above problems. Summary of the invention

[0006] The main purpose of the present invention is to provide a module testing system for high-stability power semiconductor chips to solve the problems raised in the above background.

[0007] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a module test system for a high-stability power semiconductor chip, comprising a packaging detection end, a module test end and a failure judgment end; The packaging detection end is used to divide the surface of the packaged semiconductor chip into regions and monitor the corresponding divided regions in real time to achieve a coordinated monitoring effect of multiple regions, and to capture the connection status of the bonding wires in real time to identify whether the bonding wire connections are abnormal, connect the semiconductor chips, and detect the sealing of the semiconductor chip packaging in real time, and issue a warning signal in real time; The module test end is used to apply feedback to the signal parameters generated by the test machine to form a test mode or test vector, apply the test vector to the DUT, compare the measured value formed by the test vector in real time with the programmed value in real time, judge whether the semiconductor chip is good or bad, and track the measured value in real time; The failure judgment end is used to judge whether the semiconductor chip has failed by real-time detection of the measurement value. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. According to the analysis result, the measurement value of the semiconductor chip with the abnormal failure is adjusted in real time, and real-time tracking is performed after adjustment to ensure the accuracy of the semiconductor chip failure adjustment.

[0008] The package detection end includes a region monitoring module, a bonding identification module and a connection tracking module; The regional monitoring module includes a regional division unit, a regional monitoring unit and a monitoring coordination unit; The region division unit is used to divide the semiconductor chip into a plurality of regions by image capture; The regional monitoring unit is used to monitor the outer surface of the semiconductor chip in multiple regions in real time through sensors and monitoring equipment; The monitoring coordination unit is used to realize multi-region data coordination on the outer surface of a semiconductor chip in multiple regions through data sensors and signal receivers.

[0009] The bonding recognition module includes a bonding capture unit and a capture recognition unit; The bonding capture unit is used to capture bonding wire connection details through a monitoring device; The capture and identification unit is used to convert the bonding wire connection details captured by the monitoring device into a bonding wire connection picture, and identify whether the bonding angle of the bonding wire connection is abnormal. The identification method is as follows: Step 1: Set the standard path of the bonding wire, set the standard path of the bonding wire as the center point, and calculate the bonding angle of the bonding wire connection at the current moment. The formula is as follows: in, is the angle between the bonding point and the positive direction of the X-axis, is the angle between the bonding point and the positive direction of the Y axis, A is the height of the bonding line, is the vector of the bonding point in the X-axis direction, is the vector of the bonding point in the Y-axis direction; Step 2: Calculate the bond angle shift Compared with the bonding distance, the standard bonding values ​​are set as O and M. as well as , then it is judged that the angle of the bonding wire connection is abnormal, if not, then it is judged that the angle of the bonding wire connection is normal.

[0010] The connection tracking module includes a connection conduction unit, a packaging and sealing unit, and a real-time warning unit; The connection unit is used to form tiny solder balls on the semiconductor chip pads and then directly connect the semiconductor chip face down to the substrate to achieve connection and conduction; The packaging sealing unit is used to monitor the semiconductor chip packaging sealing parameters in real time through an airtightness detector; The real-time warning unit is used to subtract the detected semiconductor chip package airtightness parameter from the standard airtightness parameter. If the difference is ≥1, it indicates that the semiconductor chip package airtightness is poor; if the difference is <1, it indicates that the semiconductor chip package airtightness is normal.

[0011] The module test end includes a test vector module, a measurement tracking module and a programming comparison module; The test vector module includes a test mode unit and a test vector unit; The test mode unit is used to generate signal parameters of various semiconductor chips through a test machine; The test vector unit is used to automatically form test modes and test vectors from the signal parameters of various semiconductor chips through a data processor.

[0012] The measurement and tracking module includes a vector output unit and a vector tracking unit; The vector output unit is used to transmit the test vector through the data processor; The vector tracking unit is used to track the transmitted test vector in real time through a data tracker.

[0013] The programming comparison module includes a programming comparison unit and a programming early warning unit; The programming comparison unit is used to set standard test programming values; The programming warning unit is used to compare the test vector tracked in real time with the programming value to determine whether the chip is good or bad. The determination steps are as follows: Step I: Calculate the relative deviation between the test vector tracked at the current moment and the programmed value. The calculation formula is as follows: in, Indicates the actual value of the test vector tracked at the current moment, Indicates the expected value of the programmed value at the current moment, Indicates the relative deviation between the test vector tracked at the current moment and the programmed value; Step II: If the relative deviation between the measurement vector tracked at the current moment and the programmed value = 0, the semiconductor chip is judged to be normal. If the difference ≠ 0, the semiconductor chip is judged to be abnormal.

[0014] The failure judgment end includes a failure detection module, a failure judgment module and a failure adjustment module; The failure detection module is used to detect failure anomalies of semiconductor chips in real time through a transmission electron microscope and a failure detection device.

[0015] The failure judgment module includes a failure judgment unit and a failure increase and decrease unit; The failure judgment unit is used to judge the failure fault by real-time monitoring of the semiconductor chip parameters, and the failure fault includes one or more of the manufacturing process of the semiconductor chip, insufficient electrostatic discharge protection, magnetic field influence and switching power supply problem; The failure increase and decrease unit is used to update the failure judgment and the judgment result in real time according to the timer, and to update the failure cause and failure fault of the semiconductor chip in real time.

[0016] The failure adjustment module includes a failure adjustment unit and an adjustment tracking unit; The failure adjustment unit is used to set a reasonable test range for each parameter of the semiconductor chip, each parameter including one of voltage, current, signal timing, frequency, power consumption, threshold voltage and maximum output current, determine the failure cause according to the parameter abnormality, and automatically adjust the parameter; The adjustment tracking unit is used to track the adjustment results of the failure parameters in real time through a data tracker, and calculate the difference between the parameters before and after the adjustment. If the difference = 0, it is judged that the adjustment of the failure parameters is effective. If the difference ≠ 0, it is judged that the adjustment of the failure parameters is invalid, and the system is reported, a voice alarm is issued, and feedback is provided for manual processing.

[0017] The present invention has the following beneficial effects: 1. In the present invention, by setting a packaging detection terminal, after the semiconductor chip is packaged, the surface of the packaged semiconductor chip is divided into areas, and the corresponding divided areas are monitored in real time, and the coordinated monitoring effect of multiple areas is achieved, so that it is possible to identify in real time whether the bonding wire connection is abnormal, connect the semiconductor chip, and detect the sealing of the semiconductor chip package in real time, so that after the semiconductor chip is packaged, the poor bonding wire connection or the abnormality of the electrical performance change caused by the packaging can be monitored in time, the semiconductor chip packaging state can be monitored in real time, and the reliability of the semiconductor chip packaging can be improved.

[0018] 2. In the present invention, by setting a module test terminal, when performing module testing on a semiconductor chip, the quality of the semiconductor chip is judged by comparing the measured value composed of the test vector in real time with the programmed value in real time, so that the measured output value can be compared with the programmed value in real time to judge the quality of the semiconductor chip in time.

[0019] 3. In the present invention, by setting a failure judgment terminal, when performing module testing on a semiconductor chip, it is determined whether the semiconductor chip has failed by detecting the measurement value in real time. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. After judging whether the semiconductor chip is good or bad, the result can be analyzed in detail in time, and according to the analysis result, the measurement value of the semiconductor chip with abnormal failure is adjusted in real time, the cause of the failure is promptly found out and corresponding adjustment is made, thereby improving the module testing effect of the semiconductor chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a schematic diagram of the overall system architecture of a module testing system for a high-stability power semiconductor chip according to the present invention; Figure 2 It is a schematic diagram of the structure of a packaging detection end of a module testing system for a high-stability power semiconductor chip of the present invention; Figure 3 It is a schematic diagram of the structure of a module test end of a module test system for a high-stability power semiconductor chip according to the present invention; Figure 4 The present invention is a schematic diagram of the architecture of a failure judgment end of a module testing system for a high-stability power semiconductor chip. DETAILED DESCRIPTION

[0021] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further explained below in conjunction with specific implementation methods.

[0022] Example 1, please refer to Figure 1-2 As shown: A module test system for a high-stability power semiconductor chip, comprising a packaging detection end, a module test end and a failure judgment end; The packaging detection end is used to divide the surface of the packaged semiconductor chip into areas and monitor the corresponding areas in real time to achieve the coordinated monitoring effect of multiple areas. It also captures the connection status of the bonding wires in real time to identify whether the bonding wire connections are abnormal, connect the semiconductor chips, and detect the sealing of the semiconductor chip packaging in real time, and issue early warning signals in real time. The module test end is used to apply feedback to the signal parameters generated by the test machine to form a test mode or test vector, apply the test vector to the DUT, compare the measured value composed of the test vector in real time with the programmed value in real time, judge the quality of the semiconductor chip, and track the measured value in real time; The failure judgment end is used to judge whether the semiconductor chip has failed by real-time detection of the measurement value. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. According to the analysis result, the measurement value of the semiconductor chip with the abnormal failure is adjusted in real time, and real-time tracking is performed after adjustment to ensure the accuracy of the semiconductor chip failure adjustment.

[0023] The package detection end includes a region monitoring module, a bonding identification module, and a connection tracking module; The regional monitoring module includes a regional division unit, a regional monitoring unit and a monitoring coordination unit; The area division unit is used to divide the semiconductor chip into a plurality of areas by image capture; The regional monitoring unit is used to monitor the outer surface of the semiconductor chip in multiple regions in real time through sensors and monitoring equipment; The monitoring coordination unit is used to realize multi-region data coordination of the outer surface of the semiconductor chip in multiple regions through data sensors and signal receivers.

[0024] The bonding recognition module includes a bonding capture unit and a capture recognition unit; The bonding capture unit is used to capture bonding wire connection details through monitoring equipment; The capture and recognition unit is used to convert the bonding wire connection details captured by the monitoring device into a bonding wire connection picture, and recognize whether the bonding angle of the bonding wire connection is abnormal. The recognition method is as follows: Step 1: Set the standard path of the bonding wire, set the standard path of the bonding wire as the center point, and calculate the bonding angle of the bonding wire connection at the current moment. The formula is as follows: in, is the angle between the bonding point and the positive direction of the X-axis, is the angle between the bonding point and the positive direction of the Y axis, A is the height of the bonding line, is the vector of the bonding point in the X-axis direction, is the vector of the bonding point in the Y-axis direction; Step 2: Calculate the bond angle shift Compared with the bonding distance, the standard bonding values ​​are set as O and M. as well as , then it is judged that the angle of the bonding wire connection is abnormal, if not, then it is judged that the angle of the bonding wire connection is normal.

[0025] The connection tracking module includes a connection conduction unit, a packaging and sealing unit, and a real-time warning unit; The connection unit is used to form tiny solder balls on the semiconductor chip pads and then directly connect the semiconductor chip face down to the substrate to achieve connection and conduction; The packaging sealing unit is used to monitor the semiconductor chip packaging sealing parameters in real time through an airtightness detector; The real-time warning unit is used to subtract the detected semiconductor chip package airtightness parameter from the standard airtightness parameter. If the difference is ≥ 1, it indicates that the semiconductor chip package airtightness is poor; if the difference is < 1, it indicates that the semiconductor chip package airtightness is normal.

[0026] After the semiconductor chip is packaged, the surface of the packaged semiconductor chip is divided into areas, and the corresponding areas are monitored in real time, and the coordinated monitoring effect of multiple areas is achieved. It is possible to identify in real time whether the bonding wire connection is abnormal, connect the semiconductor chip, and detect the tightness of the semiconductor chip package in real time. After the semiconductor chip is packaged, the poor bonding wire connection or the abnormal change of electrical performance caused by packaging can be monitored in time, and the packaging status of the semiconductor chip can be monitored in real time, thereby improving the reliability of semiconductor chip packaging.

[0027] Example 2, please refer to Figure 3 As shown: A module test system for a high-stability power semiconductor chip, comprising a packaging detection end, a module test end and a failure judgment end; The packaging detection end is used to divide the surface of the packaged semiconductor chip into areas and monitor the corresponding areas in real time to achieve the coordinated monitoring effect of multiple areas. It also captures the connection status of the bonding wires in real time to identify whether the bonding wire connections are abnormal, connect the semiconductor chips, and detect the sealing of the semiconductor chip packaging in real time, and issue early warning signals in real time. The module test end is used to apply feedback to the signal parameters generated by the test machine to form a test mode or test vector, apply the test vector to the DUT, compare the measured value composed of the test vector in real time with the programmed value in real time, judge the quality of the semiconductor chip, and track the measured value in real time; The failure judgment end is used to judge whether the semiconductor chip has failed by real-time detection of the measurement value. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. According to the analysis result, the measurement value of the semiconductor chip with the abnormal failure is adjusted in real time, and real-time tracking is performed after adjustment to ensure the accuracy of the semiconductor chip failure adjustment.

[0028] The module test end includes a test vector module, a measurement tracking module, and a programming comparison module; The test vector module includes a test mode unit and a test vector unit; The test mode unit is used to generate signal parameters of various semiconductor chips through a test machine; The test vector unit is used to automatically form test modes and test vectors from the signal parameters of various semiconductor chips through a data processor.

[0029] The measurement and tracking module includes a vector output unit and a vector tracking unit; The vector output unit is used to transmit the test vector through the data processor; The vector tracking unit is used to track the transmitted test vectors in real time through a data tracker.

[0030] The programming comparison module includes a programming comparison unit and a programming early warning unit; The programming comparison unit is used to set standard test programming values; The programming warning unit is used to compare the test vectors tracked in real time with the programming values ​​to determine whether the chip is good or bad. The judgment steps are as follows: Step I: Calculate the relative deviation between the test vector tracked at the current moment and the programmed value. The calculation formula is as follows:

[0031] in, Indicates the actual value of the test vector tracked at the current moment, Indicates the expected value of the programmed value at the current moment, Indicates the relative deviation between the test vector tracked at the current moment and the programmed value; Step II: If the relative deviation between the measurement vector tracked at the current moment and the programmed value = 0, the semiconductor chip is judged to be normal. If the difference ≠ 0, the semiconductor chip is judged to be abnormal.

[0032] When performing module testing on semiconductor chips, the quality of the semiconductor chip is judged by comparing the measured values ​​composed of the test vectors in real time with the programmed values, so that the measured output values ​​can be compared with the programmed values ​​in real time to judge the quality of the semiconductor chip in time.

[0033] Example 3, please refer to Figure 4 As shown: A module test system for a high-stability power semiconductor chip, comprising a packaging detection end, a module test end and a failure judgment end; The packaging detection end is used to divide the surface of the packaged semiconductor chip into areas and monitor the corresponding areas in real time to achieve the coordinated monitoring effect of multiple areas. It also captures the connection status of the bonding wires in real time to identify whether the bonding wire connections are abnormal, connect the semiconductor chips, and detect the sealing of the semiconductor chip packaging in real time, and issue early warning signals in real time. The module test end is used to apply feedback to the signal parameters generated by the test machine to form a test mode or test vector, apply the test vector to the DUT, compare the measured value composed of the test vector in real time with the programmed value in real time, judge the quality of the semiconductor chip, and track the measured value in real time; The failure judgment end is used to judge whether the semiconductor chip has failed by real-time detection of the measurement value. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. According to the analysis result, the measurement value of the semiconductor chip with the abnormal failure is adjusted in real time, and real-time tracking is performed after adjustment to ensure the accuracy of the semiconductor chip failure adjustment.

[0034] The failure judgment end includes a failure detection module, a failure judgment module and a failure adjustment module; The failure detection module is used to detect semiconductor chip failure anomalies in real time through a transmission electron microscope and failure detection equipment.

[0035] The failure judgment module includes a failure judgment unit and a failure increase and decrease unit; The failure judgment unit is used to judge the failure fault by real-time monitoring of the semiconductor chip parameters, and the failure fault includes one or more of the manufacturing process of the semiconductor chip, insufficient electrostatic discharge protection, magnetic field influence and switching power supply problem; The failure increase and decrease unit is used to update the failure judgment and judgment result in real time according to the timer, and to update the failure cause and failure fault of the semiconductor chip in real time.

[0036] The failure adjustment module includes a failure adjustment unit and an adjustment tracking unit; The failure adjustment unit is used to set a reasonable test range for each parameter of the semiconductor chip, each parameter including one of voltage, current, signal timing, frequency, power consumption, threshold voltage and maximum output current, determine the cause of failure according to the parameter abnormality, and automatically adjust the parameter; The adjustment tracking unit is used to track the adjustment results of the failure parameters in real time through the data tracker, and calculate the difference between the parameters before and after the adjustment. If the difference = 0, the failure parameter adjustment is judged to be effective. If the difference ≠ 0, the failure parameter adjustment is judged to be invalid, and the system is reported, a voice alarm is issued, and feedback is given for manual processing.

[0037] When performing module testing on semiconductor chips, the measurement values ​​are detected in real time to determine whether the semiconductor chip has failed. If it has failed, the cause of the failure is promptly found out based on the abnormal measurement values, and the results are analyzed in detail. After judging whether the semiconductor chip is good or bad, the results can be analyzed in detail in time, and based on the analysis results, the measurement values ​​of the semiconductor chips with abnormal failures are adjusted in real time, the causes of the failure are promptly found out and corresponding adjustments are made, thereby improving the module testing effect of semiconductor chips.

[0038] In the present invention, a module testing system for a high-stability power semiconductor chip is provided. When the system is in operation, the semiconductor chip is divided into multiple areas through image capture, and the outer surfaces of the semiconductor chips in multiple areas are monitored in real time through sensors and monitoring equipment. The data sensors and signal receivers realize multi-area data coordination of the outer surfaces of the semiconductor chips in multiple areas, and convert the bonding wire connection details captured by the monitoring equipment into bonding wire connection pictures, and identify whether the bonding angle of the bonding wire connection is abnormal. After the semiconductor chip is packaged, the surface of the packaged semiconductor chip is divided into areas, and the corresponding areas are monitored in real time, and the coordinated monitoring effect of multiple areas is achieved, and whether the bonding wire connection is abnormal is identified in real time, the semiconductor chip is connected and conducted, and the sealing of the semiconductor chip package is detected in real time, so that after the semiconductor chip is packaged, the poor connection of the bonding wire or the abnormality of the electrical performance change caused by the packaging can be monitored in time, and the packaging state of the semiconductor chip can be monitored in real time, and the reliability of the semiconductor chip packaging can be improved; by forming tiny solder balls on the semiconductor chip pads, and then directly connecting the semiconductor chip face down to the substrate, the connection is achieved, and the signal parameters of various semiconductor chips are processed through data. The device automatically forms a test mode and a test vector, tracks the transmitted test vector in real time through a data tracker, compares the test vector tracked in real time with the programming value, and judges whether the chip is good or bad. When performing module testing on semiconductor chips, the quality of the semiconductor chip is judged by comparing the measured value composed of the test vector in real time with the programming value in real time, so that the measured output value can be compared with the programming value in real time, and the quality of the semiconductor chip is judged in time. The failure anomaly of the semiconductor chip is detected in real time by a transmission electron microscope and a failure detection device, and the failure fault is judged by the semiconductor chip parameters monitored in real time. The failure judgment and judgment result are updated in real time according to the timer, and the failure cause and failure fault of the semiconductor chip are updated in real time. When performing module testing on semiconductor chips, it is judged whether the semiconductor chip fails by detecting the measurement value in real time. If it fails, the failure cause is found out in time according to the abnormal measurement value, and the result is analyzed in detail. After judging whether the semiconductor chip is good or bad, the result can be analyzed in detail in time, and the measurement value of the semiconductor chip with abnormal failure is adjusted in real time according to the analysis result, the failure cause is found out in time and corresponding adjustment is made, so as to improve the module testing effect of the semiconductor chip.

[0039] The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited to the above embodiments. The above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A module test system for high-stability power semiconductor chips, characterized in that: The module testing system of the high-stability power semiconductor chip comprises a packaging detection end, a module testing end and a failure judgment end; The packaging detection end is used to divide the surface of the packaged semiconductor chip into regions and monitor the corresponding divided regions in real time to achieve a coordinated monitoring effect of multiple regions, and to capture the connection status of the bonding wires in real time to identify whether the bonding wire connections are abnormal, connect the semiconductor chips, and detect the sealing of the semiconductor chip packaging in real time, and issue a warning signal in real time; The module test end is used to apply feedback to the signal parameters generated by the test machine to form a test mode or test vector, apply the test vector to the DUT, compare the measured value formed by the test vector in real time with the programmed value in real time, judge whether the semiconductor chip is good or bad, and track the measured value in real time; The failure judgment end is used to judge whether the semiconductor chip has failed by real-time detection of the measurement value. If it has failed, the cause of the failure is promptly found out according to the abnormal measurement value, and the result is analyzed in detail. According to the analysis result, the measurement value of the semiconductor chip with the abnormal failure is adjusted in real time, and real-time tracking is performed after adjustment to ensure the accuracy of the semiconductor chip failure adjustment.

2. The system according to claim 1, characterized in that The package detection end includes a region monitoring module, a bonding identification module and a connection tracking module; The regional monitoring module includes a regional division unit, a regional monitoring unit and a monitoring coordination unit; The region division unit is used to divide the semiconductor chip into a plurality of regions by image capture; The regional monitoring unit is used to monitor the outer surface of the semiconductor chip in multiple regions in real time through sensors and monitoring equipment; The monitoring coordination unit is used to realize multi-region data coordination on the outer surface of a semiconductor chip in multiple regions through data sensors and signal receivers.

3. The system according to claim 2, characterized in that The bonding recognition module includes a bonding capture unit and a capture recognition unit; The bonding capture unit is used to capture bonding wire connection details through a monitoring device; The capture and identification unit is used to convert the bonding wire connection details captured by the monitoring device into a bonding wire connection picture, and identify whether the bonding angle of the bonding wire connection is abnormal. The identification method is as follows: Step 1: Set the standard path of the bonding wire, set the standard path of the bonding wire as the center point, and calculate the bonding angle of the bonding wire connection at the current moment. The formula is as follows: in, is the angle between the bonding point and the positive direction of the X-axis, is the angle between the bonding point and the positive direction of the Y axis, A is the height of the bonding line, is the vector of the bonding point in the X-axis direction, is the vector of the bonding point in the Y-axis direction; Step 2: Calculate the bond angle shift Compared with the bonding distance, the standard bonding values ​​are set as O and M. as well as , then it is judged that the angle of the bonding wire connection is abnormal, if not, then it is judged that the angle of the bonding wire connection is normal.

4. The system according to claim 3, characterized in that The connection tracking module includes a connection conduction unit, a packaging and sealing unit, and a real-time warning unit; The connection unit is used to form tiny solder balls on the semiconductor chip pads and then directly connect the semiconductor chip face down to the substrate to achieve connection and conduction; The packaging sealing unit is used to monitor the semiconductor chip packaging sealing parameters in real time through an airtightness detector; The real-time warning unit is used to subtract the detected semiconductor chip package airtightness parameter from the standard airtightness parameter. If the difference is ≥1, it indicates that the semiconductor chip package airtightness is poor; if the difference is <1, it indicates that the semiconductor chip package airtightness is normal.

5. The system according to claim 1, characterized in that The module test end includes a test vector module, a measurement tracking module and a programming comparison module; The test vector module includes a test mode unit and a test vector unit; The test mode unit is used to generate signal parameters of various semiconductor chips through a test machine; The test vector unit is used to automatically form test modes and test vectors from the signal parameters of various semiconductor chips through a data processor.

6. The system according to claim 5, characterized in that The measurement and tracking module includes a vector output unit and a vector tracking unit; The vector output unit is used to transmit the test vector through the data processor; The vector tracking unit is used to track the transmitted test vector in real time through a data tracker.

7. The system according to claim 6, characterized in that The programming comparison module includes a programming comparison unit and a programming early warning unit; The programming comparison unit is used to set standard test programming values; The programming warning unit is used to compare the test vector tracked in real time with the programming value to determine whether the chip is good or bad. The determination steps are as follows: Step I: Calculate the relative deviation between the test vector tracked at the current moment and the programmed value. The calculation formula is as follows: in, Indicates the actual value of the test vector tracked at the current moment, Indicates the expected value of the programmed value at the current moment, Indicates the relative deviation between the test vector tracked at the current moment and the programmed value; Step II: If the relative deviation between the measurement vector tracked at the current moment and the programmed value = 0, the semiconductor chip is judged to be normal. If the difference ≠ 0, the semiconductor chip is judged to be abnormal.

8. The system according to claim 1, characterized in that The failure judgment end includes a failure detection module, a failure judgment module and a failure adjustment module; The failure detection module is used to detect failure anomalies of semiconductor chips in real time through a transmission electron microscope and a failure detection device.

9. The system according to claim 8, characterized in that The failure judgment module includes a failure judgment unit and a failure increase and decrease unit; The failure judgment unit is used to judge the failure fault by real-time monitoring of the semiconductor chip parameters, and the failure fault includes one or more of the manufacturing process of the semiconductor chip, insufficient electrostatic discharge protection, magnetic field influence and switching power supply problem; The failure increase and decrease unit is used to update the failure judgment and the judgment result in real time according to the timer, and to update the failure cause and failure fault of the semiconductor chip in real time.

10. The system according to claim 9, characterized in that The failure adjustment module includes a failure adjustment unit and an adjustment tracking unit; The failure adjustment unit is used to set a reasonable test range for each parameter of the semiconductor chip, each parameter including one of voltage, current, signal timing, frequency, power consumption, threshold voltage and maximum output current, determine the failure cause according to the parameter abnormality, and automatically adjust the parameter; The adjustment tracking unit is used to track the adjustment results of the failure parameters in real time through a data tracker, and calculate the difference between the parameters before and after the adjustment. If the difference = 0, it is judged that the adjustment of the failure parameters is effective. If the difference ≠ 0, it is judged that the adjustment of the failure parameters is invalid, and the system is reported, a voice alarm is issued, and feedback is provided for manual processing.

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