Test device, test system and test method

Abstract

The present invention proposes a test device, a test system and a test method, which relate to the technical field of semiconductor memory device testing. The test device includes: a test pin card, a DC test circuit, an AC test circuit, a mode switching circuit and a main control circuit. The present invention integrates two major functions of AC testing and DC testing. The system will execute the DC test process to select the faulty storage die, and then further verify the performance of the storage die at high frequency or actual working speed through the AC test process, so as to identify the storage die with potential problems and improve the accuracy of the test. At the same time, the present invention sets a mode switching circuit to switch the connection between the DC test circuit and the connection between the AC test circuit and the test pin card, which effectively avoids the interference of the DC part on the AC high-frequency test in the same test device, thereby reducing the risk of AC test failure.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor memory device testing, and in particular to a testing device, a testing system and a testing method. Background Art

[0002] At present, with the faster and faster process conversion of DRAM (Dynamic Random Access Memory) technology, from 30nm, 25nm, 20nm, 1αnm and even smaller processes, there will be certain problems in each process conversion, resulting in the production yield of wafers will decrease with the improvement of process technology. If these products are directly packaged without testing, the defective grains (die for short) will also be packaged into chip particles together. If the yield of the wafer is so low that the profit cannot make up for the packaging cost, losses will occur.

[0003] The traditional testing method is to perform current and voltage tests and read-write function tests on the storage die. In practice, there are many factors that cause DRAM die failures, mainly from the production process. There are also many types of die failures. In addition to good and bad storage cells, some storage cells are in a critical state of good and bad, and the state of some cells changes due to the state conversion of surrounding storage cells. If only current and voltage tests and read-write function tests are performed on the storage die. The die of a storage cell in a good or bad state can be identified, but the storage die in other states cannot be identified. The test accuracy is relatively low. At the same time, if multiple tests are added, it is easy to appear in the same test device, and the DC part will affect the high-frequency test of AC, which often leads to the failure of AC test. Therefore, a test device with multiple tests and DC test that does not affect AC test is needed. Summary of the invention

[0004] The main purpose of the present invention is to provide a testing device and a testing method, aiming to solve the problem of low testing accuracy of traditional testing devices.

[0005] In view of the above problems, the present invention provides a testing device, comprising:

[0006] Test pin card, used to place the storage die to be tested;

[0007] A DC test circuit, used for performing a DC test of a low-frequency signal on a storage Die to be tested and outputting first test data;

[0008] An AC test circuit, used for performing an AC test of a high-frequency signal on a storage die to be tested and outputting second test data;

[0009] A mode switching circuit, wherein a common end of the mode switching circuit is electrically connected to a test pin card, a first input end of the mode switching circuit is electrically connected to a DC test circuit, and a second input end of the mode switching circuit is electrically connected to an AC test circuit; the mode switching circuit is used to switch the connection between the DC test circuit and the AC test circuit and the test pin card on / off;

[0010] The main control circuit is respectively connected to the controlled ends of the DC test circuit, the AC test circuit and the mode switching circuit; the main control circuit is used to receive and output a control signal to the mode switching circuit according to the instruction of the host computer, so as to control the mode switching circuit to connect the path between the test pin card and the DC test circuit, or to connect the path between the test pin card and the AC test circuit; the main control circuit is also used to control the DC test circuit to work when the test pin card is connected to the DC test circuit, so as to obtain the first test data and upload it to the host computer; and, when the test pin card is connected to the AC test circuit, control the AC test circuit to work to obtain the second test data and upload it to the host computer.

[0011] Optionally, the main control circuit is also used to first control the path between the mode switching circuit connecting the test pin card and the DC test circuit according to the instructions of the host computer to complete the DC test of the storage Die to be tested, and then control the path between the mode switching circuit connecting the test pin card and the DC test circuit to complete the AC test of the storage Die to be tested.

[0012] Optionally, the mode switching circuit includes a high-speed electronic relay array, a common end of each high-speed electronic relay in the high-speed electronic relay array is electrically connected to a test pin card, a first input end of each high-speed electronic relay is electrically connected to a DC test circuit, and a second input end of each high-speed electronic relay is electrically connected to an AC test circuit.

[0013] Optionally, the DC test circuit includes voltage test, impedance test, forward current test, negative current test, open-short circuit test, power consumption test and leakage current test for respectively electrically connecting the mode switching circuit and the main control circuit;

[0014] The voltage test circuit is used to provide different voltages to the storage Die to be tested and detect the output voltage of the storage Die to be tested to obtain voltage test data;

[0015] The impedance test circuit is used to measure the impedance characteristics of the input and output pins and the internal circuit of the storage Die to be tested according to the test program of the DC program storage circuit to obtain impedance test data;

[0016] The forward current test circuit is used to provide a forward current to the storage die to be tested and detect the current magnitude of the input and output pins of the storage die to be tested to obtain forward current test data;

[0017] The negative current test circuit is used to provide a negative positive current to the storage die to be tested and detect the current magnitude of the input and output pins of the storage die to be tested to obtain negative current test data;

[0018] The open-short circuit test circuit is used to measure the storage Die pin to be tested according to the test program of the DC program storage circuit to obtain open-short circuit test data;

[0019] The power consumption test circuit is used to measure the power consumption value of the storage die to be tested under different working conditions according to the test program of the DC program storage circuit to obtain power consumption test data;

[0020] The leakage current testing circuit provides a certain voltage to the storage die to be tested and detects the current value of the storage die to be tested in a turned-off or low-level state to obtain leakage current testing data.

[0021] Optionally, the testing device further comprises:

[0022] A DC program storage circuit for storing a test program;

[0023] A DC control circuit, the DC control circuit is electrically connected to the first test circuit and the main control circuit; the DC control circuit is used to receive a control signal output by the main control circuit to drive the first test circuit to test the storage Die and output the first test data;

[0024] a first PMU circuit, the first PMU circuit being electrically connected to the first test circuit; the first PMU circuit being used for power management of the first test circuit;

[0025] The first serial port communication circuit is electrically connected to the first test circuit and the main control circuit; the first serial port communication circuit is used for data transmission between the first test circuit and the main control circuit.

[0026] Optionally, the AC test circuit includes a Function test circuit, an EFT test circuit, a Timing test circuit, an eye diagram test circuit and a different rate test circuit which are electrically connected to the mode switching circuit and the main control circuit respectively;

[0027] The Function test circuit is used to perform a write and read program on the storage Die to be tested according to the test program of the AC program storage circuit, and compare whether the read and write programs are consistent to obtain Function test data;

[0028] The EFT test circuit is used to measure the tolerance of the tested storage die to fast transient electromagnetic interference according to the test program of the AC program storage circuit to obtain EFT test data;

[0029] The timing test circuit is used to perform write and read programs on the storage die to be tested according to the test program of the AC program storage circuit, and measure the parameters of the storage die to be tested under different operating conditions to obtain timing test data;

[0030] The eye diagram test circuit is used to capture the storage Die output signal to be tested and generate an eye diagram according to the test program of the AC program storage circuit, and analyze the eye diagram to obtain eye diagram test data;

[0031] The different rate test circuit is used to measure the performance of the storage die to be tested at different rates according to the test program of the AC program storage circuit to obtain different rate test data.

[0032] Optionally, the testing device further comprises:

[0033] AC program storage circuit, used for storing test programs;

[0034] An AC control circuit, the AC control circuit electrically connecting the second test circuit and the main control circuit; the AC control circuit is used to receive a control signal output by the main control circuit to drive the second test circuit to test the storage Die and output second test data;

[0035] a second PMU circuit, the second PMU circuit being electrically connected to the second test circuit; the second PMU circuit being used for power management of the second test circuit;

[0036] The second serial port communication circuit is electrically connected to the second test circuit and the main control circuit; the second serial port communication circuit is used for data transmission between the second test circuit and the main control circuit.

[0037] The present invention also provides a test system, comprising a host computer, a communication circuit and the above-mentioned test device;

[0038] A communication circuit electrically connects the main control circuit and the host computer; the communication circuit is used for communication between the main control circuit and the host computer.

[0039] The present invention further provides a testing method, based on the above-mentioned testing device, the testing method comprises:

[0040] According to the instruction received from the host computer, the control mode switching circuit connects the path between the test pin card and the DC test circuit;

[0041] Entering the DC test process, the DC test circuit performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs the first test data, which is uploaded to the host computer;

[0042] Complete the DC test process based on the storage Die to be tested, and control the mode switching circuit to connect the path between the test pin card and the AC test circuit according to the instructions received from the host computer;

[0043] Entering the AC test process, the AC test circuit performs an AC test of a high-frequency signal on the storage Die to be tested according to the received control signal and outputs second test data, which is uploaded to the host computer.

[0044] Optionally, the specific steps of entering the DC test process, wherein the DC test circuit performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs first test data, and uploads the first test data to the host computer include:

[0045] Enter the DC test process, and perform voltage test, impedance test, positive current test, negative current test, open-short circuit test, power consumption test and leakage current test on the storage Die to be tested according to the received control signal, output voltage test data, impedance test data, positive current test data, negative current test data, open-short circuit test data, power consumption test data and leakage current test data, and upload them to the host computer;

[0046] And / or, the AC test process is entered, the AC test circuit performs a high-frequency signal AC test on the storage Die to be tested according to the received control signal and outputs the second test data, and the specific steps of uploading the second test data to the host computer include:

[0047] Enter the AC test process, perform Function test, EFT test, Timing test, eye diagram test and different rate test on the storage Die to be tested according to the received control signal, output Function test data, EFT test data, Timing test data, eye diagram test data and different rate test data, and upload them to the host computer.

[0048] The present invention integrates two major functions, AC testing and DC testing. The system will execute the DC test process to select the faulty storage die, and then further verify the performance of the storage die at high frequency or actual working speed through the AC test process, thereby identifying the storage die with potential problems and improving the accuracy of the test. At the same time, the present invention sets a mode switching circuit to switch the connection between the DC test circuit and the connection between the AC test circuit and the test pin card, effectively avoiding the interference of the DC part on the AC high-frequency test in the same test device, thereby reducing the risk of AC test failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0050] Figure 1 A circuit framework diagram of a testing device of the present invention;

[0051] Figure 2 A circuit framework diagram of an embodiment of a testing device of the present invention;

[0052] Figure 3 The present invention is a flow chart of the steps of a testing method.

[0053] Figure numbers: test pin card 01, DC test circuit 02, AC test circuit 03, mode switching circuit 04, main control circuit 05, communication circuit 06, DC program storage circuit 11, DC control circuit 12, first PMU circuit 13, first serial port communication circuit 14, AC program storage circuit 21, AC control circuit 22, second PMU circuit 23, second serial port communication circuit 24.

[0054] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0055] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0056] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0057] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0058] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0059] The present invention provides a testing device, such as Figure 1 As shown, including:

[0060] Test pin card 01, used to place the storage die to be tested;

[0061] A DC test circuit 02, used for performing a DC test of a low-frequency signal on a storage Die to be tested and outputting first test data;

[0062] AC test circuit 03, used for performing AC test of high frequency signal on the storage Die to be tested and outputting second test data;

[0063] A mode switching circuit 04, wherein the common end of the mode switching circuit 04 is electrically connected to the test pin card 01, the first input end of the mode switching circuit 04 is electrically connected to the DC test circuit 02, and the second input end of the mode switching circuit 04 is electrically connected to the AC test circuit 03; the mode switching circuit 04 is used to switch the connection between the DC test circuit 02 and the AC test circuit 03 and the test pin card 01 on / off;

[0064] The main control circuit 05 is respectively connected to the controlled ends of the DC test circuit 02, the AC test circuit 03 and the mode switching circuit 04; the main control circuit 05 is used to receive and output a control signal to the mode switching circuit 04 according to the instruction of the host computer, so as to control the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02, or to connect the path between the test pin card 01 and the AC test circuit 03; the main control circuit 05 is also used to control the DC test circuit 02 to work when the test pin card 01 is connected to the DC test circuit 02, so as to obtain the first test data and upload it to the host computer; and, when the test pin card 01 is connected to the AC test circuit 03, control the AC test circuit 03 to work, so as to obtain the second test data and upload it to the host computer.

[0065] More specifically, a storage die is a key component in a semiconductor memory device, and refers to a single chip cut from a wafer that contains complete storage functions. It is the basic physical unit that constitutes a Flash memory chip or other types of memory chips, and each die can be operated individually. In storage technology, a storage die usually contains a large number of transistors and other electronic components that work together to achieve data storage and retrieval functions. For example, in a NAND Flash memory, a storage die contains multiple storage cells, each of which can store 1 bit or more bits of data. These storage cells are connected to an external interface through a complex circuit structure to achieve data read and write operations.

[0066] As the core component of semiconductor memory devices, storage dies directly affect the performance and reliability of the entire storage system, so their quality and testing are particularly important. Storage die testing mainly includes the following aspects: 1. Functional testing: Use a specific test program to read and write storage dies to check whether their data access functions are normal; 2. Performance testing: Performance testing is designed to evaluate key performance indicators such as storage die read and write speed and power consumption; 3. Reliability testing: Reliability testing is designed to evaluate the stability and durability of storage dies during long-term use, perform long-term read and write operations on storage dies, and observe changes in their performance; 4. Electrical characteristics testing: Electrical characteristics testing is used to detect whether electrical parameters such as voltage and current of storage dies are normal.

[0067] Traditional storage die test devices often only include current and voltage tests, as well as read and write function tests. These tests can pick out faulty storage dies, but cannot fully cover the functions and performance parameters of storage dies, resulting in some potential defects not being discovered in time. At the same time, if traditional test devices need to perform AC high-frequency tests on storage dies, in order to ensure the accuracy and independence of DC low-frequency tests and AC high-frequency tests, two independent test devices are usually used. This is because DC tests and AC tests have significant differences in signal characteristics, test requirements, and potential interference sources.

[0068] In view of the defects existing in traditional testing devices, the present invention proposes a testing device, including a test pin card 01, a DC test circuit 02, an AC test circuit 03, a mode switching circuit 04 and a main control circuit 05. Among them, the test pin card 01 is used to place the storage Die to be tested, and it realizes the test of the storage Die by connecting with other parts such as the test control module. The setting of the test pin card 01 usually takes into account the accuracy, stability and ease of use of the test to ensure the accuracy of the test results. Preferably, the test pin card 01 can be configured to be replaceable to meet the testing requirements of storage Dies of different models or specifications, thereby improving the versatility and flexibility of the testing device. Or the test pin card 01 can be configured to include multiple pin card units, each unit corresponding to a storage Die to be tested, so that multiple storage Dies can be tested at the same time, thereby improving the test efficiency.

[0069] The DC test circuit 02 is used to perform a low-frequency DC test on the storage die to be tested and output the first test data; the DC test is basically a low-frequency test below 10Mbps. The purpose of the DC test is to check the DC electrical characteristics of the storage die, such as detecting whether the signal pins of the chip have open circuit or short circuit problems, verifying whether the power pins of the chip have short circuit problems, or measuring the DC current and voltage parameters of the chip to ensure that they meet the design specifications. These tests help identify electrical faults of the chip under static or low-frequency conditions, such as pin connection problems, power short circuits, and DC parameter deviations from design specifications. After the DC test circuit 02 completes the test on the storage die, it uploads the test results (first test data).

[0070] AC test circuit 03 is used to perform AC test of high-frequency signal on the storage die to be tested and output the second test data; AC test is basically a high-frequency test of 100Mbps, and AC test mainly focuses on the AC signal quality and timing parameters of the chip, such as Function test (read and write test) to write and read programs on the storage die to be tested, and compare whether the read and write programs are consistent, and Timing test (timing test) to write and read programs on the storage die to be tested, and measure the parameters of the storage die to be tested under different operating conditions. AC test helps to find potential problems of the chip at high frequency or actual working speed, such as delay failure, signal distortion, etc. After AC test circuit 03 completes the test on the storage die, it uploads the test results (second test data).

[0071] Mode switching circuit 04, the common end of mode switching circuit 04 is electrically connected to test pin card 01, the first input end of mode switching circuit 04 is electrically connected to DC test circuit 02, and the second input end of mode switching circuit 04 is electrically connected to AC test circuit 03; mode switching circuit 04 is used to switch the connection between DC test circuit 02 and the connection between AC test circuit 03 and test pin card 01. Since DC test and AC test have significant differences in signal characteristics, test requirements and potential interference sources. In the same test device, the DC part will affect the high-frequency test of AC, often resulting in failure of AC test. The present invention is provided with mode switching circuit 04, which separates DC test and AC test by conducting the connection between test pin card 01 and AC test circuit 03 or the connection between DC test circuit 02, so that the two do not interfere with each other. Preferably, the mode switching circuit 04 of the present application adopts a high-speed electronic relay array, which is an electronic control device composed of multiple high-speed electronic relays, which controls the on and off of the circuit through electromagnetic effect. Through the high-speed electronic relay array, the present application can accurately control the connection between the test pin card 01 and the AC test circuit 03 or the connection between the DC test circuit 02 to be turned on or off.

[0072] The main control circuit 05 is connected to the controlled end of the DC test circuit 02, the AC test circuit 03 and the mode switching circuit 04 respectively; the main control circuit 05 is used to receive and output a control signal to the mode switching circuit 04 according to the instruction of the host computer, so as to control the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02, or to connect the path between the test pin card 01 and the AC test circuit 03. The main control circuit 05 first receives instructions from the host computer, which usually contain key information such as the test type and test parameters. The main control circuit 05 parses the received instructions and outputs corresponding control signals according to the parsing results. According to the instructions of the host computer, the main control circuit 05 controls the working state of the mode switching circuit 04 by outputting a control signal. When a DC test is required, the main control circuit 05 controls the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02; when an AC test is required, the path between the test pin card 01 and the AC test circuit 03 is connected.

[0073] The main control circuit 05 is also used to control the DC test circuit 02 to work when the test pin card 01 is connected to the DC test circuit 02, so as to obtain the first test data and upload it to the host computer; and, when the test pin card 01 is connected to the AC test circuit 03, control the AC test circuit 03 to work, so as to obtain the second test data and upload it to the host computer. When the test pin card 01 is connected to the DC test circuit 02, the main control circuit 05 controls the DC test circuit 02 to start working, performs a DC test of a low-frequency signal on the storage Die to be tested, and obtains the first test data; when the test pin card 01 is connected to the AC test circuit 03, the main control circuit 05 controls the AC test circuit 03 to start working, performs an AC test of a high-frequency signal on the storage Die to be tested, and obtains the second test data. Finally, the main control circuit 05 uploads the first test data and the second test data obtained to the host computer so that the host computer can perform further analysis and processing.

[0074] The present invention integrates two functions, AC test and DC test. The system will execute the DC test process to select the faulty storage die, and then further verify the performance of the storage die at high frequency or actual working speed through the AC test process, thereby identifying the storage die with potential problems and improving the accuracy of the test. At the same time, the present invention sets a mode switching circuit 04 to switch the connection between the DC test circuit 02 and the connection between the AC test circuit 03 and the test pin card 01 on / off, effectively avoiding the interference of the DC part on the AC high-frequency test in the same test device, thereby reducing the risk of AC test failure.

[0075] In one embodiment, the main control circuit 05 is also used to first control the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02 according to the instructions of the upper computer to complete the DC test of the storage Die to be tested, and then control the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02 to complete the AC test of the storage Die to be tested.

[0076] Since DC testing focuses on the static electrical characteristics of the chip, these characteristics are the basis for the normal operation of the chip. If the chip has a fault in the DC test stage, the subsequent AC test may not accurately reflect the actual performance of the chip, and may even cause damage to the test equipment. Therefore, performing DC testing first can eliminate those basic electrical faults that may cause the chip to not work properly. After confirming that the chip has passed the DC test, performing AC testing can further verify the performance of the chip at high frequencies or actual operating speeds. AC testing can reveal potential problems of the chip under dynamic conditions, such as delay failures and signal quality problems. These parts of the memory cells can work properly under certain conditions, but may not work properly under other conditions. Their state may be affected by the state transition of the surrounding memory cells, or change due to slight fluctuations in their own performance. Or the state of some memory cells may be disturbed by the state transition of adjacent memory cells. For example, when adjacent memory cells switch from a charged state to a discharged state, electromagnetic interference or charge leakage may occur, affecting the state of these memory cells.

[0077] Therefore, performing DC testing first and then AC testing helps to comprehensively and accurately evaluate the performance and quality of storage dies.

[0078] In one embodiment, the mode switching circuit 04 includes a high-speed electronic relay array, wherein the common end of each high-speed electronic relay in the high-speed electronic relay array is electrically connected to the test pin card 01, the first input end of each high-speed electronic relay is electrically connected to the DC test circuit 02, and the second input end of each high-speed electronic relay is electrically connected to the AC test circuit 03.

[0079] The high-speed electronic relay array is composed of multiple relay units, each of which includes components such as a coil, a contact, and a spring. When the coil is energized, a magnetic field is generated, causing the contact to close or open, thereby controlling the connection or disconnection of the circuit. By accurately controlling the coil current of each relay unit, accurate control of the entire relay array can be achieved. The high-speed electronic relay array has a fast switching speed and can complete the on-off switching of the circuit within milliseconds to meet the needs of high-speed electronic equipment. Since the relay array is composed of multiple relay units, it has high reliability. Even if a relay unit fails, it will not affect the normal operation of the entire array. At the same time, the high-speed electronic relay array can expand the control scale by increasing the number of relay units to meet the needs of different application scenarios. In this embodiment, each high-speed electronic relay common end is electrically connected to the test pin card 01, the first input end of each high-speed electronic relay is electrically connected to the DC test circuit 02, and the second input end of each high-speed electronic relay is electrically connected to the AC test circuit 03, which can quickly switch the working state after receiving the instruction of the main control circuit 05, speed up the test speed, and improve the test efficiency.

[0080] In one embodiment, if Figure 2 As shown, the DC test circuit 02 includes voltage test, impedance test, positive current test, negative current test, open-short circuit test, power consumption test and leakage current test for respectively electrically connecting the mode switching circuit 04 and the main control circuit 05;

[0081] The voltage test circuit is used to provide different voltages to the storage die to be tested and detect the output voltage of the storage die to be tested to obtain voltage test data; by adjusting the input voltage, it is possible to observe how the output voltage of the storage die changes, and its voltage adaptability and stability can be evaluated.

[0082] The impedance test circuit is used to measure the impedance characteristics of the input and output pins and internal circuits of the memory die to be tested according to the test program of the DC program storage circuit 11 to obtain impedance test data; it operates according to the test program in the DC program storage circuit 11, calculates the impedance value by applying a specific signal to the memory die to be tested and measuring its response, and the impedance test data helps to understand the circuit characteristics and frequency response of the memory die, providing a basis for circuit design and optimization. At the same time, impedance abnormality may also mean that there is a fault in the circuit, such as component damage, poor contact, etc.

[0083] The forward current test circuit is used to provide forward current to the storage die to be tested and detect the current size of the input and output pins of the storage die to be tested to obtain forward current test data; by measuring the current response of the storage die under forward current, including current response speed, current stability and current distribution, its current driving capability and stability can be evaluated.

[0084] The negative current test circuit is used to provide negative positive current to the memory die to be tested and detect the current size of the input and output pins of the memory die to be tested to obtain negative current test data; evaluate the performance of the memory die under reverse current conditions, including reverse current tolerance, reverse breakdown voltage, etc. Negative current testing helps to discover potential problems of the memory die under the action of reverse current, such as reverse leakage, so as to ensure its stability and reliability in complex working environments.

[0085] The open-short circuit test circuit is used to measure the storage Die pin to be tested according to the test program of the DC program storage circuit 11 to obtain the open-short circuit test data; the open-short circuit test is an important means to detect whether the storage Die pin has an open circuit or short circuit fault. By measuring the resistance or voltage drop between the pins, the connection status between the pins can be determined. It helps to find and repair potential circuit faults in time.

[0086] The power consumption test circuit is used to measure the power consumption value of the storage die to be tested under different working conditions according to the test program of the DC program storage circuit 11 to obtain power consumption test data; the power consumption test data helps to understand the energy consumption of the storage die under different working conditions and provide a basis for circuit design and optimization. At the same time, abnormal power consumption may also mean that there is a fault or performance problem in the circuit.

[0087] The leakage current test circuit provides a certain voltage to the storage die to be tested and detects the current value of the storage die to be tested in the off or low-level state to obtain leakage current test data. The leakage current test is an important means to evaluate whether there is abnormal current leakage in the storage die in the off or low-level state. By measuring the leakage current, the insulation performance and stability of the storage die can be judged.

[0088] These test circuits together constitute an important part of the semiconductor test system. They provide strong support for the performance evaluation, quality control and fault diagnosis of storage dies through their respective test functions and test data. In an embodiment, these test circuits are integrated in a test device including a DC test circuit 02 to achieve automated testing and efficient testing.

[0089] In one embodiment, if Figure 2 As shown, the test device also includes:

[0090] The DC program storage circuit 11 is used to store the test program; common storage circuits include registers, flip-flops, and memories.

[0091] The DC control circuit 12 is electrically connected to the first test circuit and the main control circuit 05; the DC control circuit 12 is used to receive the control signal output by the main control circuit 05 to drive the first test circuit to test the storage Die and output the first test data; the control circuit usually includes components such as logic gates and triggers to implement complex control logic. In this embodiment, it receives control signals from the main control circuit 05 and controls the operation of the first test circuit according to these signals, such as starting the test, stopping the test, reading the test data, etc.

[0092] The first PMU circuit 13, the PMU circuit is a power management unit (Power Management Unit), the first PMU circuit 13 is electrically connected to the first test circuit; the first PMU circuit 13 is used for power management of the first test circuit; PMU usually integrates multiple power management functions, such as voltage conversion, current limiting, overvoltage protection, overcurrent protection, etc. It can provide appropriate voltage and current according to the needs of the first test circuit, and ensure the stability and reliability of the power supply. Ensure that the first test circuit can work in a stable power supply environment, thereby improving the accuracy and reliability of the test. At the same time, it can also help reduce energy consumption and extend the service life of the test system.

[0093] The first serial communication circuit 14 is electrically connected to the first test circuit and the main control circuit 05; the first serial communication circuit 14 is used for data transmission between the first test circuit and the main control circuit 05. In this embodiment, the first serial communication circuit 14 may adopt asynchronous serial communication or synchronous serial communication to transmit the test data generated by the first test circuit to the main control circuit 05 for further analysis and processing. It plays a bridge role in the test system, which ensures that the test data can be accurately transmitted from the first test circuit to the main control circuit 05, thereby realizing a comprehensive evaluation of the storage Die performance.

[0094] In one embodiment, if Figure 2 As shown, the AC test circuit 03 includes a Function test circuit, an EFT test circuit, a Timing test circuit, an eye diagram test circuit and a different rate test circuit which are electrically connected to the mode switching circuit 04 and the main control circuit 05 respectively; in this embodiment, the Function test circuit, the EFT test circuit, the Timing test circuit, the eye diagram test circuit and the different rate test circuits are performed on the FPGA platform.

[0095] The Function test circuit is used to write and read the program of the storage die to be tested according to the test program of the AC program storage circuit 21, and compare whether the read and write programs are consistent to obtain Function test data; Function test is mainly used to verify whether the basic functions of the storage die are normal, including data writing, reading, storage and deletion. Through the FPGA design test interface, such as SPI, I2C or parallel interface, communicate with the storage die, compare the consistency of the read and write programs, and determine whether the storage die has functional failures or data errors. This test is the read and write function test described above.

[0096] The EFT (Electrical Fast Transient) test circuit is used to measure the tolerance of the tested storage die to fast transient electromagnetic interference (such as lightning, electrostatic discharge, etc.) according to the test program of the AC program storage circuit 21 to obtain EFT test data; the fast transient pulse signal generated by the FPGA simulates the fast transient electromagnetic interference, and can detect whether the storage die will have problems such as data loss, functional abnormality or damage.

[0097] The Timing (timing test) test circuit is used to write and read programs to the storage die to be tested according to the test program of the AC program storage circuit 21, and measure the parameters of the storage die to be tested under different operating conditions to obtain the Timing test data; the Timing test is mainly used to evaluate the timing performance of the storage die. The storage die is driven by the clock signal generated by the FPGA, and the parameters under different operating conditions are measured to understand the response speed, stability and compatibility of the storage die with other circuits.

[0098] The eye diagram test circuit is used to capture the storage die output signal to be tested and generate an eye diagram according to the test program of the AC program storage circuit 21, and analyze the eye diagram to obtain eye diagram test data; the eye diagram test is an important means to evaluate the quality of the storage die output signal. The eye diagram can intuitively display the waveform, jitter, noise and other characteristics of the signal. By analyzing the parameters such as the opening, closing and cross point of the eye diagram, it can be judged whether the output signal of the storage die is stable and clear, and whether there is a potential signal quality problem.

[0099] The different rate test circuit is used to measure the performance of the storage die to be tested at different rates according to the test program of the AC program storage circuit 21 to obtain different rate test data. By changing the interface rate of communication with the storage die through FPGA (Field-Programmable Gate Array) and measuring the performance data at different rates, the rate adaptability, bandwidth, data transmission efficiency and other characteristics of the storage die can be understood.

[0100] These test circuits together constitute an important part of the semiconductor memory device test system, and they provide strong support for the performance evaluation, quality control and fault diagnosis of storage dies through their respective test functions and test data. In an embodiment, these test circuits are integrated in a test device including an AC test circuit 03 to achieve efficient and accurate testing.

[0101] In one embodiment, if Figure 2 As shown, the test device also includes:

[0102] The AC program storage circuit 21 is used to store the test program; common storage circuits include registers, flip-flops, and memories.

[0103] AC control circuit 22, AC control circuit 22 electrically connects the second test circuit and the main control circuit 05; AC control circuit 22 is used to receive the control signal output by the main control circuit 05 to drive the second test circuit to test the storage Die and output the second test data; in this embodiment, it receives the control signal from the main control circuit 05, and controls the operation of the second test circuit according to these signals, such as starting the test, stopping the test, reading the test data, etc.

[0104] The second PMU circuit 23 is electrically connected to the second test circuit; the second PMU circuit 23 is used for power management of the second test circuit; PMU usually integrates multiple power management functions, such as voltage conversion, current limiting, overvoltage protection, overcurrent protection, etc. It can provide appropriate voltage and current according to the needs of the second test circuit, and ensure the stability and reliability of the power supply. Ensure that the second test circuit can work in a stable power supply environment, thereby improving the accuracy and reliability of the test. At the same time, it can also help reduce energy consumption and extend the service life of the test system.

[0105] The second serial communication circuit 24 is electrically connected to the second test circuit and the main control circuit 05; the second serial communication circuit 24 is used for data transmission between the second test circuit and the main control circuit 05. The second serial communication circuit 24 transmits the test data generated by the second test circuit to the main control circuit 05 for further analysis and processing.

[0106] The present invention also provides a test system, including a host computer, a communication circuit 06 and the above-mentioned test device;

[0107] Communication circuit 06, communication circuit 06 electrically connects main control circuit 05 and host computer; communication circuit 06 is used for communication between main control circuit 05 and host computer. Main control circuit 05 communicates with host computer through communication circuit 06, main control circuit 05 receives instructions from host computer through communication circuit 06 and controls the working state of test device, and transmits test results to host computer through communication circuit 06.

[0108] The present invention also proposes a testing method, such as Figure 3 As shown, based on the above-mentioned testing device, the testing method includes:

[0109] S100: According to the instruction received from the host computer, the control mode switching circuit 04 connects the path between the test pin card 01 and the DC test circuit 02;

[0110] The host computer sends instructions to the main control circuit 05 of the test system according to the test requirements. After receiving the instructions from the host computer, the main control circuit 05 controls the mode switching circuit 04 to prepare. The mode switching circuit 04 is a circuit used to switch the path between different test circuits and the test pin card 01.

[0111] According to the instruction of the host computer, the main control circuit 05 controls the mode switching circuit 04 to connect the path between the test pin card 01 and the DC test circuit 02 .

[0112] S200: Entering the DC test process, the DC test circuit 02 performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs the first test data, which is uploaded to the host computer;

[0113] The DC test circuit 02 receives the control signal from the main control circuit 05 and starts to enter the DC test process. The DC test circuit 02 performs a DC test on the storage die to be tested. During the test, the DC test circuit 02 collects and processes the test data.

[0114] After the DC test is completed, the DC test circuit 02 outputs the first test data to the main control circuit 05, and the main control circuit 05 uploads the first test data to the host computer for further analysis and processing to select the storage Die with faults.

[0115] S300: Complete the DC test process based on the storage Die to be tested, and control the mode switching circuit 04 to connect the path between the test pin card 01 and the AC test circuit 03 according to the instruction received from the host computer;

[0116] After completing the DC test process based on the storage die to be tested, the faulty storage die has been selected. Since the DC test mainly focuses on the static electrical characteristics of the chip, these characteristics are the basis for the normal operation of the chip. If the chip has a fault in the DC test stage, the subsequent AC test may not accurately reflect the actual performance of the chip, and may even cause damage to the test equipment. Therefore, performing a DC test first can eliminate those basic electrical faults that may cause the chip to not work properly. Therefore, it is necessary to perform an AC test after confirming that the chip has passed the DC test to further verify the performance of the chip at high frequency or actual operating speed. Afterwards, the host computer sends an instruction to the main control circuit 05, requesting to enter the AC test stage. The main control circuit 05 controls the mode switching circuit 04 to connect the path between the test pin card 01 and the AC test circuit 03.

[0117] S400: Entering the AC test process, the AC test circuit 03 performs a low-frequency signal AC test on the storage Die to be tested according to the received control signal and outputs the second test data, which is uploaded to the host computer.

[0118] The AC test circuit 03 receives the control signal from the main control circuit 05 and starts to enter the AC test process. The AC test circuit 03 performs an AC test on the storage die to be tested. During the test, the AC test circuit 03 collects and processes the test data. After the AC test is completed, the AC test circuit 03 outputs the second test data to the main control circuit 05, and the main control circuit 05 uploads the second test data to the host computer for further analysis and processing to select the storage die with potential problems.

[0119] In one embodiment of the test method, the DC test process is entered, and the DC test circuit 02 performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs the first test data, and the specific steps of uploading the first test data to the host computer include:

[0120] Enter the DC test process, and perform voltage test, impedance test, forward current test, negative current test, open and short circuit test, power consumption test and leakage current test on the storage Die to be tested according to the received control signal, output voltage test data, impedance test data, forward current test data, negative current test data, open and short circuit test data, power consumption test data and leakage current test data, and upload them to the host computer.

[0121] Among them, the voltage test circuit applies a specific voltage to the storage die, measures its response, and outputs voltage test data, including the applied voltage value, the actual voltage response of the storage die, etc.

[0122] The impedance test circuit calculates the impedance of the storage die by injecting current into it and measuring the resulting voltage change, and outputs impedance test data, including impedance value, phase angle, etc.

[0123] The forward current test circuit applies voltage in the forward direction of the memory die (e.g., from the positive pole to the negative pole of the power supply) and measures the current flowing through it. The forward current test data is output, including the current value and its change over time.

[0124] The negative current test circuit applies voltage in the negative direction of the storage die (such as from the negative pole of the power supply to the positive pole) and measures the current flowing through. The output negative current test data also includes the current value and its change over time.

[0125] The open-short circuit test circuit checks whether there is an open circuit (non-conductive) or short circuit (abnormal conductive) inside the memory die. It outputs open-short circuit test data to indicate which parts have open circuit or short circuit problems.

[0126] The power consumption test circuit measures the power consumed by the memory die under specific conditions and outputs power consumption test data, including power value and its change over time.

[0127] The leakage current test circuit measures the leakage current of the storage die when it is not in operation.

[0128] Output leakage current test data, including leakage current value and its stability, etc.

[0129] After completing all the above tests, the main control circuit 05 will upload the collected voltage test data, impedance test data, forward current test data, negative current test data, open and short circuit test data, power consumption test data and leakage current test data to the host computer.

[0130] In one embodiment, the AC test process is entered, and the AC test circuit 03 performs a high-frequency signal AC test on the storage Die to be tested according to the received control signal and outputs the second test data, and the specific steps of uploading the second test data to the host computer include:

[0131] Enter the AC test process, perform Function test, EFT test, Timing test, eye diagram test and different rate test on the storage Die to be tested according to the received control signal, output Function test data, EFT test data, Timing test data, eye diagram test data and different rate test data, and upload them to the host computer.

[0132] The function test circuit verifies whether the basic functions of the storage die work as expected, including read and write operations, data integrity checks, etc. It outputs function test data, such as read and write success rate, error rate, etc.

[0133] The EFT test circuit evaluates the tolerance of memory die to fast transient electrical interference. It tests the robustness of memory die by simulating fast-changing voltage or current pulses. It outputs EFT test data such as failure rate, failure mode, etc.

[0134] The Timing test circuit measures the timing parameters of the memory die in various operations, including read and write delays, clock cycles, etc. It outputs Timing test data, such as the comparison between the actual timing value and the specification value.

[0135] The eye diagram test circuit evaluates the quality of the storage die output signal. By observing the waveform and phase relationship of the signal, the stability and integrity of the signal during transmission are determined. The eye diagram test data is output, such as the eye diagram opening size, jitter, etc.

[0136] The different rate test circuit tests the performance of storage die at different data transmission rates. Verifies the stability and compatibility of storage die at different rates. Outputs different rate test data, such as read and write speed, error rate, etc. at each rate.

[0137] After completing all the above tests, the main control circuit 05 will upload the collected Function test data, EFT test data, Timing test data, Eye diagram test data and different rate test data to the host computer. Through these AC tests, the AC characteristics of the storage die can be fully understood, including its functional integrity, electrical tolerance, timing characteristics, signal quality and performance at different rates.

[0138] The above descriptions are only optional embodiments of the present invention, and are not intended to limit the patent scope of the present invention. All equivalent structural changes made using the contents of the present invention's specification and drawings, or directly / indirectly applied in other related technical fields, are included in the patent protection scope of the present invention.

Claims

1. A testing device, characterized in that: include: Test pin card, used to place the storage die to be tested; A DC test circuit, used for performing a DC test of a low-frequency signal on the storage die to be tested and outputting first test data; the DC test includes a low-frequency test for checking the DC electrical characteristics of the storage die; An AC test circuit is used to perform an AC test of a high-frequency signal on the storage die to be tested and output second test data; the AC test includes a high-frequency test for checking the AC signal quality and timing parameters of the storage die; A mode switching circuit, wherein a common end of the mode switching circuit is electrically connected to a test pin card, a first input end of the mode switching circuit is electrically connected to a DC test circuit, and a second input end of the mode switching circuit is electrically connected to an AC test circuit; the mode switching circuit is used to switch on / off the connection between the DC test circuit and the AC test circuit and the test pin card; the mode switching circuit includes a high-speed electronic relay array; The main control circuit is respectively connected to the controlled ends of the DC test circuit, the AC test circuit and the mode switching circuit; the main control circuit is used to receive and output a control signal to the mode switching circuit according to the instruction of the host computer, so as to control the mode switching circuit to connect the path between the test pin card and the DC test circuit, or to connect the path between the test pin card and the AC test circuit; the main control circuit is also used to control the DC test circuit to work when the test pin card is connected to the DC test circuit, so as to obtain the first test data and upload it to the host computer; and, when the test pin card is connected to the AC test circuit, control the AC test circuit to work to obtain the second test data and upload it to the host computer.

2. The testing device according to claim 1, characterized in that: The main control circuit is also used to control the mode switching circuit to connect the path between the test pin card and the DC test circuit according to the instructions of the host computer to complete the DC test of the storage Die to be tested, and then control the mode switching circuit to connect the path between the test pin card and the DC test circuit to complete the AC test of the storage Die to be tested.

3. The testing device according to claim 1, characterized in that: The common end of each high-speed electronic relay in the high-speed electronic relay array is electrically connected to the test pin card, the first input end of each high-speed electronic relay is electrically connected to the DC test circuit, and the second input end of each high-speed electronic relay is electrically connected to the AC test circuit.

4. The testing device according to claim 1, characterized in that: The DC test circuit includes a voltage test circuit, an impedance test circuit, a positive current test circuit, a negative current test circuit, an open-short circuit test circuit, a power consumption test circuit and a leakage current test circuit, which are electrically connected to the mode switching circuit and the main control circuit respectively; The voltage test circuit is used to provide different voltages to the storage Die to be tested and detect the output voltage of the storage Die to be tested to obtain voltage test data; The impedance test circuit is used to measure the impedance characteristics of the input and output pins and the internal circuit of the storage Die to be tested according to the test program of the DC program storage circuit to obtain impedance test data; The forward current test circuit is used to provide a forward current to the storage die to be tested and detect the current magnitude of the input and output pins of the storage die to be tested to obtain forward current test data; The negative current test circuit is used to provide a negative positive current to the storage die to be tested and detect the current magnitude of the input and output pins of the storage die to be tested to obtain negative current test data; The open-short circuit test circuit is used to measure the storage Die pin to be tested according to the test program of the DC program storage circuit to obtain open-short circuit test data; The power consumption test circuit is used to measure the power consumption value of the storage die to be tested under different working conditions according to the test program of the DC program storage circuit to obtain power consumption test data; The leakage current testing circuit provides a certain voltage to the storage die to be tested and detects the current value of the storage die to be tested in a turned-off or low-level state to obtain leakage current testing data.

5. The testing device according to claim 4, characterized in that: The testing device also includes: A DC program storage circuit for storing a test program; A DC control circuit, the DC control circuit is electrically connected to the first test circuit and the main control circuit; the DC control circuit is used to receive a control signal output by the main control circuit to drive the first test circuit to test the storage Die and output the first test data; A first PMU circuit, wherein the first PMU circuit is electrically connected to the first test circuit; the first PMU circuit is used for power management of the first test circuit; The first serial port communication circuit is electrically connected to the first test circuit and the main control circuit; the first serial port communication circuit is used for data transmission between the first test circuit and the main control circuit.

6. The testing device according to claim 1, characterized in that: The AC test circuit includes a Function test circuit, an EFT test circuit, a Timing test circuit, an eye diagram test circuit and a different rate test circuit which are electrically connected to the mode switching circuit and the main control circuit respectively; The Function test circuit is used to write and read the storage Die to be tested according to the test program of the AC program storage circuit, and compare whether the read and written programs are consistent to obtain Function test data; The EFT test circuit is used to measure the tolerance of the tested storage die to fast transient electromagnetic interference according to the test program of the AC program storage circuit to obtain EFT test data; The timing test circuit is used to perform write and read programs on the storage die to be tested according to the test program of the AC program storage circuit, and measure the parameters of the storage die to be tested under different operating conditions to obtain timing test data; The eye diagram test circuit is used to capture the storage Die output signal to be tested and generate an eye diagram according to the test program of the AC program storage circuit, and analyze the eye diagram to obtain eye diagram test data; The different rate test circuit is used to measure the performance of the storage die to be tested at different rates according to the test program of the AC program storage circuit to obtain different rate test data.

7. The testing device according to claim 6, characterized in that: The testing device also includes: AC program storage circuit, used for storing test programs; An AC control circuit, the AC control circuit electrically connecting the second test circuit and the main control circuit; the AC control circuit is used to receive a control signal output by the main control circuit to drive the second test circuit to test the storage Die and output second test data; a second PMU circuit, the second PMU circuit being electrically connected to the second test circuit; the second PMU circuit being used for power management of the second test circuit; The second serial port communication circuit is electrically connected to the second test circuit and the main control circuit; the second serial port communication circuit is used for data transmission between the second test circuit and the main control circuit.

8. A testing system, characterized in that: It comprises a host computer, a communication circuit and a test device as claimed in any one of claims 1 to 7; A communication circuit electrically connects the main control circuit and the host computer; the communication circuit is used for communication between the main control circuit and the host computer.

9. A testing method, characterized in that: Based on the testing device according to any one of claims 1 to 7, the testing method comprises: According to the instruction received from the host computer, the control mode switching circuit connects the path between the test pin card and the DC test circuit; Entering the DC test process, the DC test circuit performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs the first test data, which is uploaded to the host computer; Complete the DC test process based on the storage Die to be tested, and control the mode switching circuit to connect the path between the test pin card and the AC test circuit according to the instructions received from the host computer; Entering the AC test process, the AC test circuit performs an AC test of a high-frequency signal on the storage Die to be tested according to the received control signal and outputs second test data, which is uploaded to the host computer.

10. The testing method according to claim 9, characterized in that: The specific steps of entering the DC test process, wherein the DC test circuit performs a low-frequency signal DC test on the storage Die to be tested according to the received control signal and outputs the first test data, and uploads the first test data to the host computer include: Enter the DC test process, and perform voltage test, impedance test, positive current test, negative current test, open-short circuit test, power consumption test and leakage current test on the storage Die to be tested according to the received control signal, output voltage test data, impedance test data, positive current test data, negative current test data, open-short circuit test data, power consumption test data and leakage current test data, and upload them to the host computer; And / or, the AC test process is entered, the AC test circuit performs a high-frequency signal AC test on the storage Die to be tested according to the received control signal and outputs the second test data, and the specific steps of uploading the second test data to the host computer include: Enter the AC test process, perform Function test, EFT test, Timing test, eye diagram test and different rate test on the storage Die to be tested according to the received control signal, output Function test data, EFT test data, Timing test data, eye diagram test data and different rate test data, and upload them to the host computer.

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