Manufacturing method of semiconductor structure and etching device

By forming a groove with interval streaming in the substrate and the plasma treatment and filtering of the etching gas, the problem of inconsistent heights of the target layer in different width grooves in the memory in the memory is solved, and the reliability of the target layer is improved.

CN119381259APending Publication Date: 2025-01-28RUILI INTEGRATED CIRCUIT CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202310894490.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-07-19
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

During the memory formation process, the reliability of the target layer in the groove with different widths is difficult to ensure, resulting in inconsistent height of the target layer in the groove.

Method used

通过在衬底内形成沿第一方向间隔排布的第一凹槽及第二凹槽,形成待刻蚀层,并对刻蚀气体进行等离子体处理和过滤,去除部分正电荷离子,以平衡 Different width grooves to the etching rate of etching layers.

Benefits of technology

The top surface height consistency of the target layer in the groove in different width grooves is improved, and the reliability of the target layer is enhanced.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119381259A_ABST
    Figure CN119381259A_ABST
Patent Text Reader

Abstract

The embodiment of the invention relates to the field of semiconductors, and provides a manufacturing method of a semiconductor structure and an etching device.The manufacturing method of the semiconductor structure comprises the steps that a substrate is provided, a first groove and a second groove are formed in the substrate at intervals in the first direction, and the width of the first groove is larger than that of the second groove in the first direction; forming a layer to be etched, wherein the first groove and the second groove are filled with the layer to be etched; providing etching gas and performing plasma treatment on the etching gas to form free radicals and positive charge ions; filtering the free radicals and the positive charge ions to at least remove a part of positive charge ions; and after the filtering treatment, the free radicals reach the surface of the to-be-etched layer to etch the to-be-etched layer, the residual to-be-etched layer serves as the target layer, and the top surface of the target layer is lower than the top surface of the substrate, so that the reliability of the formed target layer can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The disclosed embodiments relate to the semiconductor field, and in particular to a method for manufacturing a semiconductor structure and an etching device. Background Art

[0002] Memory is a memory component used to store programs and various data information. The random access memory (RAM) used in general computer systems can be divided into two types: dynamic random access memory (DRAM) and static random access memory (SRAM). Dynamic random access memory is a commonly used semiconductor memory device in computers, consisting of many repeated storage units.

[0003] In the process of forming a memory, grooves with different widths are often formed, and in the process of forming a target layer in these grooves, it is necessary to improve the reliability of the formed target layer. Summary of the invention

[0004] The embodiments of the present disclosure provide a method for manufacturing a semiconductor structure, which can at least improve the reliability of a formed target layer.

[0005] According to some embodiments of the present disclosure, on the one hand, an embodiment of the present disclosure provides a method for manufacturing a semiconductor structure, including: providing a substrate, wherein the substrate has a first groove and a second groove arranged at intervals along a first direction, and along the first direction, the width of the first groove is greater than the width of the second groove; forming a layer to be etched, the layer to be etched fills the first groove and the second groove; providing an etching gas and performing plasma treatment on the etching gas to form free radicals and positively charged ions; filtering the free radicals and the positively charged ions to at least remove a portion of the positively charged ions; after the filtering treatment, the free radicals reach the surface of the layer to be etched to etch the layer to be etched, and the remaining layer to be etched serves as a target layer, and the top surface of the target layer is lower than the top surface of the substrate.

[0006] In some embodiments, the filtering process includes: providing a filter plate, wherein the filter plate has through holes penetrating the filter plate, and the free radicals reach the surface of the layer to be etched through the through holes.

[0007] In some embodiments, the filter plate includes an upper plate and a lower plate, the upper plate has a first through hole passing through the upper plate, the lower plate has a second through hole passing through the lower plate, and the orthographic projection of the first through hole on the lower plate is staggered from the second through hole; the filtering process includes: passing the free radicals and the positively charged ions into the surface of the upper plate, and the free radicals reach the surface of the layer to be etched through the second through hole.

[0008] In some embodiments, the filter plate includes an upper plate and a lower plate, the upper plate has a first through hole passing through the upper plate, the lower plate has a second through hole passing through the lower plate, and the orthographic projection of the first through hole on the surface of the lower plate partially overlaps with the second through hole; the filtering process includes: passing the free radicals and the positively charged ions into the surface of the upper plate, and the free radicals reach the surface of the layer to be etched through the second through hole.

[0009] In some embodiments, the projection area of ​​the first through hole and the second through hole on the substrate surface that is located in the first groove and overlaps is a first area, and the projection area of ​​the first through hole and the second through hole on the substrate surface that is located in the second groove and overlaps is a second area, and the first area is less than or equal to the second area.

[0010] In some embodiments, the projection area of ​​the first through hole and the second through hole on the substrate surface that is located in the first groove and overlaps is a first area, the filter plate exposes the entire top surface of the second groove, and the first area is less than or equal to the area of ​​the second groove on the substrate.

[0011] In some embodiments, the process of etching the layer to be etched further includes: detecting the depth of etching the layer to be etched, and moving the upper plate and the lower plate to change the relative position of the first through hole and the second through hole.

[0012] In some embodiments, after etching the layer to be etched, a height difference between a top surface of the target layer located in the first groove and a top surface of the target layer located in the second groove is within a preset range.

[0013] In some embodiments, the process of etching the layer to be etched further includes: impurity removal treatment to remove impurities generated during the process of etching the layer to be etched.

[0014] According to some embodiments of the present disclosure, on the other hand, an etching device is provided, comprising: a chamber, wherein the chamber is used to carry a substrate; a gas supply mechanism, wherein the gas supply mechanism is located above the chamber and directly opposite to the substrate, and is used to provide etching gas; a conversion mechanism, wherein the conversion mechanism is located between the gas supply mechanism and the chamber, and is used to perform plasma treatment on the etching gas to form free radicals and positively charged ions; and a filter plate, wherein the filter plate is located between the conversion mechanism and the chamber, and is used to filter the free radicals and the positively charged ions to remove at least a portion of the positively charged ions.

[0015] In some embodiments, the filter plate has through holes penetrating the filter plate, and the free radicals reach the surface of the substrate through the through holes.

[0016] In some embodiments, the filter plate includes an upper plate and a lower plate, the upper plate has a first through hole passing through the upper plate, the lower plate has a second through hole passing through the lower plate, and the orthographic projection of the first through hole on the lower plate is staggered with the second through hole.

[0017] In some embodiments, the filter plate includes an upper plate and a lower plate, the upper plate has a first through hole passing through the upper plate, the lower plate has a second through hole passing through the lower plate, and the orthographic projection of the first through hole on the surface of the lower plate partially overlaps with the second through hole.

[0018] In some embodiments, the substrate includes a layer to be etched, the free radicals are used to etch the layer to be etched, and the etching device also includes: a detection device, the detection device is used to detect the depth of etching the layer to be etched, and move the upper plate and the lower plate according to the detection result to change the relative position of the first through hole and the second through hole.

[0019] In some embodiments, the substrate includes a layer to be etched, the free radicals are used to etch the layer to be etched, and the etching device also includes: a pumping device, the pumping device is located in the chamber and on the side of the substrate away from the gas providing mechanism, and the pumping device is used to extract gas impurities generated during the etching of the layer to be etched.

[0020] The technical solution provided by the embodiments of the present disclosure has at least the following advantages: a first groove and a second groove arranged at intervals along a first direction are formed in the substrate, thereby providing a process basis for the subsequent formation of a target layer, and the reliability of forming the target layer can be improved by forming a layer to be etched and etching the layer to be etched to form a target layer, and by plasma treatment of the etching gas and filtering the formed free radicals and positively charged ions, the difference in the bombardment of the surfaces of grooves of different widths with positively charged ions can be reduced, thereby balancing the etching rates of the layer to be etched in the first grooves and the second grooves of different widths, thereby reducing the height difference of the top surface of the target layer in the first grooves and the second grooves of different widths, and improving the reliability of the formed target layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings, and these exemplified descriptions do not constitute a limitation on the embodiments. Unless otherwise specified, the pictures in the drawings do not constitute a scale limitation. In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the traditional technology, the drawings required for use in the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figures 1 to 7 A schematic structural diagram corresponding to each step of a method for manufacturing a semiconductor structure provided by an embodiment of the present disclosure;

[0023] Figure 8 A schematic diagram of the structure of a first etching device provided in an embodiment of the present disclosure

[0024] Fig. 9 A schematic structural diagram of a second etching device provided in an embodiment of the present disclosure;

[0025] Fig.10 A schematic structural diagram of a third etching device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0026] From the background technology, it can be known that in the current plasma etching process, due to the width difference between the first groove and the second groove, more etching ions bombard the first groove with a larger width, resulting in a faster etching rate of the layer to be etched in the first groove. Therefore, in the same time, more of the layer to be etched in the first groove is etched, resulting in the final target layer located in the first groove and the target layer located in the second groove having inconsistent heights.

[0027] The present disclosure provides a method for manufacturing a semiconductor structure, which provides a process basis for subsequently forming a target layer by forming a first groove and a second groove arranged at intervals along a first direction in a substrate, and improves the reliability of forming the target layer by forming a layer to be etched and etching the layer to be etched to form the target layer. The etching gas is subjected to plasma treatment and the formed free radicals and positively charged ions are filtered, so that the difference in the bombardment of the surfaces of grooves with different widths with positively charged ions can be reduced, so as to balance the etching rates of the layer to be etched in the first grooves and the second grooves with different widths, so as to reduce the height difference of the top surface of the target layer in the first grooves and the second grooves with different widths, and improve the reliability of the formed target layer.

[0028] The following will describe the various embodiments of the present disclosure in detail with reference to the accompanying drawings. However, it will be appreciated by those skilled in the art that in the various embodiments of the present disclosure, many technical details are provided in order to enable the reader to better understand the present disclosure. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in the present disclosure can be implemented.

[0029] refer to Figures 1 to 7 , Figures 1 to 7 A schematic structural diagram corresponding to each step of a semiconductor structure manufacturing method provided by an embodiment of the present disclosure.

[0030] In some embodiments, a method for manufacturing a semiconductor structure may include: providing a substrate 100 , wherein the substrate 100 has first grooves 110 and second grooves 120 arranged at intervals along a first direction X, and along the first direction X, the width of the first groove 110 is greater than the width of the second groove 120 .

[0031] The method for manufacturing a semiconductor structure may further include: forming a layer to be etched 130 , wherein the layer to be etched 130 fills the first groove 110 and the second groove 120 .

[0032] The method for manufacturing a semiconductor structure may further include: providing an etching gas and performing plasma treatment on the etching gas to form free radicals and positively charged ions.

[0033] The method for manufacturing a semiconductor structure may further include: filtering the free radicals and positively charged ions to remove at least a portion of the positively charged ions.

[0034] The method for manufacturing a semiconductor structure may further include: after filtering, free radicals reach the surface of the layer to be etched 130 to etch the layer to be etched 130 , and the remaining layer to be etched 130 serves as a target layer 140 , and the top surface of the target layer 140 is lower than the top surface of the substrate 100 .

[0035] By forming the first grooves 110 and the second grooves 120 arranged at intervals along the first direction X in the substrate 100, a process basis is provided for the subsequent formation of the target layer 140. By forming the layer to be etched 130, the reliability of forming the target layer 140 by etching the layer to be etched 130 can be improved. By performing plasma treatment on the etching gas and then filtering the formed free radicals and positively charged ions, the difference in the bombardment of the positively charged ions on the surfaces of the grooves with different widths can be reduced, so as to balance the etching rates of the layer to be etched 130 in the first grooves 110 and the second grooves 120 with different widths, so as to reduce the height difference of the top surface of the target layer 140 in the first grooves 110 and the second grooves 120 with different widths, and improve the reliability of the formed target layer 140.

[0036] refer to Figure 1 In some embodiments, the material of the substrate 100 may include a semiconductor material, such as but not limited to silicon. In some embodiments, the substrate 100 may include: a basic semiconductor, a compound semiconductor, or an alloy semiconductor. For example, the basic semiconductor includes germanium; the compound semiconductor includes silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, and / or III-V semiconductor materials, etc.; the alloy semiconductor includes silicon germanium, silicon germanium carbide, germanium tin, silicon germanium tin, gallium arsenic phosphide, gallium indium phosphide, gallium indium arsenide, indium gallium arsenide phosphide, aluminum indium arsenide, and / or aluminum gallium arsenide, etc. In some embodiments, the substrate 100 may also be a silicon-on-insulator structure, a silicon-germanium-on-insulator structure, a germanium-on-insulator structure, or a combination thereof.

[0037] In addition, the substrate 100 may be doped according to design requirements (eg, a P-type substrate or an N-type substrate). In some embodiments, the substrate 100 may be doped with P-type doping ions (eg, boron ions, aluminum ions) or N-type doping ions (eg, phosphorus ions, arsenic ions).

[0038] The first groove 110 and the second groove 120 may be formed by etching the substrate 100 , and the width of the first groove 110 is greater than the width of the second groove 120 .

[0039] refer to Figure 2 and Figure 3 In some embodiments, a to-be-etched layer 130 is formed in the first groove 110 and the second groove 120 to fill the first groove 110 and the second groove 120 , and the formation of the to-be-etched layer 130 provides a process basis for the subsequent formation of the target layer 140 .

[0040] In some embodiments, the method of forming the layer to be etched 130 may include: forming an initial layer to be etched 131, the initial layer to be etched 131 not only filling the first groove 110 and the second groove 120, but also covering the surface of the substrate 100, that is, the top surface of the initial layer to be etched 131 is higher than the top surface of the substrate 100; back etching the initial layer to be etched 131 so that the top surface of the remaining initial layer to be etched 131 is flush with the top surface of the substrate 100, and the remaining initial layer to be etched 131 serves as the layer to be etched 130.

[0041] In some embodiments, the layer to be etched 130 can be used to form a word line, and the first groove 110 and the second groove 120 are trenches for forming a word line.

[0042] In some embodiments, the layer to be etched 130 is used to form a word line. Before forming the layer to be etched 130 , the process may further include: forming an insulating layer 150 , wherein the insulating layer 150 is located between the substrate 100 and the layer to be etched 130 , thereby avoiding direct contact between the layer to be etched 130 and the substrate 100 .

[0043] In some embodiments, the insulating layer 150 may be made of insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride.

[0044] In some embodiments, the material of the layer to be etched 130 may be a metal material, such as tungsten, copper, or silver, etc.; in some embodiments, the layer to be etched 130 may also be other conductive materials or insulating materials, etc.

[0045] In some embodiments, after the etching gas is subjected to plasma treatment, the gas molecules form free radicals and positively charged ions in the plasma. After being accelerated by the ion field, the positively charged ions bombard the surface of the layer to be etched 130. If no filtering treatment is performed, due to the small width of the second groove 120, some of the positively charged ions will bombard the surface of the substrate 100, causing these positively charged ions to be reflected. Due to the large width of the first groove 110, this will cause more positively charged ions bombarding the top surface of the layer to be etched 130 in the first groove 110 than bombarding the top surface of the layer to be etched in the second groove 110. 20, which will cause the etching rate of the layer to be etched 130 in the first groove 110 to be faster than the etching rate of the layer to be etched 130 in the second groove 120, and will cause the thickness of the layer to be etched in the first groove 110 to be greater than the thickness of the layer to be etched in the second groove 120 within the same time. In this way, the top surface of the target layer 140 formed in the first groove 110 will be lower than the top surface of the target layer 140 formed in the second groove 120, thereby reducing the reliability of forming the target layer 140.

[0046] The embodiment of the present disclosure removes at least a portion of the positively charged ions through filtering treatment, thereby reducing the difference between the etching rate of the layer to be etched 130 in the first groove 110 and the etching rate of the layer to be etched 130 in the second groove 120, thereby reducing the height difference between the top surface of the target layer 140 formed in the first groove 110 and the top surface of the target layer 140 formed in the second groove 120, thereby improving the reliability of forming the target layer 140.

[0047] refer to Figure 4 In some embodiments, the filtering process may include: providing a filter plate 160, wherein the filter plate 160 has a through hole 161 penetrating the filter plate 160, and the free radicals reach the surface of the layer to be etched 130 through the through hole 161. The filter plate 160 can reduce the positively charged ions bombarding the surface of the layer to be etched 130 in the first groove 110, and can reduce the positively charged ions bombarding the surface of the layer to be etched 130 in the second groove 120, so that the difference between etching the layer to be etched 130 in the first groove 110 and etching the layer to be etched 130 in the second groove 120 can be reduced, so that the height difference between the top surface of the target layer 140 formed in the first groove 110 and the top surface of the target layer 140 formed in the second groove 120 can be reduced, so that the reliability of forming the target layer 140 can be improved.

[0048] In some embodiments, the filter plate 160 can be a metal plate that can adsorb positively charged ions, such as an aluminum plate. The aluminum plate adsorbs positively charged ions, thereby reducing the positively charged ions bombarding the surface of the layer to be etched 130 through the filter plate 160, thereby reducing the impact of the positively charged ions on the etching of the layer to be etched 130, thereby reducing the difference between the layer to be etched 130 in the first groove 110 and the layer to be etched in the second groove 120.

[0049] refer to Figure 5In some embodiments, the filter plate 160 may include an upper plate 170 and a lower plate 180, the upper plate 170 having a first through hole 171 penetrating the upper plate 170, the lower plate 180 having a second through hole 181 penetrating the lower plate 180, and the orthographic projection of the first through hole 171 on the lower plate 180 is staggered with the second through hole 181; the filtering process includes: introducing free radicals and positively charged ions into the surface of the upper plate 170, and the free radicals reach the surface of the layer 130 to be etched through the second through hole 181. In other words, the first through hole 171 of the upper plate 170 and the second through hole of the lower plate 180 are completely staggered in the direction from the upper plate 170 to the lower plate 180. With such a configuration, when free radicals and positively charged ions are introduced into the surface of the upper plate 170, some of the positively charged ions will bombard the surface of the upper plate 170 and then be reflected, and the free radicals will pass through the upper plate 170 through the first through hole 171, and the positively charged ions passing through the first through hole 171 will bombard the surface of the lower plate 180 and be reflected again, and the free radicals will pass through the lower plate 180 through the second through hole 181, thereby etching the layer to be etched 130. By staggering the orthographic projection of the first through hole 171 on the lower plate 180 with the second through hole 181, the positively charged ions can be further filtered out, thereby reducing the difference between etching the layer to be etched 130 in the first groove 110 and etching the layer to be etched 130 in the second groove 120.

[0050] In some embodiments, the upper plate 170 and the lower plate 180 can also be metal plates that can adsorb positively charged ions, such as aluminum plates, so that the positively charged ions can be further filtered out through reflection and adsorption, thereby further reducing the difference between the layer to be etched 130 in the first groove 110 and the layer to be etched 130 in the second groove 120.

[0051] refer to Figure 6In some embodiments, the filter plate 160 may include an upper plate 170 and a lower plate 180, the upper plate 170 having a first through hole 171 penetrating the upper plate 170, the lower plate 180 having a second through hole 181 penetrating the lower plate 180, and the orthographic projection of the first through hole 171 on the lower plate 180 partially overlaps with the second through hole 181; the filtering process includes: introducing free radicals and positively charged ions into the surface of the upper plate 170, and the free radicals reach the surface of the layer 130 to be etched through the second through hole 181. In other words, the first through hole 171 of the upper plate 170 and the second through hole of the lower plate 180 are not completely staggered in the direction from the upper plate 170 to the lower plate 180. With such a configuration, when free radicals and positively charged ions enter the surface of the upper plate 170, some of the positively charged ions will bombard the surface of the upper plate 170 and then be reflected, and the free radicals will pass through the upper plate 170 through the first through hole 171, and some of the positively charged ions passing through the first through hole 171 will bombard the surface of the lower plate 180 and be reflected again, while the free radicals will pass through the lower plate 180 through the second through hole 181, thereby etching the layer 130 to be etched, which can still filter out the positively charged ions and reduce the difference between etching the layer 130 to be etched in the first groove 110 and etching the layer 130 to be etched in the second groove 120.

[0052] In some embodiments, the projection area of ​​the first through hole 171 and the second through hole 181 on the surface of the substrate 100, which is located in the first groove 110 and overlaps, is the first area, and the projection area of ​​the first through hole 171 and the second through hole 181 on the surface of the substrate 100, which is located in the second groove 120 and overlaps, is the second area, and the first area is less than or equal to the second area. In other words, the first area is the area in which the positively charged ions incident vertically on the surface of the substrate 100 can pass through the filter plate 160 and bombard the first groove 110, and the second area is the area in which the positively charged ions incident vertically on the surface of the substrate 100 can pass through the filter plate 160 and bombard the second groove 120. It can be understood that the positively charged ions passed into the surface of the upper plate 170 include not only the positively charged ions incident perpendicularly to the surface of the substrate 100, but also a part of the positively charged ions with a certain incident angle, and the positively charged ions passing through the filter plate 160 also include the positively charged ions incident perpendicularly and the positively charged ions with a certain incident angle, and the positively charged ions incident perpendicularly can directly bombard the surface of the layer to be etched 130, and some of the positively charged ions with a certain incident angle may bombard the surface of the substrate 100 and then be reflected. Therefore, even if the density of the positively charged ions incident toward the first groove 110 and the density of the positively charged ions incident toward the second groove 120 are the same, the positively charged ions that ultimately bombard the surface of the layer to be etched 130 located in the first groove 110 may still be greater than the positively charged ions that ultimately bombard the surface of the layer to be etched 130 located in the second groove 120. Therefore, by setting the first area equal to the second area, the difference between the layer to be etched 130 in the first groove 110 and the layer to be etched 130 in the second groove 120 can be reduced. By setting the first area smaller than the second area, the difference between the layer to be etched 130 in the first groove 110 and the layer to be etched 130 in the second groove 120 can be further reduced.

[0053] It should be noted that the density of positively charged ions here refers to the number of incident positively charged ions per unit time and per unit area.

[0054] In some embodiments, the ratio of the first area to the second area may be 1 / 3 to 1. It is understood that the smaller the ratio of the first area to the second area, the smaller the difference between the number of positively charged ions with an incident angle bombarding the layer 130 to be etched in the first groove 110 and the number of positively charged ions with an incident angle bombarding the layer 130 to be etched in the second groove 120, and the smaller the ratio of the first area to the second area, the greater the difference between the number of layers to be etched vertically incident in the first groove 110 and the number of layers to be etched vertically incident in the second groove 120. By setting the ratio of the first area to the second area to be 1 / 3 to 1, the difference in etching rate between etching the layer 130 to be etched in the first groove 110 and etching the layer 130 to be etched in the second groove 120 can be well balanced.

[0055] In some embodiments, the projection area of ​​the first through hole 171 and the second through hole 181 on the surface of the substrate 100, which is located in the first groove 110 and overlaps, is the first area, the filter plate 160 exposes the entire top surface of the second groove 120, and the first area is less than or equal to the area of ​​the second groove 120 projected on the substrate 100. In other words, the filter plate 160 covers part of the top surface of the first groove 110 and exposes the entire top surface of the second groove 120, thereby reducing the number of positively charged ions incident into the first groove 110, thereby reducing the etching rate of the layer to be etched 130 in the first groove 110. By setting the first area equal to the area of ​​the orthographic projection of the second groove 120 on the substrate 100, the difference between the number of positively charged ions vertically incident into the first groove 110 and the number of positively charged ions vertically incident into the second groove 120 can be reduced; by setting the first area smaller than the area of ​​the orthographic projection of the second groove 120 on the substrate 100, the difference between the number of positively charged ions with an incident angle bombarding the layer to be etched 130 in the first groove 110 and the number of positively charged ions with an incident angle bombarding the layer to be etched 130 in the second groove 120 can be reduced.

[0056] In some embodiments, the ratio of the first area to the area of ​​the orthographic projection of the second groove 120 on the substrate 100 may be 1 / 3 to 1. It can be understood that, the smaller the ratio of the first area to the area of ​​the orthographic projection of the second groove 120 on the substrate 100, the smaller the difference between the number of positively charged ions with an incident angle bombarding the layer 130 to be etched in the first groove 110 and the number of positively charged ions with an incident angle bombarding the layer 130 to be etched in the second groove 120, and the smaller the ratio of the first area to the area of ​​the orthographic projection of the second groove 120 on the substrate 100, the greater the difference between the number of layers to be etched vertically incident in the first groove 110 and the number of layers to be etched vertically incident in the second groove 120. By setting the ratio of the first area to the area of ​​the orthographic projection of the second groove 120 on the substrate 100 to 1 / 3 to 1, the difference in etching rate between etching the layer 130 to be etched in the first groove 110 and etching the layer 130 to be etched in the second groove 120 can be well balanced.

[0057] In some embodiments, the process of etching the layer to be etched 130 also includes: detecting the depth of etching the layer to be etched 130, and moving the upper plate 170 and the lower plate 180 to change the relative position of the first through hole 171 and the second through hole 181. For example, during the detection process, it is found that the depth of etching the layer to be etched 130 in the first groove 110 is deeper than the depth of etching the layer to be etched 130 in the second groove 120, indicating that the etching rate in the first groove 110 is faster. By moving the upper plate 170 and the lower plate 180, the projection area of ​​the first through hole 171 and the second through hole 181 on the surface of the substrate 100, which is located in the first groove 110 and overlaps, is reduced, thereby reducing the number of positively charged ions incident into the first groove 110, so as to reduce the etching rate of the layer to be etched 130 in the first groove 110. Similarly, the projection areas of the first through hole 171 and the second through hole 181 on the surface of the substrate 100 that are located in the second groove 120 and overlap each other can be increased to increase the etching rate of the to-be-etched layer 130 in the second groove 120 .

[0058] In some embodiments, after etching the to-be-etched layer 130, the height difference between the top surface of the target layer 140 located in the first groove 110 and the top surface of the target layer 140 located in the second groove 120 is within a preset range. By controlling the height difference between the top surface of the target layer 140 located in the first groove 110 and the top surface of the target layer 140 located in the second groove 120 to be within the preset range, the reliability of the formed target layer 140 can be improved, and the reliability of the formed semiconductor structure can be further increased.

[0059] In some embodiments, the preset range may be less than 5 nm. When the height difference between the top surface of the target layer 140 located in the first groove 110 and the top surface of the target layer 140 located in the second groove 120 is less than 5 nm, the height difference between the top surface of the target layer 140 located in the first groove 110 and the top surface of the target layer 140 located in the second groove 120 is deemed to be within the preset range.

[0060] In some embodiments, the gas pressure of the entire etching process can be reduced to increase the molecular mean free path, so that the etching gas can freely diffuse to the bottom of the first groove 110 and the second groove 120 with a high aspect ratio. For example, the ambient gas pressure of the etching process can be reduced to 4mT-7mT.

[0061] It should be noted that the high aspect ratio here may refer to a depth:width greater than or equal to 10:1.

[0062] In some embodiments, the process of etching the layer to be etched 130 further includes: impurity removal treatment to remove impurities generated during the process of etching the layer to be etched 130. The impurities generated during the process of etching the layer to be etched 130 can be removed by the impurity removal treatment, thereby preventing these impurities from affecting the quality of the formed target layer 140, and preventing these impurities from adhering to the surface of the semiconductor structure and affecting subsequent semiconductor processes.

[0063] In some embodiments, the impurity removal process may be a pumping process, which can maintain the air pressure of the environment during the entire etching process on the one hand, and extract the impurities generated during the etching process on the other hand, thereby improving the reliability of the semiconductor structure manufacturing method.

[0064] In some embodiments, the etching process may further include: increasing the ambient temperature of the etching process, thereby accelerating the impurity removal rate in the impurity removal process and improving the reliability of the entire semiconductor structure manufacturing method. For example, the ambient temperature of the etching process may be increased to 70-90°C.

[0065] The embodiment of the present disclosure forms a first groove 110 and a second groove 120 arranged at intervals along a first direction X in a substrate 100, thereby providing a process basis for the subsequent formation of a target layer 140. By forming a layer to be etched 130 and etching the layer to be etched 130 to form the target layer 140, the reliability of forming the target layer 140 can be improved. By performing plasma treatment on the etching gas and then filtering the formed free radicals and positively charged ions, the difference in the bombardment of the surfaces of grooves with different widths with positively charged ions can be reduced, thereby balancing the etching rates of the layer to be etched 130 in the first grooves 110 and the second grooves 120 with different widths, thereby reducing the height difference of the top surface of the target layer 140 in the first grooves 110 and the second grooves 120 with different widths, and improving the reliability of the formed target layer 140.

[0066] Another embodiment of the present disclosure further provides an etching device, which can be used to implement the above-mentioned semiconductor structure manufacturing method. The etching device provided by another embodiment of the present disclosure will be described below in conjunction with the accompanying drawings. It should be noted that the same or corresponding parts of the above-mentioned embodiments can refer to the corresponding description of the above-mentioned embodiments and will not be repeated below.

[0067] refer to Figures 8 to 10 , Figure 8 A schematic structural diagram of a first etching device provided in an embodiment of the present disclosure; Fig. 9 A schematic diagram of the structure of a second etching device provided in an embodiment of the present disclosure, Fig.10 A schematic structural diagram of a third etching device provided in an embodiment of the present disclosure.

[0068] The etching device provided by the embodiment of the present disclosure includes: a chamber 200 , and the chamber 200 is used to carry a substrate 100 .

[0069] The etching device provided in the embodiment of the present disclosure further includes: a gas providing mechanism 210 , which is located above the chamber 200 and directly opposite to the substrate 100 , and is used to provide etching gas.

[0070] The etching device provided by the embodiment of the present disclosure further includes: a conversion mechanism 220, which is located between the gas providing mechanism 210 and the chamber 200 and is used to perform plasma treatment on the etching gas to form free radicals and positively charged ions.

[0071] The etching device provided by the embodiment of the present disclosure further includes: a filter plate 160, which is located between the conversion mechanism 220 and the chamber 200 and is used to filter free radicals and positively charged ions to at least remove a portion of the positively charged ions.

[0072] The embodiment of the present disclosure carries the substrate 100 through the chamber 200, provides etching gas through the gas providing mechanism, converts the etching gas into free radicals and positively charged ions through the conversion structure to realize subsequent etching treatment, removes at least part of the positively charged ions through the filter plate 160, thereby reducing the positively charged ions incident on the surface of the substrate 100, thereby improving the difference in etching rate of the film layer within the substrate 100 and improving the reliability of the semiconductor structure formed after etching.

[0073] refer to Figure 8 In some embodiments, the filter plate 160 has a through hole 161 penetrating the filter plate 160, and the free radicals reach the surface of the substrate 100 through the through hole 161. By providing the through hole 161 so that the free radicals can reach the surface of the substrate 100 through the through hole 161, the positively charged ions bombarded on the surface of the filter plate 160 are reflected to reduce the positively charged ions reaching the surface of the substrate 100 through the filter plate 160, thereby improving the difference in etching rate of the film layer in the substrate 100 and improving the reliability of the semiconductor structure formed after etching.

[0074] refer to Fig. 9 In some embodiments, the filter plate 160 includes an upper plate 170 and a lower plate 180, the upper plate 170 has a first through hole 171 passing through the upper plate 170, the lower plate 180 has a second through hole 181 passing through the lower plate 180, and the orthographic projection of the first through hole 171 on the lower plate 180 is staggered with the second through hole 181. In other words, the first through hole 171 of the upper plate 170 and the second through hole of the lower plate 180 are completely staggered in the direction from the upper plate 170 to the lower plate 180. With such a configuration, when free radicals and positively charged ions are introduced into the surface of the upper plate 170, some of the positively charged ions will bombard the surface of the upper plate 170 and then be reflected, while the free radicals will pass through the upper plate 170 through the first through hole 171, and the positively charged ions passing through the first through hole 171 will bombard the surface of the lower plate 180 and be reflected again, while the free radicals will pass through the lower plate 180 through the second through hole 181, thereby reaching the surface of the substrate 100. By staggering the orthographic projection of the first through hole 171 on the lower plate 180 with the second through hole 181, as many positively charged ions as possible can be filtered out, thereby improving the difference in etching rate of the film layer in the substrate 100 and improving the reliability of the semiconductor structure formed after etching.

[0075] refer to Fig.10In some embodiments, the filter plate 160 may include an upper plate 170 and a lower plate 180, the upper plate 170 having a first through hole 171 penetrating the upper plate 170, the lower plate 180 having a second through hole 181 penetrating the lower plate 180, and the orthographic projection of the first through hole 171 on the lower plate 180 partially overlaps with the second through hole 181. In other words, the first through hole 171 of the upper plate 170 and the second through hole 181 of the lower plate 180 are not completely staggered in the direction from the upper plate 170 to the lower plate 180. With such a configuration, when free radicals and positively charged ions are passed into the surface of the upper plate 170, some of the positively charged ions will bombard the surface of the upper plate 170 and then be reflected, while the free radicals pass through the upper plate 170 through the first through hole 171, and some of the positively charged ions passing through the first through hole 171 will bombard the surface of the lower plate 180 and be reflected again, while the free radicals pass through the lower plate 180 through the second through hole 181 to reach the surface of the substrate 100, which can still filter out the positively charged ions, thereby improving the difference in etching rate of the film layer within the substrate 100 and improving the reliability of the semiconductor structure formed after etching.

[0076] In some embodiments, the substrate 100 includes a layer to be etched, and free radicals are used to etch the layer to be etched. The etching device further includes: a detection device 230, and the detection device 230 is used to detect the depth of the etched layer to be etched, and move the upper plate 170 and the lower plate 180 according to the detection result to change the relative position of the first through hole 171 and the second through hole 181. For example, if it is found during the detection process that the depth of the etched part of the layer to be etched is deep and the depth of the etched part of the layer to be etched is shallow, the positive charge ions received by the part of the layer to be etched that is etched more deeply can be reduced, that is, the overlap area of ​​the first through hole 171 and the second through hole 181 on the top surface of the part of the layer to be etched more deeply can be reduced. Similarly, the positive charge ions received by the part of the layer to be etched that is etched less shallowly can also be selected, that is, the overlap area of ​​the first through hole 171 and the second through hole 181 on the top surface of the part of the layer to be etched less shallow can be increased. By detecting with the detection device 230 and moving the upper plate 170 and the lower plate 180, the etching rate of the layer to be etched can be adjusted in real time, thereby improving the difference in the etching rate of the layer to be etched and improving the reliability of the semiconductor structure formed after etching.

[0077] In some embodiments, the substrate 100 includes a layer to be etched, free radicals are used to etch the layer to be etched, and the etching device also includes: a pumping device 240, the pumping device 240 is located in the chamber 200, and is located on the side of the substrate 100 away from the gas providing mechanism 210, the pumping device 240 is used to extract gas impurities generated during the etching of the layer to be etched. The pumping device 240 can maintain the gas pressure in the chamber 200 stable on the one hand, and can also extract the generated gas impurities on the other hand to avoid the deposition of these impurities and affect the reliability of the formed semiconductor structure.

[0078] Those skilled in the art can understand that the above-mentioned embodiments are specific examples for implementing the present disclosure, and in practical applications, various changes can be made to them in form and detail without departing from the spirit and scope of the embodiments of the present disclosure. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present disclosure, so the protection scope of the embodiments of the present disclosure shall be based on the scope defined in the claims.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: include: Providing a substrate, wherein the substrate has a first groove and a second groove arranged at intervals along a first direction, and along the first direction, the width of the first groove is greater than the width of the second groove; Forming a layer to be etched, wherein the layer to be etched fully fills the first groove and the second groove; providing an etching gas and subjecting the etching gas to plasma treatment to form free radicals and positively charged ions; Performing a filtering process on the free radicals and the positively charged ions to remove at least a portion of the positively charged ions; After the filtering process, the free radicals reach the surface of the layer to be etched to etch the layer to be etched, and the remaining layer to be etched serves as a target layer, and the top surface of the target layer is lower than the top surface of the substrate.

2. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The filtering process comprises: providing a filter plate, wherein the filter plate has through holes penetrating the filter plate, and the free radicals reach the surface of the layer to be etched through the through holes.

3. The method for manufacturing a semiconductor structure according to claim 2, characterized in that: The filter plate comprises an upper plate and a lower plate, the upper plate has a first through hole penetrating the upper plate, the lower plate has a second through hole penetrating the lower plate, and the orthographic projection of the first through hole on the lower plate is staggered with the second through hole; The filtering process includes: introducing the free radicals and the positively charged ions into the surface of the upper plate, and the free radicals reach the surface of the layer to be etched through the second through holes.

4. The method for manufacturing a semiconductor structure according to claim 2, characterized in that: The filter plate comprises an upper plate and a lower plate, the upper plate has a first through hole penetrating the upper plate, the lower plate has a second through hole penetrating the lower plate, and the orthographic projection of the first through hole on the surface of the lower plate partially overlaps with the second through hole; The filtering process includes: introducing the free radicals and the positively charged ions into the surface of the upper plate, and the free radicals reach the surface of the layer to be etched through the second through holes.

5. The method for manufacturing a semiconductor structure according to claim 4, characterized in that: The projection area of ​​the first through hole and the second through hole on the substrate surface, which is located in the first groove and overlaps with each other, is a first area, and the projection area of ​​the first through hole and the second through hole on the substrate surface, which is located in the second groove and overlaps with each other, is a second area, and the first area is less than or equal to the second area.

6. The method for manufacturing a semiconductor structure according to claim 4, characterized in that: The projection area of ​​the first through hole and the second through hole on the substrate surface that is located in the first groove and overlaps is a first area, the filter plate exposes the entire top surface of the second groove, and the first area is less than or equal to the area of ​​the second groove on the substrate.

7. The method for manufacturing a semiconductor structure according to claim 3 or 4, characterized in that: The process of etching the layer to be etched also includes: detecting the depth of etching the layer to be etched, and moving the upper plate and the lower plate to change the relative position of the first through hole and the second through hole.

8. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: After etching the layer to be etched, a height difference between a top surface of the target layer located in the first groove and a top surface of the target layer located in the second groove is within a preset range.

9. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The process of etching the layer to be etched also includes: impurity removal treatment to remove impurities generated during the process of etching the layer to be etched.

10. An etching device, characterized in that: include: A chamber, wherein the chamber is used to carry a substrate; A gas supply mechanism, located above the chamber and facing the substrate, for providing etching gas; A conversion mechanism, the conversion mechanism is located between the gas supply mechanism and the chamber, and is used to perform plasma treatment on the etching gas to form free radicals and positively charged ions; A filter plate is located between the conversion mechanism and the chamber, and is used for filtering the free radicals and the positively charged ions to remove at least a portion of the positively charged ions.

11. The etching device according to claim 10, characterized in that: The filter plate has through holes penetrating the filter plate, and the free radicals reach the surface of the substrate through the through holes.

12. The etching device according to claim 11, characterized in that: The filter plate comprises an upper plate and a lower plate, the upper plate has a first through hole penetrating the upper plate, the lower plate has a second through hole penetrating the lower plate, and the orthographic projection of the first through hole on the lower plate is staggered with the second through hole.

13. The etching device according to claim 11, characterized in that: The filter plate comprises an upper plate and a lower plate, the upper plate has a first through hole penetrating the upper plate, the lower plate has a second through hole penetrating the lower plate, and the orthographic projection of the first through hole on the surface of the lower plate partially overlaps with the second through hole.

14. The etching device according to claim 12 or 13, characterized in that: The substrate includes a layer to be etched, the free radicals are used to etch the layer to be etched, and the etching device further includes: A detection device is used to detect the depth of etching the layer to be etched, and move the upper plate and the lower plate according to the detection result to change the relative position of the first through hole and the second through hole.

15. The etching device according to claim 10, characterized in that: The substrate includes a layer to be etched, the free radicals are used to etch the layer to be etched, and the etching device further includes: A gas extraction device is located in the chamber and on a side of the substrate away from the gas providing mechanism, and is used to extract gas impurities generated during the etching of the layer to be etched.