Driving enhancement type fast outlet circuit and method suitable for relay protection device

By introducing pre -charging circuits in the export circuit of the Relayer Protection Device, the complexity and insufficient anti -interference capacity of driving signals and driving power in existing technologies have been solved, and fast and reliable export circuit performance is realized.

CN119382021APending Publication Date: 2025-01-28NARI TECH CO LTD
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Patent Information

Application Number
CN202411589277.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-08
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

When power semiconductor devices such as MOS tubes and IGBTs are used to replace electromagnetic relays, electromagnetic isolation between driving signals and driving power supplies leads to complex circuits and insufficient anti-interference capability, and the optical isolation driving circuit has insufficient driving capability in high current application scenarios. The problem.

Method used

It is proposed to be a driver -based reinforced rapid export circuit suitable for relay protection devices. Based on the combination of power semiconductor and electromagnetic relay combinations, pre -charging circuits are introduced to improve the instantaneous driving capacity of semiconductor The fastness, adaptability and reliability of the export circuit.

Benefits of technology

Simplified the loop of isolation power, enhanced the driving capacity, realized the simple circuit of the fast export circuit, good adaptability and high reliability, and can quickly respond to faults in the new power system.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a driving enhancement type fast outlet circuit and method suitable for a relay protection device. The driving enhancement type fast outlet circuit comprises an isolation driving and pre-charging circuit, a driving enabling control circuit and a semiconductor outlet circuit. The isolation driving and pre-charging circuit at least comprises a pre-charging capacitor; the semiconductor outlet circuit at least comprises a power semiconductor device; the first control signal controls the isolation driving and pre-charging circuit to supply power to the pre-charging capacitor; the output end of the isolation driving and pre-charging circuit is connected with the driving enabling circuit and the semiconductor outlet circuit; and the second control signal controls the drive enabling control circuit to enable the drive of the power semiconductor device in the semiconductor outlet circuit, so as to realize the turn-on and turn-off of the power semiconductor device.
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Description

Technical Field

[0001] The present invention belongs to the field of relay protection technology in the field of power secondary equipment protection and control, and specifically relates to a drive-enhanced fast exit circuit and method suitable for a relay protection device. Background Art

[0002] The speed of relay protection devices is the basis for rapid fault removal in power systems, and the protection action time is its key indicator. Further improving the speed of all links such as fault current collection and transmission, protection calculation, and export relay action is a new requirement for rapid protection under new power systems. New power system rapid protection devices need to improve their speed in all links. The export circuit is the last link, and electromagnetic relays are usually used as control nodes, and their action time is generally around 5 to 10ms. At present, it is a common practice to use power semiconductor devices such as MOS tubes and IGBTs to replace electromagnetic relays to shorten the export circuit action time, and the action time is less than 1ms.

[0003] When power semiconductor devices are used as output components of relay protection devices, the drive circuit is more complex than that of electromagnetic relays, requiring a dedicated isolated power supply and signal isolation circuit. The isolated power supply has a significant impact on the reliability of the output circuit. At the same time, the instantaneous drive energy required by large-capacity power semiconductor devices is also high. Simplifying the isolated power supply circuit and enhancing the drive capability are the difficulties in designing the drive circuit of power semiconductor devices.

[0004] In the existing related technical inventions, power semiconductor devices such as MOS tubes and IGBTs are used instead of electromagnetic relays to improve the rapidity of the output circuit. The main shortcomings include:

[0005] (1) The driving signal and driving power supply are electromagnetically isolated, the related circuits are complex, and the anti-interference ability is affected by the circuit design;

[0006] (2) The optical isolation driving circuit has insufficient driving capability. When large-capacity power semiconductors are required in high-current application scenarios, there are problems such as increased driving delay and high on-resistance. Summary of the invention

[0007] Purpose of the invention: In order to solve the problem of using power semiconductor devices such as MOS tubes and IGBTs instead of electromagnetic relays to improve the rapidity of the operation of the output circuit, the present invention proposes a drive-enhanced fast output circuit and method suitable for relay protection devices. On the basis of the fast output circuit combining power semiconductors and electromagnetic relays, a pre-charging circuit is proposed to improve the instantaneous driving capability of semiconductors, increase the conduction speed of power semiconductor devices, reduce the conduction loss of large current loops, and achieve the rapidity, adaptability and reliability of the output circuit.

[0008] Technical solution: A drive-enhanced fast exit circuit suitable for a relay protection device, comprising an isolation drive and pre-charging circuit, a drive enable control circuit and a semiconductor exit circuit; the isolation drive and pre-charging circuit comprises at least one pre-charging capacitor; the semiconductor exit circuit comprises at least one power semiconductor device;

[0009] The first control signal controls the isolation driving and precharging circuit to precharge the capacitor; the output end of the isolation driving and precharging circuit is connected to the driving enabling circuit and the semiconductor output circuit;

[0010] The second control signal controls the drive enable control circuit to enable the driving of the power semiconductor device in the semiconductor output circuit to realize the turning on and off of the power semiconductor device.

[0011] Further, the isolation drive and pre-charging circuit includes: a first current limiting resistor, a pull-down resistor, a transistor, a second current limiting resistor, an isolation driver and a pre-charging capacitor;

[0012] The first control signal is connected to the base of the transistor via a first current limiting resistor, the emitter of the transistor is grounded, the collector of the transistor is connected in series with the primary side of the isolation driver and then connected to an external power supply via a second current limiting resistor, the base of the transistor is grounded through a pull-down resistor, the pre-charge capacitor is connected to the drive enable circuit, and the output of the secondary side of the isolation driver is connected to the drive enable circuit and the semiconductor export circuit.

[0013] Further, the isolation drive and pre-charging circuit includes a first current limiting resistor, a pull-down resistor, a first MOSFET, a third current limiting resistor, a first isolation transformer, a pre-charging capacitor and a first diode;

[0014] The first control signal is connected to the gate of the first MOSFET via a first current limiting resistor, the source of the first MOSFET is grounded, the drain of the first MOSFET is connected in series with the primary side of the first isolation transformer and then connected to an external power supply via a second current limiting resistor, the gate of the first MOSFET is grounded through a pull-down resistor, the pre-charge capacitor is connected to the output of the secondary side of the first isolation transformer, and the output of the secondary side of the first isolation transformer is connected to the drive enable circuit and the semiconductor export circuit.

[0015] Furthermore, the drive enable control circuit includes: an RC delay circuit, a NOT gate and an isolation optocoupler. After the second control signal passes through the RC delay circuit, it passes through the NOT gate and the isolation optocoupler to control the conduction enable of the power semiconductor device in the semiconductor output circuit. The output of the isolation optocoupler is connected to the semiconductor output circuit.

[0016] Further, the drive enable control circuit includes: an RC delay circuit, a second MOSFET, a third MOSFET, a second isolation transformer and a second diode;

[0017] After passing through the RC delay circuit, the second control signal is connected to the gate of the second MOSFET, the source of the second MOSFET is grounded, the drain of the second MOSFET is connected in series to the primary side of the second isolation transformer and then to the external power supply; the second diode is connected in series to the secondary side of the second isolation transformer and connected to the gate of the third MOSFET, and the drain and source of the third MOSFET are connected to the semiconductor export circuit.

[0018] Furthermore, the semiconductor output circuit also includes a varistor; the drain and source of the power semiconductor device serve as output ends of the semiconductor output circuit, one end of the varistor is connected to the drain of the power semiconductor device, and the other end is connected to the source of the power semiconductor device.

[0019] Furthermore, the power semiconductor device is a single MOSFET, or a single IGBT, or is composed of two N-type MOSFETs or IGBTs connected in series back to back.

[0020] The present invention discloses a drive-enhanced quick exit method applicable to a relay protection device, comprising the following steps:

[0021] Building a drive-enhanced rapid exit circuit, wherein the drive-enhanced rapid exit circuit is a drive-enhanced rapid exit circuit disclosed above and applicable to a relay protection device;

[0022] Applying a first control signal to the isolation drive and pre-charging circuit to charge the pre-charging capacitor;

[0023] When the pre-charge capacitor is fully charged, a second control signal is applied to the drive enable control circuit, and the drive enable control circuit and the isolation drive and pre-charge circuit are used to enable the drive of the power semiconductor device in the semiconductor output circuit to realize the conduction and shutdown of the power semiconductor device.

[0024] Furthermore, by controlling the timing of the first control signal and the second control signal, the power semiconductor device in the semiconductor output circuit is turned on first and then turned off.

[0025] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0026] (1) The present invention has the advantages of simple circuit, good adaptability of fast exit circuit and high reliability; on the basis of the fast exit circuit of the power semiconductor and the electromagnetic relay, the instantaneous driving ability of the semiconductor can be greatly improved through a simple pre-charging circuit;

[0027] (2) The present invention relates to a fast-exit circuit control method based on enhanced drive of power semiconductor devices and non-isolated power supply, which greatly improves the instantaneous drive capability of semiconductors. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a structural diagram of a drive-enhanced fast exit circuit suitable for a relay protection device proposed by the present invention;

[0029] Figure 2 It is the structural diagram of the isolation drive and pre-charging circuit; Among them, Figure 2 (a) is a structural diagram of an isolation drive and pre-charging circuit suitable for low-frequency control signals; Figure 2 (b) is a structural diagram of an isolation drive and pre-charging circuit suitable for high-frequency control signals;

[0030] Figure 3 It is a structural diagram of the fast exit circuit drive enable control circuit; wherein, Figure 3 (a) is a structure diagram of a fast exit circuit drive enable control circuit using fast optocoupler isolation; Figure 3 (b) is a structure diagram of a fast exit circuit drive enable control circuit using transformer isolation;

[0031] Figure 4 A semiconductor output circuit structure diagram suitable for an output node with direct current;

[0032] Figure 5 It is a control timing diagram of the drive enhanced fast exit circuit suitable for relay protection devices. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention clearer, the following will further explain a drive-enhanced fast exit circuit and method suitable for a relay protection device proposed in the present invention in conjunction with the accompanying drawings in the present invention.

[0034] like Figure 1 As shown, this embodiment proposes a drive-enhanced fast exit circuit suitable for a relay protection device, which mainly includes an isolation drive and pre-charging circuit 1, a drive enable control circuit 2 and a semiconductor exit circuit 3. The isolation drive and pre-charging circuit 1, the drive enable control circuit 2 and the semiconductor exit circuit 3 are connected in sequence, and the control signal RUN and the control signal TZ&QD respectively control the pre-charging and drive enable of the drive circuit, thereby controlling the opening node of the MOSFETQ2 in the semiconductor exit circuit 3, thereby realizing the conduction or shutdown of the exit node.

[0035] Figure 2 The isolation driving and precharging circuit 1 is shown. In this embodiment, there are two implementation modes of the isolation driving and precharging circuit 1: the first one is as follows: Figure 2 (a) adopts the optocoupler isolation drive mode, which is suitable for the output circuit of low-frequency control signals; the second type is Figure 2 (b) in the figure adopts pulse transformer isolation driving mode, which is suitable for the export circuit of high-frequency control signals.

[0036] in, Figure 2 The structure of the isolation drive and pre-charging circuit 1 shown in (a) is as follows: it includes a first current limiting resistor R1, a pull-down resistor R2, a transistor Q1, a second current limiting resistor R3, an isolation driver U1, a pre-charging capacitor C1 and an external power supply 5V. The isolation driver U1 is a photoelectric isolation driver. Optionally, the photoelectric isolation driver can be used but not limited to Broadcom's ACPL-K308U. The first control signal is connected to the base of the transistor Q1 via the first current limiting resistor R1, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected in series with the primary side of the isolation driver U1, and then connected to the external power supply 5V via the second current limiting resistor R3. The pre-charging capacitor C1 is connected to the output of the isolation optocoupler U3 in the drive enable circuit, and the output end of the secondary side of the isolation driver U1 is connected to the drive enable circuit 2 and the semiconductor output circuit 3.

[0037] in, Figure 2 The structure of the isolation drive and pre-charging circuit 1 shown in (b) is as follows: it includes a first current limiting resistor R1, a pull-down resistor R2, a first MOSFET Q1, a second current limiting resistor R3, a first isolation transformer T1, a pre-charging capacitor C1, a first diode D1 and an external power supply 5V. The first control signal is connected to the gate of the first MOSFET Q1 via the first current limiting resistor R1, the source of the first MOSFET Q1 is grounded, the drain of the first MOSFET Q1 is connected in series with the primary side of the first isolation transformer T1 and then connected to the external power supply 5V via the second current limiting resistor R3, the gate of the first MOSFET Q1 is grounded through the pull-down resistor R2, the pre-charging capacitor C1 is connected to the output of the secondary side of the first isolation transformer T1, and the output of the secondary side of the first isolation transformer T1 is connected to the drive enable circuit 2 and the semiconductor export circuit 3.

[0038] Figure 3 The driving enable control circuit 2 is shown. In this embodiment, there are two implementation modes of the driving enable control circuit 2: the first one is as follows: Figure 3 As shown in (a), a high-speed optocoupler is used, which is suitable for the output circuit of low-frequency control signals; Figure 3 As shown in (b), a pulse transformer enabling method is adopted, which is suitable for the export circuit of high-frequency control signals.

[0039] in, Figure 3The structure of the driving enable circuit 2 shown in (a) is as follows: it includes a first resistor R4, a first capacitor C2, a NOT gate U2, a second resistor R5, an isolation optocoupler U3 and an external power supply 5V, the first capacitor C2 and the second resistor R5 form an RC delay circuit, and the isolation optocoupler U3 is connected to the external power supply through the second resistor R5. After the second control signal passes through the RC delay circuit, it controls the conduction enable of the power semiconductor device in the semiconductor output circuit 3 through the NOT gate U2 and the isolation optocoupler U3, and the output of the driving enable circuit is connected to the semiconductor output circuit 4.

[0040] in, Figure 3 The structure of the drive enable circuit 2 shown in (b) is as follows: it includes a first resistor R4, a first capacitor C2, a second MOSFET Q1a, a third MOSFET Q2a, a second resistor R5, an isolation transformer T1, a second diode D2 and an external power supply 5V. The first capacitor C2 and the second resistor R5 constitute an RC delay circuit. The primary side of the isolation transformer T1 is connected to the external power supply 5V through the first resistor R4. After the second control signal passes through the RC delay circuit, it controls the conduction of the third MOSFET Q2a through the second MOSFET Q1a and the isolation transformer T1, thereby controlling the conduction of the power semiconductor device in the semiconductor export circuit 3. The output of the drive enable circuit is connected to the semiconductor export circuit 4.

[0041] Figure 4 The structure of the semiconductor output circuit 3 is shown as follows: it includes a third resistor R6, a fourth MOSFET Q2 and a varistor RV, the drain D and source S of the MOSFET Q2 serve as the two ends of the open circuit, connected to the two ends of the relay output contacts, and the varistor RV is used to prevent the drain D and source S of the fourth MOSFET Q2 from breaking down; wherein the fourth MOSFET Q2 can be replaced with a power semiconductor device such as an IGBT. Figure 4 In single MOS mode, the outlet node is unidirectionally conductive, which is suitable for the case where the outlet node is DC. This drive circuit is also suitable for back-to-back MOS mode, using two N-type MOSFETs in reverse series, and the outlet node can be bidirectionally conductive, which is suitable for the case where the outlet node is DC or AC. It can also be constructed by using two IGBTs in back-to-back series.

[0042] The first control signal RUN charges the pre-charge capacitor C1 by controlling the isolation drive and pre-charge circuit 1. When the pre-charge capacitor C1 is fully charged, the second control signal TZ&QD is used to enable the driving of the power semiconductor device in the semiconductor export circuit 3, thereby realizing the rapid conduction and shutdown of the power semiconductor device in the semiconductor export circuit 3. The power semiconductor device has a strong rapid switching capability, so the rapid conduction of the export node can be realized; the power semiconductor node can be turned on first and then turned off through the control timing of the control signal.

[0043] Combine the following Figure 5 The working principle of the drive-enhanced fast exit circuit for the relay protection device of this embodiment is further introduced.

[0044] When a fault occurs in the power system, the control signal sent by the relay protection device processor changes from low level to high level at time t3 to control the conduction of the export node, and changes from high level to low level at time t5 to control the shutdown of the export node. The conduction process and shutdown process of the export node are analyzed in detail below.

[0045] (1) The control signal becomes high

[0046] For the power semiconductor device control circuit, at time t1, the first control signal RUN changes from low level to high level, the transistor Q1 is turned on, the primary side of the isolation driver U1 is turned on, the secondary side of the isolation driver U1 outputs a high level, and the pre-charge capacitor C1 starts to charge. At time t2, the pre-charge capacitor C1 is fully charged. The delay of the transistor Q1 is in nanoseconds and can be ignored. The turn-on delay of the isolation driver U1 is △t_U1_on=200us.

[0047] (2) Capacitor pre-charging

[0048] After the isolation driver U1 is turned on, it starts to charge the pre-charge capacitor C1. The charging time of C1 is: Δt_charge = ΔU*C 1 / I charge In the formula, △U is the value of the pre-charge capacitor C1 after it is fully charged, and △U=8V; I charge is the charging current, which is 70uA; the capacitance of the pre-charging capacitor C1 needs to be much larger than the input capacitance of the transistor, taking C1 = 3.3nF, the charging time is: Δt_charge = 8*0.0033 / 70 = 377us.

[0049] Therefore, the delay from the first control signal becoming high to the pre-charge capacitor C1 being fully charged is: △t1=△t_U1_on+△t_charege=577us.

[0050] (3)Drive enable

[0051] For the drive enable control circuit 2, at time t3, the second control signal TZ&Q changes from a low level to a high level, and the primary side of the isolation optocoupler U3 is turned on. The delay of the isolation optocoupler U3 is generally a few us. Taking the TLP621 used in this embodiment as an example, the turn-on delay of the isolation optocoupler U3 is △t_U3_on=50us. If a transformer is used to achieve isolation enable, the delay can be ignored. Since the pre-charge capacitor C1 is much larger than the input capacitance of the MOS, the drive pole of the MOS will quickly become high, and the delay here can be basically ignored.

[0052] For the relay control circuit, after the control signal changes from low level to high level, the electromagnetic relay conduction delay is 5ms. Therefore, the conduction delay of the electromagnetic relay output node S1 is △t2 = 5ms.

[0053] If the second control signals TZ & QD are controlled independently of the control signal RUN, the delay of the second control signals TZ & QD relative to the control signal RUN needs to be between (△t1 + △t_U3_on) and △t2, that is: 0.627ms <td<5ms。

[0054] If the second control signal TZ&QD and the first control signal RUN use the same signal, a delay circuit may also be used to implement this.

[0055] Therefore, this embodiment can realize that the DS of the fourth MOSFET Q2 is turned on first and the relay output contact is turned on later.

[0056] (4) Shutdown process

[0057] For the relay control circuit, after the relay control signal changes from high level to low level at time t5, the electromagnetic relay shut-off delay is about 10ms. Therefore, the shut-off delay of the electromagnetic relay output node is △t3 = 10ms.

[0058] For the power semiconductor device control circuit, it can be implemented directly through the first control signal RUN, or through the delay of the relay control signal, which needs to satisfy △t4≥10ms, so that the electromagnetic relay output contact S1 is turned off first, and the MOSFET Q2 DS is turned off later, and the output node shutdown delay can be adjusted according to demand.

Claims

1. A drive-enhanced fast exit circuit suitable for a relay protection device, characterized in that: It includes an isolation drive and pre-charging circuit, a drive enable control circuit and a semiconductor output circuit; the isolation drive and pre-charging circuit includes at least one pre-charging capacitor; the semiconductor output circuit includes at least one power semiconductor device; The first control signal controls the isolation drive and pre-charging circuit to pre-charge the capacitor; The output end of the isolation driving and precharging circuit is connected to the driving enabling circuit and the semiconductor output circuit; The second control signal controls the drive enable control circuit to enable the driving of the power semiconductor device in the semiconductor output circuit to realize the turning on and off of the power semiconductor device.

2. A drive-enhanced fast exit circuit suitable for a relay protection device according to claim 1, characterized in that: The isolation drive and pre-charging circuit comprises: a first current limiting resistor, a pull-down resistor, a transistor, a second current limiting resistor, an isolation driver and a pre-charging capacitor; The first control signal is connected to the base of the transistor via a first current limiting resistor, the emitter of the transistor is grounded, the collector of the transistor is connected in series with the primary side of the isolation driver and then connected to an external power supply via a second current limiting resistor, the base of the transistor is grounded through a pull-down resistor, the pre-charge capacitor is connected to the drive enable circuit, and the output of the secondary side of the isolation driver is connected to the drive enable circuit and the semiconductor export circuit.

3. A drive-enhanced fast exit circuit suitable for a relay protection device according to claim 1, characterized in that: The isolation drive and pre-charging circuit includes a first current limiting resistor, a pull-down resistor, a first MOSFET, a third current limiting resistor, a first isolation transformer, a pre-charging capacitor and a first diode; The first control signal is connected to the gate of the first MOSFET via a first current limiting resistor, the source of the first MOSFET is grounded, the drain of the first MOSFET is connected in series with the primary side of the first isolation transformer and then connected to an external power supply via a second current limiting resistor, the gate of the first MOSFET is grounded through a pull-down resistor, the pre-charge capacitor is connected to the output of the secondary side of the first isolation transformer, and the output of the secondary side of the first isolation transformer is connected to the drive enable circuit and the semiconductor export circuit.

4. The drive-enhanced fast exit circuit suitable for a relay protection device according to claim 1, characterized in that: The drive enable control circuit includes: an RC delay circuit, a NOT gate and an isolation optocoupler. After the second control signal passes through the RC delay circuit, it passes through the NOT gate and the isolation optocoupler to control the conduction enable of the power semiconductor device in the semiconductor output circuit. The output of the isolation optocoupler is connected to the semiconductor output circuit.

5. The drive-enhanced fast exit circuit suitable for a relay protection device according to claim 1, characterized in that: The drive enable control circuit includes: an RC delay circuit, a second MOSFET, a third MOSFET, a second isolation transformer and a second diode; After passing through the RC delay circuit, the second control signal is connected to the gate of the second MOSFET, the source of the second MOSFET is grounded, the drain of the second MOSFET is connected in series to the primary side of the second isolation transformer and then to the external power supply; the second diode is connected in series to the secondary side of the second isolation transformer and connected to the gate of the third MOSFET, and the drain and source of the third MOSFET are connected to the semiconductor export circuit.

6. A drive-enhanced fast exit circuit suitable for a relay protection device according to claim 1, characterized in that: The semiconductor output circuit also includes a varistor; the drain and source of the power semiconductor device serve as output ends of the semiconductor output circuit, one end of the varistor is connected to the drain of the power semiconductor device, and the other end is connected to the source of the power semiconductor device.

7. A drive-enhanced fast exit circuit suitable for a relay protection device according to claim 6, characterized in that: The power semiconductor device is a single MOSFET or a single IGBT, or is composed of two N-type MOSFETs or IGBTs connected in series back to back.

8. A drive-enhanced rapid exit method suitable for a relay protection device, characterized in that: The following steps are involved: Building a drive-enhanced rapid exit circuit, wherein the drive-enhanced rapid exit circuit is a drive-enhanced rapid exit circuit applicable to a relay protection device as claimed in any one of claims 1 to 7; Applying a first control signal to the isolation drive and pre-charging circuit to charge the pre-charging capacitor; When the pre-charge capacitor is fully charged, a second control signal is applied to the drive enable control circuit, and the drive enable control circuit and the isolation drive and pre-charge circuit are used to enable the drive of the power semiconductor device in the semiconductor output circuit to realize the conduction and shutdown of the power semiconductor device.

9. A drive-enhanced rapid exit method applicable to a relay protection device according to claim 8, characterized in that: Through the control timing of the first control signal and the second control signal, the power semiconductor device in the semiconductor output circuit is turned on first and then turned off.