Chip working frequency adjusting method and device, chip and equipment

Abstract

The embodiment of the invention relates to the technical field of chips, and discloses a chip working frequency adjusting method and device, a chip and equipment, and the method comprises the steps: obtaining a first count value of the center frequency of an oscillator in the chip in a previous working period when the chip is in an interruption state; the first count value is a preset value; and randomly adjusting the first count value based on a preset adjustment precision requirement range of the center frequency of the oscillator to obtain a second count value, and adjusting the center frequency of the oscillator according to the second count value to obtain the working frequency of the chip in the next working period. According to the chip working frequency adjusting method disclosed by the invention, the problem that the radiation energy of the chip exceeds the standard requirement or the allowance is insufficient is solved, so that the frequency of a high-frequency oscillator in the chip fluctuates up and down at the center frequency, and the energy radiated at the frequency doubling position is reduced, so that the purpose of dispersing the energy of the radiation peak frequency band is achieved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of chip technology, and in particular to a chip operating frequency adjustment method, device, chip and equipment. Background Art

[0002] With the development of science and technology and the improvement of people's living standards, electronic products have become an indispensable part of people's daily lives. However, while electronic products bring convenience to people's lives, they can also cause harm to people's health due to electromagnetic radiation.

[0003] Existing household appliances fail radiation tests. The radiation values ​​of the unqualified frequency bands exceed the standard requirements or have insufficient margins. By observing the radiation curve, it is found that all peak frequency bands are the frequency multiplication of the high-frequency oscillator inside the chip, resulting in radiation values ​​exceeding the standard requirements or insufficient margins. In order to prevent electromagnetic radiation from causing harm to the human body, it is necessary to control the circuit operating frequency of electronic products so that electronic products produce less radiation. However, the traditional electromagnetic radiation control method adjusts the circuit operating frequency of electronic products in a fixed manner, and does not take into account the radiation energy brought by the chip's own operating frequency, resulting in radiation values ​​still exceeding standard requirements. Summary of the invention

[0004] The purpose of the present invention is to at least provide a chip operating frequency adjustment method, device, chip and equipment, which can at least solve the problem that the chip radiation energy exceeds the standard requirements or the margin is insufficient, and at least achieve the purpose of dispersing the radiation peak frequency band energy.

[0005] To solve the above technical problems, at least one embodiment of the present application provides a chip operating frequency adjustment method, comprising: When the chip is in an interrupt state, obtaining a first count value of the oscillator center frequency in the chip in the previous working cycle; the first count value is a pre-set value; Based on a preset adjustment accuracy requirement range of the oscillator center frequency, the first count value is randomly adjusted to obtain a second count value, and the oscillator center frequency is adjusted according to the second count value to obtain the operating frequency of the chip in the next working cycle.

[0006] At least one embodiment of the present application further provides a chip operating frequency adjustment device, including: A data acquisition module, used for acquiring a first count value of the center frequency of the oscillator in the chip in the last working cycle; the first count value is a pre-set value; A random value acquisition module, configured to randomly adjust the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value; The frequency adjustment module is used to adjust the center frequency of the oscillator according to the second count value to obtain the operating frequency of the chip in the next working cycle.

[0007] At least one embodiment of the present application further provides a chip, comprising the above-mentioned chip operating frequency adjustment device.

[0008] At least one embodiment of the present application also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the above-mentioned chip operating frequency adjustment method.

[0009] At least one embodiment of the present application further provides a computer-readable storage medium storing a computer program, wherein the computer program implements the above-mentioned chip operating frequency adjustment method when executed by a processor.

[0010] The chip operating frequency adjustment method, device, chip and equipment provided by the embodiments of the present application randomly adjust the first count value when the chip is interrupted, so that the oscillator center frequency is adjusted by using the second count value obtained by the random adjustment, so that the chip operating frequency in the next working cycle is provided by the adjusted oscillator center frequency, thereby causing the high-frequency oscillator frequency inside the chip to fluctuate around the center frequency, dispersing the radiation peak energy near the main frequency, superimposing the interference in places with sufficient margin, and reducing the energy radiated at the multiplier to achieve the purpose of dispersing the radiation peak frequency band energy; at the same time, randomly adjusting the frequency can not only distribute the energy more evenly to a wide frequency band, thereby further reducing the peak radiation at a single frequency point, but also because the frequency change is random, it can make it difficult for external interference sources to predict and lock specific frequency points, thereby improving the system's anti-interference ability and security; at the same time, random frequency jitter makes the system more flexible in different working environments, can better adapt to the environment where multiple devices coexist, and reduce mutual interference between devices.

[0011] In some optional embodiments, the randomly adjusting the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain the second count value includes: Based on a preset adjustment accuracy requirement range of the oscillator center frequency, determining a count value adjustment amplitude that meets the adjustment accuracy requirement range; Determining an adjustment interval of the count value in a current interruption period according to the count value adjustment amplitude and the first count value; The second count value is randomly generated from within an adjustment interval of the count value.

[0012] In some optional embodiments, determining the adjustment interval of the count value in the current interruption period according to the count value adjustment amplitude and the first count value includes: The positive and negative boundary values ​​of the counting value adjustment amplitude are added to the first counting value respectively to determine the maximum and minimum values ​​of the counting value in the current interruption cycle; and the adjustment interval of the counting value is generated using the maximum and minimum values ​​of the counting value as boundaries.

[0013] In some optional embodiments, randomly generating the second count value from within the adjustment interval of the count value includes: randomly generating the second count value from within the adjustment interval of the count value using a random function; Wherein, the random function includes: f= (rand() % (Fmax - Fmin + 1)) + Fmin; Wherein, f is the second count value; rand() is a random function in C language; Fmax is the maximum boundary value of the adjustment interval of the count value; Fmin is the minimum boundary value of the adjustment interval of the count value In some optional embodiments, the randomly adjusting the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value, and adjusting the oscillator center frequency according to the second count value includes: Based on a preset adjustment accuracy requirement range of the oscillator center frequency, the first count value is repeatedly randomly adjusted to obtain a second count value, and the oscillator center frequency is adjusted according to the second randomly obtained count value until the interruption ends, and the oscillator center frequency obtained by the last random adjustment before the interruption ends is used as the operating frequency of the chip in the next working cycle.

[0014] In some optional embodiments, the method further comprises: during power-on initialization of the chip, enabling a timer interrupt and setting an interrupt cycle.

[0015] In some optional embodiments, the method further includes: During the power-on initialization process of the chip, reading the first count value from the register; After obtaining the second count value, the second count value is stored in the register as the first count value to be obtained in the next interrupt cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by the pictures in the corresponding drawings, and these exemplary descriptions do not constitute limitations on the embodiments.

[0017] Figure 1 This is a process of a chip operating frequency adjustment method provided by an embodiment of the present application Figure 1 ; Figure 2 This is a process of a chip operating frequency adjustment method provided by an embodiment of the present application Figure 2 ; Figure 3 This is a process of a chip operating frequency adjustment method provided by an embodiment of the present application Figure 3 ; Figure 4 This is a process of a chip operating frequency adjustment method provided by an embodiment of the present application Figure 4 ; Figure 5 This is a process of a chip operating frequency adjustment method provided by an embodiment of the present application Figure 5 ; Figure 6 is a schematic diagram of a chip operating frequency adjustment device provided by another embodiment of the present application; Figure 7 It is a schematic diagram of the structure of an electronic device provided by another embodiment of the present application. DETAILED DESCRIPTION

[0018] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not be construed as any limitation, and the various embodiments can be combined and referenced with each other under the premise of no contradiction.

[0019] In order to facilitate understanding of the embodiments of the present application, relevant content about radiation from household appliances is first introduced here.

[0020] With the development of science and technology and the improvement of people's living standards, electronic products have become an indispensable part of people's daily lives. However, while electronic products bring convenience to people's lives, they can also cause harm to people's health due to electromagnetic radiation.

[0021] Existing household appliances fail the radiation test. The radiation value of the unqualified frequency band exceeds the standard requirements or the margin is insufficient. Observing the radiation curve, it is found that all peak frequency bands are the frequency multiplication of the high-frequency oscillator inside the chip, resulting in the radiation value exceeding the standard requirements or insufficient margin. In order to prevent electromagnetic radiation from causing harm to the human body, it is necessary to control the circuit operating frequency of electronic products so that electronic products produce less radiation. However, the traditional electromagnetic radiation control method adjusts the circuit operating frequency of electronic products in a fixed way, and does not take into account the radiation energy brought by the chip's own operating frequency, resulting in the radiation value still exceeding the standard requirements or insufficient margin.

[0022] In order to solve the technical problem that the radiation energy of the above-mentioned chip exceeds the standard requirements or the margin is insufficient, the present invention proposes a chip operating frequency adjustment method. The implementation details of the chip operating frequency adjustment method of this embodiment are specifically described below. The following content is only the implementation details provided for the convenience of understanding and is not necessary for the implementation of this solution.

[0023] Embodiment 1: The chip operating frequency adjustment method of this embodiment can be applied to electronic devices with communication, computing and data storage capabilities. The specific process can be as follows: Figure 1 As shown, steps 101-103 are included, specifically including: Step 101, when the chip is in an interrupt state, obtaining a first count value of the center frequency of an oscillator in the chip in the previous working cycle; the first count value is a pre-set value.

[0024] Specifically, the chip has the function of adjusting the internal oscillator frequency; wherein, the chip has a built-in register, the register is used to store the first count value of the oscillator center frequency in the chip, and when the chip is interrupted, the first count value of the oscillator center frequency in the chip in the previous working cycle is read from the register.

[0025] Furthermore, there is a corresponding change ratio between the count value and the center frequency, the count value is an integer, and when the count value changes by 1, the frequency changes by a percentage corresponding to the change ratio.

[0026] In some examples, the chip uses the Saiyuan chip SC92F8463B, and the internal high-frequency oscillator frequency is 24MHz. When the first count value of the chip's oscillator center frequency changes by 1, the corresponding oscillator center frequency changes by about 0.23%.

[0027] Step 102, based on a preset adjustment accuracy requirement range of the oscillator center frequency, randomly adjust the first count value to obtain a second count value; Specifically, the internal oscillator frequency of the chip affects the chip system clock and the clock of the chip peripheral functions. Based on the accuracy requirements of the chip system clock, the adjustment accuracy requirement range of the oscillator center frequency is preset so that the adjustment accuracy requirement range is always met during the random adjustment process, avoiding affecting the chip system clock and the clock of the chip peripheral functions.

[0028] Step 103 adjusts the oscillator center frequency according to the second count value to obtain the operating frequency of the chip in the next working cycle.

[0029] Specifically, when the chip interrupt state ends, the second count value is stored in a register as the first count value to be obtained in the next interrupt cycle.

[0030] In this embodiment, the oscillator center frequency is adjusted by the randomly generated second count value, so that the oscillator frequency inside the chip fluctuates around the center frequency, thereby dispersing the radiation peak energy near the main frequency, superimposing the interference in places with sufficient margin, reducing the energy radiated at the multiplier frequency, and achieving the purpose of dispersing the radiation peak frequency band energy. At the same time, since the second count value is random, the randomly changed frequency can more evenly distribute the energy to a wide frequency band, thereby further reducing the peak radiation at a single frequency point, making the distribution smoother and reducing the energy concentration at a specific frequency.

[0031] In some embodiments, before executing step 101, Figure 2 As shown, the method further includes: performing power-on initialization on the chip, and during the power-on initialization process of the chip, enabling a timing interrupt and setting an interrupt cycle.

[0032] The interruption period is recorded as T, that is, the first count value of the oscillator center frequency is changed once every T time.

[0033] Furthermore, the method also includes: during the power-on initialization process of the chip, reading the first count value from the register.

[0034] The first count value is stored in a register, so that the execution subject of the adjustment method can directly obtain the first count value of the oscillator center frequency from the register.

[0035] In some embodiments, step 102, such as Figure 3 As shown, specifically including: Step 201, based on a preset adjustment accuracy requirement range of the oscillator center frequency, determining a count value adjustment amplitude that meets the adjustment accuracy requirement range; Step 202: determining an adjustment interval of the count value in a current interruption cycle according to the count value adjustment amplitude and the first count value; Step 203: randomly generate the second count value from within the adjustment interval of the count value.

[0036] Specifically, the preset adjustment accuracy requirement range of the oscillator center frequency is determined by the accuracy of the actual application of the chip, so that under the premise of the adjustment accuracy requirement range, the count value adjustment amplitude that meets the adjustment accuracy requirement range is determined. In this embodiment, taking the adjustment accuracy requirement range of 1% of the oscillator center frequency as an example, if the frequency changes by about 0.23% for each change in the count value, the count value adjustment amplitude can be set to 4, so that the center frequency of the oscillator center frequency after the first count value is adjusted meets the accuracy requirement of 1%.

[0037] In some embodiments, after determining the count value adjustment amplitude, step 202 includes: adding the positive and negative boundary values ​​of the count value adjustment amplitude to the first count value respectively to determine the maximum and minimum values ​​of the count value in the current interrupt cycle; and generating the adjustment interval of the count value using the maximum and minimum values ​​of the count value as boundaries.

[0038] Further, step 203 includes: randomly generating the second count value from within the adjustment interval of the count value, including: randomly generating the second count value from within the adjustment interval of the count value using a random function; Wherein, the random function includes: f= (rand() % (Fmax - Fmin + 1)) + Fmin; In the formula, f is the second count value; rand() is a random function in C language; Fmax is the maximum boundary value of the adjustment interval of the count value; and Fmin is the minimum boundary value of the adjustment interval of the count value.

[0039] Specifically, the count value randomly generated by the random function is always within the adjustment range of the count value, thereby meeting the accuracy requirement of 1% of the oscillator center frequency.

[0040] In some embodiments, Figure 4 and Figure 5 As shown, based on a preset adjustment accuracy requirement range of the oscillator center frequency, randomly adjusting the first count value to obtain a second count value includes: based on a preset adjustment accuracy requirement range of the oscillator center frequency, repeatedly performing random adjustment on the first count value to obtain a second count value; Adjusting the oscillator center frequency according to the second count value includes: repeatedly adjusting the oscillator center frequency according to the randomly obtained second count value until the interruption ends, and using the oscillator center frequency obtained by the last random adjustment before the interruption ends as the operating frequency of the chip in the next working cycle.

[0041] Specifically, the process of repeating steps 102-103 specifically includes: Determine whether the chip is in interrupt state: If yes, then steps 102-103 are repeated until the interruption ends; If not, the interruption ends, and the oscillator center frequency obtained by the last random adjustment before the interruption ends is used as the operating frequency of the chip in the next working cycle.

[0042] Specifically, when the chip is in an interrupt state, based on the preset adjustment accuracy requirement range of the oscillator center frequency, the first count value is repeatedly randomly adjusted to obtain a second count value, and the oscillator center frequency is adjusted according to the second count value until the interruption ends, and the oscillator center frequency obtained by the last random adjustment before the end of the interruption is used as the operating frequency of the chip in the next working cycle.

[0043] By adjusting the frequency randomly multiple times, not only can the energy be distributed more evenly over a wide frequency band, thereby further reducing the peak radiation at a single frequency point, but also because the frequency changes are random, it can make it difficult for external interference sources to predict and lock on to specific frequency points, thereby improving the system's anti-interference ability and security; at the same time, random frequency jitter makes the system more flexible in different working environments, and can better adapt to the environment where multiple devices coexist, reducing mutual interference between devices.

[0044] Embodiment 2: Another embodiment of the present application relates to a chip operating frequency adjustment device. The implementation details of the chip operating frequency adjustment device of this embodiment are specifically described below. The following content is only for the convenience of understanding the implementation details provided, and is not necessary for implementing this solution. The schematic diagram of the chip operating frequency adjustment device of this embodiment can be as follows Figure 6 As shown, it includes a data acquisition module 801, a random value module 802 and a frequency adjustment module 803.

[0045] The data acquisition module 801 is used to acquire a first count value of the center frequency of the oscillator in the chip in the previous working cycle; the first count value is a pre-set value; A random value acquisition module 802, configured to randomly adjust the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value; The frequency adjustment module 803 is used to adjust the oscillator center frequency according to the second count value to obtain the operating frequency of the chip in the next working cycle.

[0046] The data acquisition module 801 is connected to the random value module 802, and the random value module 802 is connected to the frequency adjustment module 803, thereby forming a signal transmission relationship to facilitate the execution of working frequency adjustment.

[0047] It is worth mentioning that all modules involved in this embodiment are logic modules. In practical applications, a logic unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by this application, but this does not mean that there are no other units in this embodiment.

[0048] Embodiment three: Another embodiment of the present application relates to a chip, which includes a chip operating frequency adjustment device as described above, so that a chip operating frequency adjustment method is executed through the chip operating frequency adjustment device, so that the frequency of a high-frequency oscillator inside the chip fluctuates above and below the center frequency, disperses the radiation peak energy near the main frequency, superimposes interference in places with sufficient margin, reduces the energy radiated at the multiple frequency, and achieves the purpose of dispersing the radiation peak frequency band energy.

[0049] The chip provided in this application can be applied to household appliances, industrial appliances and various electronic devices.

[0050] Embodiment 4: Another embodiment of the present application relates to an electronic device, such as Figure 7 As shown, it includes: at least one processor 901; and a memory 902 that is communicatively connected to the at least one processor 901; wherein the memory 902 stores instructions that can be executed by the at least one processor 901, and the instructions are executed by the at least one processor 901 so that the at least one processor 901 can execute the chip operating frequency adjustment method in the above-mentioned embodiments.

[0051] Among them, the memory and the processor are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor is transmitted on a wireless medium via an antenna, and further, the antenna also receives data and transmits the data to the processor.

[0052] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.

[0053] Embodiment five: Another embodiment of the present application relates to a computer-readable storage medium storing a computer program, which implements the above method embodiment when executed by a processor.

[0054] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as: ROM), random access memory (Random Access Memory, referred to as: RAM), disk or optical disk and other media that can store program codes.

[0055] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. A chip operating frequency adjustment method, characterized in that: include: When the chip is in an interrupt state, obtaining a first count value of a center frequency of an oscillator in the chip in a previous working cycle; The first count value is a pre-set value; Based on a preset adjustment accuracy requirement range of the oscillator center frequency, the first count value is randomly adjusted to obtain a second count value, and the oscillator center frequency is adjusted according to the second count value to obtain the operating frequency of the chip in the next working cycle.

2. A chip operating frequency adjustment method according to claim 1, characterized in that: The step of randomly adjusting the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value includes: Based on a preset adjustment accuracy requirement range of the oscillator center frequency, determining a count value adjustment amplitude that meets the adjustment accuracy requirement range; Determining an adjustment interval of the count value in a current interruption period according to the count value adjustment amplitude and the first count value; The second count value is randomly generated from within an adjustment interval of the count value.

3. A chip operating frequency adjustment method according to claim 2, characterized in that: The determining the adjustment interval of the count value in the current interruption period according to the count value adjustment amplitude and the first count value includes: The positive and negative boundary values ​​of the counting value adjustment amplitude are added to the first counting value respectively to determine the maximum and minimum values ​​of the counting value in the current interruption cycle; and the adjustment interval of the counting value is generated using the maximum and minimum values ​​of the counting value as boundaries.

4. A chip operating frequency adjustment method according to claim 2, characterized in that: Randomly generating the second count value from within the adjustment interval of the count value includes: randomly generating the second count value from within the adjustment interval of the count value using a random function; Wherein, the random function includes: f= (rand() % (Fmax - Fmin + 1)) + Fmin; In the formula, f is the second count value; rand() is a random function in C language; Fmax is the maximum boundary value of the adjustment interval of the count value; and Fmin is the minimum boundary value of the adjustment interval of the count value.

5. A chip operating frequency adjustment method according to claim 1, characterized in that: The step of randomly adjusting the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value, and adjusting the oscillator center frequency according to the second count value includes: Based on a preset adjustment accuracy requirement range of the oscillator center frequency, the first count value is repeatedly randomly adjusted to obtain a second count value, and the oscillator center frequency is adjusted according to the second randomly obtained count value until the interruption ends, and the oscillator center frequency obtained by the last random adjustment before the interruption ends is used as the operating frequency of the chip in the next working cycle.

6. A chip operating frequency adjustment method according to claim 1, characterized in that: The method further comprises: During the power-on initialization process of the chip, the timing interrupt is enabled and the interrupt cycle is set.

7. A chip operating frequency adjustment method according to claim 1, characterized in that: The method further comprises: During power-on initialization of the chip, reading the first count value from a register of the chip; After obtaining the second count value, the second count value is stored in the register as the first count value to be obtained in the next interrupt cycle.

8. A chip operating frequency adjustment device, characterized in that: include: A data acquisition module, used for acquiring a first count value of the center frequency of the oscillator in the chip in the previous working cycle; The first count value is a pre-set value; A random value acquisition module, configured to randomly adjust the first count value based on a preset adjustment accuracy requirement range of the oscillator center frequency to obtain a second count value; The frequency adjustment module is used to adjust the center frequency of the oscillator according to the second count value to obtain the operating frequency of the chip in the next working cycle.

9. A chip, characterized in that: It comprises the chip operating frequency adjustment device as claimed in claim 8.

10. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the chip operating frequency adjustment method as described in any one of claims 1 to 7.

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