Semiconductor device and preparation method thereof, power module, power conversion circuit and vehicle

Abstract

The invention discloses a semiconductor device and a preparation method thereof, a power module, a power conversion circuit and a vehicle, and belongs to the technical field of semiconductors. The semiconductor device comprises a silicon carbide substrate, a drift layer, a well region, a source region, a grid electrode, a source electrode and a drain electrode. Wherein the well region is arranged on the side, away from the silicon carbide substrate, of the drift layer, the source region is arranged in the well region, the surface, away from the silicon carbide substrate, of the well region exposes the source region, the grid electrode is arranged on the side, away from the silicon carbide substrate, of the well region, the source electrode is arranged on the side, away from the silicon carbide substrate, of the grid electrode, and the source electrode is in electric contact with the source region. Wherein the material of the source region comprises a semiconductor material, the source region and the silicon carbide substrate have the same conduction type, and the work function of the material of the source region is smaller than that of silicon carbide. A semiconductor material with a lower work function is adopted to form a source region, and ohmic contact with more excellent performance is obtained from the theoretical angle of the work function.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to a semiconductor device and a method for preparing the same, a power module, a power conversion circuit and a vehicle. Background Art

[0002] In silicon carbide metal oxide semiconductor field effect transistors (SiC MOSFET), in order to achieve a better ohmic contact effect, the source region of the SiC MOSFET is usually formed by multiple high-energy ion implantations, which is costly, complex, and difficult to control. How to simplify the process and save costs while improving the ohmic contact effect is a current research direction in the field. Summary of the invention

[0003] In order to improve the ohmic contact effect, an embodiment of the present application provides a semiconductor device, including: a silicon carbide substrate, a drift layer, a well region, a source region, a gate, a source electrode, and a drain electrode. The silicon carbide substrate includes a first surface and a second surface opposite to each other, the drift layer is arranged on the first surface, the well region is arranged on the side of the drift layer away from the silicon carbide substrate, the source region is arranged in the well region, and the surface of the well region away from the silicon carbide substrate exposes the source region, the gate is arranged on the side of the well region away from the silicon carbide substrate, the source electrode is arranged on the side of the gate away from the silicon carbide substrate, the source electrode is in electrical contact with the source region, and the drain electrode is arranged on the second surface.

[0004] The material of the source region includes semiconductor material, the source region and the silicon carbide substrate have the same conductivity type, and the work function of the material of the source region is smaller than the work function of silicon carbide.

[0005] In some embodiments, the silicon carbide substrate, the drift layer, and the source region have N-type conductive ions, and the well region has P-type conductive ions.

[0006] In some embodiments, the work function of the material of the source region having N-type conductive ions ranges from 0.67 eV to 1.43 eV.

[0007] In some embodiments, the material of the source region includes at least one of silicon, germanium, or gallium arsenide.

[0008] In the above embodiment, the source region is no longer formed by multiple ion implantation, but is formed by using a semiconductor material with a lower work function, so that an ohmic contact with better performance is obtained from the theoretical perspective of the work function. The replacement of materials eliminates the multiple, high-energy, and high-dose ion implantation process in the related art, and the ohmic contact effect achieved by the material replacement is better than the ohmic contact effect achieved by ion implantation in the related art, and the cost is lower.

[0009] In a second aspect, the present application also provides a method for preparing a semiconductor device, which specifically includes the following steps S1 to S7:

[0010] Step S1: forming a drift layer on a silicon carbide substrate, the silicon carbide substrate comprising a first surface and a second surface opposite to each other, and the drift layer is located on the first surface;

[0011] Step S2: forming a well region, wherein the well region is located on a side of the drift layer away from the silicon carbide substrate;

[0012] Step S3: forming a trench in the well region;

[0013] Step S4: forming a source region in the trench, wherein the material of the source region includes a semiconductor material, the source region and the silicon carbide substrate have the same conductivity type, and the work function of the material of the source region is smaller than the work function of silicon carbide;

[0014] Step S5: forming a gate, wherein the gate is located on a side of the well region away from the silicon carbide substrate;

[0015] Step S6: forming a source electrode, the source electrode being located on a side of the gate away from the silicon carbide substrate, and the source electrode being in electrical contact with the source region;

[0016] Step S7: forming a drain electrode on the second surface.

[0017] In some embodiments, forming the source region in the trench includes: using magnetron sputtering, physical vapor deposition, or chemical vapor deposition process to fill the trench with a semiconductor material having the same conductivity type as the silicon carbide substrate to form the source region.

[0018] In some embodiments, the semiconductor material filled with the same conductive ions as the silicon carbide substrate includes: the semiconductor material filled with the same N-type conductive type as the silicon carbide substrate, and the work function of the material of the source region with the N-type conductive ions ranges from 0.67eV to 1.43eV.

[0019] In the above embodiment, the source region is formed by etching the well region to form a groove and then depositing a semiconductor material to fill the groove. Compared with the related art, this method is simpler and has a lower process cost. In addition, because the work function of the semiconductor material in the source region is lower, the ohmic contact effect of the semiconductor device is better.

[0020] On the other hand, an embodiment of the present application further provides a power module, which includes a substrate and a semiconductor device as described in any of the above embodiments, wherein the substrate is used to carry the semiconductor device.

[0021] In another aspect, an embodiment of the present application further provides a power conversion circuit, which is used for one or more of current conversion, voltage conversion, and power factor correction. The power conversion circuit includes a circuit board and a semiconductor device as in any of the above embodiments, and the semiconductor device is electrically connected to the circuit board.

[0022] On the other hand, an embodiment of the present application also provides a vehicle, which includes a load and a power conversion circuit as described in the above embodiment, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

[0023] The above-mentioned power module, power conversion circuit and vehicle have the same structure and beneficial technical effects as the semiconductor devices provided in some of the above-mentioned embodiments, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0025] Figure 1 A schematic diagram of a semiconductor device structure provided in an embodiment of the present application;

[0026] Figure 2 A flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application;

[0027] Figure 3 to Figure 9 A semiconductor device manufacturing step diagram provided in an embodiment of the present application;

[0028] Fig.10 A schematic diagram of the structure of a power module provided in an embodiment of the present application;

[0029] Fig.11 A schematic diagram of the structure of a power conversion circuit provided in an embodiment of the present application;

[0030] Fig.12 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0032] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, ie, meaning "including, but not limited to."

[0033] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0034] When describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. For example, when describing some embodiments, the term "connection" may be used to indicate that two or more components are in direct physical or electrical contact with each other.

[0035] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0036] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0037] Exemplary embodiments are described herein with reference to cross-sectional views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0038] Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0039] Silicon carbide metal oxide semiconductor field effect transistor (SiC MOSFET) uses silicon carbide substrate. The Fermi level of N-type silicon carbide is about 4eV away from the vacuum level. Due to the high stability and high bond energy of silicon carbide, ion implantation is usually required under high temperature, high energy, and high dose conditions to form an N-type doped region, so that the region forms a good ohmic contact with the metal. However, this method is costly, complex, and difficult to control.

[0040] To solve the above problems, the present invention provides a semiconductor device 10, such as Figure 1 As shown, Figure 1 A schematic diagram of a semiconductor device structure provided in an embodiment of the present application, the semiconductor device 10 comprises: a silicon carbide substrate 101, a drift layer 102, a well region 103, a source region 104, a gate 105, a source electrode 106, and a drain electrode 107. The silicon carbide substrate 101 comprises a first surface P1 and a second surface P2 opposite to each other, the drift layer 102 is arranged on the first surface P1, the well region 103 is arranged on a side of the drift layer 102 away from the silicon carbide substrate 101, the source region 104 is arranged in the well region 103, and the surface of the well region 103 away from the silicon carbide substrate 101 exposes the source region 104, the gate 105 is arranged on a side of the well region 103 away from the silicon carbide substrate 101, the source electrode 106 is arranged on a side of the gate 105 away from the silicon carbide substrate 101, the source electrode 106 is in electrical contact with the source region 104, and the drain electrode 107 is arranged on the second surface P2.

[0041] The material of the source region 104 includes a semiconductor material, the source region 104 and the silicon carbide substrate 101 have the same conductivity type, and the work function of the material of the source region 104 is smaller than the work function of silicon carbide.

[0042] It can be understood that the source region 104 is no longer formed by multiple ion implantation into the silicon carbide material, but is formed by using a semiconductor material with a lower work function, and by using a semiconductor material with a lower work function to replace the silicon carbide in the related art to provide electrons, thereby achieving an electrical result similar to that of ion implantation into the silicon carbide substrate in the related art. From the theoretical perspective of work function, the Fermi level of N-type silicon carbide is about 4eV away from the vacuum level. In ohmic contact, the work function of the ideal ohmic contact metal should be lower than 4eV, that is, lower than the work function of silicon carbide. When the work function of the material of the source region 104 is less than 4eV, that is, less than the work function of silicon carbide, a more excellent ohmic contact can be obtained. The replacement of materials eliminates the multiple, high-temperature, high-energy, and high-dose ion implantation processes in the related art, and the process is simple and low-cost. The ohmic contact effect achieved by material replacement is better than the ohmic contact effect achieved by ion implantation in the related art, and the cost is lower.

[0043] In some embodiments, the silicon carbide substrate 101, the drift layer 102 and the source region 104 have N-type conductive ions, and the well region 103 has P-type conductive ions. When the working current is small, the working current passes from the source 106 through the source region 104, the well region 103, the drift layer 102 and the silicon carbide substrate 101 to the drain 107. The work function of the material of the source region 104 is small, so that the ohmic contact effect is better.

[0044] In some embodiments, the work function of the material of the source region 104 having N-type conductive ions ranges from 0.67 eV to 1.43 eV. For example, the work function may be 0.67 eV, 1 eV, 1.05 eV, 1.12 eV, 1.43 eV, etc.

[0045] In some embodiments, the material of the source region 104 includes at least one of silicon, germanium, or gallium arsenide.

[0046] For example, the work function of N-type doped silicon is 1.12 eV, the work function of N-type doped germanium is 0.67 eV, the work function of N-type doped gallium arsenide is 1.43 eV, etc. Semiconductor materials with lower work functions make the ohmic contact effect of semiconductor devices better.

[0047] In a second aspect, the present application also provides a method for preparing a semiconductor device, such as Figure 2 As shown, Figure 2 A flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application, Figure 3 to Figure 9 A semiconductor device preparation step diagram provided in an embodiment of the present application specifically includes the following steps S1 to S7:

[0048] Step S1: forming a drift layer 102 on a silicon carbide substrate 101, such as Figure 3 As shown, the silicon carbide substrate 101 includes a first surface P1 and a second surface P2 opposite to each other, and the drift layer 102 is located on the first surface P1. Specifically, the drift layer 102 may be N with a low doping concentration. - Drift layer 102 .

[0049] Step S2: forming a well region 103, such as Figure 3 As shown, the well region 103 is located on the side of the drift layer 102 away from the silicon carbide substrate 101. The well region 103 can be formed by performing P-type ion implantation into the drift layer 102. During the ion implantation process, the implantation energy will affect the ion implantation depth. Semiconductor devices with different functions can select appropriate implantation energy and implantation dose according to specific use requirements to form the final required semiconductor device. Exemplarily, the well region 103 can be formed by two ion implantations with different energies, so that the well region 103 has a stratified effect from the perspective of ion concentration.

[0050] Step S3: forming a trench V1 in the well region 103, such as Figure 4 As shown, the well region 103 is etched to form a trench V1 in the well region 103. Specifically, a patterning process is first performed to define a required pattern to form a mask plate, and then the well region 103 is etched using the mask plate as a mask.

[0051] When two or more transistors are formed by etching on the same semiconductor device, the two transistors can share the silicon carbide substrate 101 and the drift layer 102. Figure 4 As shown, in the area close to the two transistors, the grooves V1 corresponding to each transistor can be etched respectively, and there is a well region portion 1031 that has not been etched between the two grooves V1. In the semiconductor device finally formed, the well region portion 1031 that has not been etched can form a field limiting ring for improving the electric field distribution and enhancing the voltage resistance of the device.

[0052] Step S4: forming a source region 104 in the trench V1. The material of the source region 104 includes a semiconductor material. The source region 104 and the silicon carbide substrate 101 have the same conductivity type and the work function of the material of the source region 104 is smaller than the work function of silicon carbide.

[0053] like Figures 5-6 As shown, a semiconductor material is deposited to fill the trench V1 to form a source region 104. The semiconductor material and the silicon carbide substrate 101 have the same conductivity type and the work function of the semiconductor material is smaller than the work function of silicon carbide.

[0054] In some embodiments, Figure 5 As shown, forming the source region 104 in the trench V1 includes: using magnetron sputtering, physical vapor deposition or chemical vapor deposition process to fill the trench V1 with a semiconductor material having the same conductivity type as the silicon carbide substrate 101 to form the source region 104 .

[0055] In some embodiments, the semiconductor material filled with the same conductive ions as the silicon carbide substrate 101 includes: the semiconductor material filled with the same N-type conductive type as the silicon carbide substrate 101, and the work function of the material of the source region 104 with N-type conductive ions ranges from 0.67eV to 1.43eV. For example, the work function of N-type doped silicon is 1.12eV, the work function of N-type doped germanium is 0.67eV, the work function of N-type doped gallium arsenide is 1.43eV, etc.

[0056] Afterwards, if Figure 6 As shown, the excess semiconductor material outside the trench V1 is etched away to expose the unetched portion 1031 of the well region 103 and the portion of the drift layer 102 that has not been implanted with P-type ions, thereby ensuring a flat surface of the semiconductor device.

[0057] Compared with the multiple, high-temperature, high-energy, and high-dose ion implantation methods in the related art, the method provided in this embodiment is to form a groove V1 by etching the well region 103, and then deposit semiconductor material to fill the groove V1, and finally form a source region. This method is simpler and has lower process costs. Moreover, because the work function of the semiconductor material in the source region 104 is lower, the ohmic contact effect of the semiconductor device is better.

[0058] Step S5: forming a gate 105, such as Figure 7 As shown, the gate 105 is located on the side of the well region 103 away from the silicon carbide substrate 101. Specifically, a gate insulating layer is first formed, and the gate 105 is formed on the gate insulating layer, and then a dielectric layer is formed to cover the gate 105. The gate insulating layer and the dielectric layer both play a protective isolation role for the gate 105, and the materials of the gate insulating layer and the dielectric layer may include silicon dioxide. It should be noted that in this process, it is necessary to define the required pattern of the gate 105 through a related etching process to expose the source 106 window, so as to facilitate the subsequent formation of the source 106.

[0059] Step S6: forming the source electrode 106, such as Figure 8 As shown, the source electrode 106 is located at a side of the gate electrode 105 away from the silicon carbide substrate 101 , and the source electrode 106 is in electrical contact with the source region 104 .

[0060] Among them, the side of the source 106 close to the silicon carbide substrate 101, that is, the side electrically contacting the source region 104, can first be deposited with at least one material of nickel, titanium or nickel-titanium alloy, and after annealing, an ohmic contact is formed, and then the source 106 thickened metal material is deposited to form a source 106 contact window, and the thickened metal material can be aluminum.

[0061] Step S7: Fig. 9 As shown, a drain 107 is formed on the second surface P2.

[0062] At this point, the semiconductor device 10 is completed.

[0063] On the other hand, an embodiment of the present application further provides a power module, Fig.10 A schematic diagram of the structure of a power module provided in an embodiment of the present application.

[0064] like Fig.10 As shown, the power module 200 includes a substrate 201 and the semiconductor device 10 in any of the above embodiments, and the substrate 201 is used to carry the semiconductor device 10 .

[0065] Exemplarily, the power module 200 can be used as one of a power amplifier, a power converter, a power controller, a power management module, or a power regulator. The power amplifier is used to amplify the power of an electrical signal. The power converter is used to convert electrical energy from one form to another form. For example, the power converter can be an AC / DC converter or a DC / DC converter. The power controller is used to control the device of power flow. The power management module is used to manage the power supply to ensure that the power is stably and efficiently distributed to different parts of the electronic device. The power regulator is used to adjust the power output to meet the needs of a specific application.

[0066] On the other hand, an embodiment of the present application further provides a power conversion circuit, Fig.11 A schematic diagram of the structure of a power conversion circuit provided in an embodiment of the present application.

[0067] like Fig.11 As shown, the power conversion circuit 300 includes a circuit board 301 and a semiconductor device 10 in any of the above embodiments. The semiconductor device 10 is electrically connected to the circuit board 301. The power conversion circuit 300 can be used for current conversion, voltage conversion or power factor correction.

[0068] Exemplarily, the power conversion circuit 300 can be used as one of an AC / DC converter, an AC / AC converter, a DC / DC converter, a DC / AC inverter or a power factor correction (PFC) circuit, wherein the AC / DC converter is used to convert alternating current into direct current, the AC / AC converter is used to convert alternating current into alternating current, the DC / DC converter is used to convert direct current into direct current, the DC / AC inverter is used to convert direct current into alternating current, and the power factor correction circuit is used to improve the power factor of the power supply and reduce the harmonic pollution of the power grid.

[0069] On the other hand, an embodiment of the present application further provides a vehicle, Fig.12 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application.

[0070] like Fig.12 As shown, the vehicle 400 includes a load 401 and the power conversion circuit 300 in the above embodiment, and the power conversion circuit 300 is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power, and then input it into the load 401 to power the load 401.

[0071] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can think of within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A semiconductor device, characterized in that: include: A silicon carbide substrate including a first surface and a second surface opposite to each other; A drift layer is disposed on the first surface; A well region, disposed on a side of the drift layer away from the silicon carbide substrate; A source region is disposed in the well region, wherein a surface of the well region away from the silicon carbide substrate exposes the source region; A gate is arranged on a side of the well region away from the silicon carbide substrate; A source electrode is arranged on a side of the gate electrode away from the silicon carbide substrate, and the source electrode is in electrical contact with the source region; A drain electrode is disposed on the second surface; The material of the source region includes a semiconductor material, the source region and the silicon carbide substrate have the same conductivity type, and the work function of the material of the source region is smaller than the work function of silicon carbide.

2. The semiconductor device according to claim 1, wherein: The silicon carbide substrate, the drift layer and the source region have N-type conductive ions, and the well region has P-type conductive ions.

3. The semiconductor device according to claim 2, characterized in that The work function of the material of the source region having N-type conductive ions ranges from 0.67 eV to 1.43 eV.

4. The semiconductor device according to claim 3, characterized in that The material of the source region includes at least one of silicon, germanium or gallium arsenide.

5. A method for preparing a semiconductor device, characterized in that: include: forming a drift layer on a silicon carbide substrate, wherein the silicon carbide substrate comprises a first surface and a second surface opposite to each other, and the drift layer is located on the first surface; forming a well region, wherein the well region is located on a side of the drift layer away from the silicon carbide substrate; forming a trench in the well region; A source region is formed in the trench; the material of the source region comprises a semiconductor material, the source region and the silicon carbide substrate have the same conductivity type, and the work function of the material of the source region is smaller than the work function of silicon carbide; forming a gate, wherein the gate is located on a side of the well region away from the silicon carbide substrate; forming a source electrode, the source electrode being located on a side of the gate away from the silicon carbide substrate, the source electrode being in electrical contact with the source region; A drain electrode is formed on the second surface.

6. The preparation method according to claim 5, characterized in that: Forming the source region in the trench comprises: The groove is filled with a semiconductor material having the same conductivity type as the silicon carbide substrate by magnetron sputtering, physical vapor deposition or chemical vapor deposition process to form the source region.

7. The preparation method according to claim 6, characterized in that: The semiconductor material having the same conductive ions as the filling and the silicon carbide substrate includes: The semiconductor material filled with the silicon carbide substrate has the same N-type conductivity as that of the source region, and the work function of the material of the source region having N-type conductive ions is in the range of 0.67 eV to 1.43 eV.

8. A power module, characterized in that: It comprises a substrate and at least one semiconductor device according to any one of claims 1 to 4, wherein the substrate is used to carry the semiconductor device.

9. A power conversion circuit, characterized in that: The power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction; The power conversion circuit comprises a circuit board and at least one semiconductor device according to any one of claims 1 to 4, wherein the semiconductor device is electrically connected to the circuit board.

10. A vehicle, characterized in that: It includes a load and a power conversion circuit as described in claim 9, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

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