Manufacturing method of radio frequency switch

By forming a specific structure in the radio oxygen layer of the radio frequency switch, the breakdown voltage of each transistor is improved, the problem of increasing the area of ​​the radio frequency switch chip in the existing technology, and the smaller radio frequency switch design.

CN119384031APending Publication Date: 2025-01-28SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Application Number
CN202411514434.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-28
Publication Date
2025-01-28

AI Technical Summary

Technical Problem

While ensuring the overall breakdown voltage, existing RF switches need to increase the number of transistors, resulting in an increase in on-resistance and an increase in chip area, which is difficult to meet the needs of chip miniaturization.

Method used

By forming a thinner intermediate area in the ranging layer of the radio frequency switch, a thick structure with a thicker area on both sides, reducing the longitudinal electric field and eased the tunnel penetration current, thereby increasing the penetration voltage of each transistor, reducing the pitch resistance and chip of the chip area.

Benefits of technology

Under the condition of maintaining the overall breakdown voltage, the number of transistors required for the radio frequency switch is reduced, the pitch resistance and chip area are reduced, and the harmonic performance at high power is improved.

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Abstract

The invention provides a radio frequency switch and a manufacturing method thereof. The manufacturing method comprises the following steps: providing an SOI substrate; forming a first gate oxide layer on the surface of the top silicon; the graphical hard mask layer covers the middle region of the first gate oxide layer; forming a second gate oxide layer in two side areas of the first gate oxide layer exposed by the patterned hard mask layer; the patterned hard mask layer is removed; the formed polysilicon gate layer covers the gate oxide layer. The first gate oxide layer and the second gate oxide layer jointly form a gate oxide layer structure with a thin middle area and thickened edge areas on the two sides, the gate oxide layer structure with the thickened edges reduces a longitudinal electric field, relieves tunneling current and improves the breakdown voltage of each transistor, and under the certain overall breakdown voltage of the radio frequency switch, only few transistor stages are needed, so that the overall breakdown voltage of the radio frequency switch is reduced. The series number is reduced, the on-resistance is reduced, and the chip area is reduced; harmonic waves under high power are improved; the overall thickness of the gate oxide layer is not changed, and the overall electrical performance is not changed; the preparation process is simple, and the gate oxide layer is not damaged.
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Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a method for manufacturing a radio frequency switch. Background Art

[0002] The core performance of RF switches includes quality factor, harmonics and breakdown voltage. The quality factor is used to evaluate the switching performance or process capability of field effect transistors MOSFET. It is a compromise between insertion loss and isolation. Insertion loss is characterized by on-resistance Ron, and isolation depends on off-capacitance Coff. For N-type MOSFET, the drain-source resistance is defined as on-resistance Ron when the gate voltage Vg = +VDD, and the drain-source capacitance is defined as off-capacitance Coff when the gate voltage Vg = -VDD. The lower the quality factor, the better, which requires low on-resistance Ron and low off-capacitance Coff. For the circuit, the lower the harmonic distortion (mainly second and third harmonics) caused by MOSFET nonlinearity, the better.

[0003] The RF switch is composed of several stages (pieces) of transistors connected in series. The overall breakdown voltage (withstand voltage) of the RF switch is equal to the breakdown voltage of a single transistor multiplied by the number of transistor stages (number). At present, the breakdown voltage of a single transistor is relatively low. In this way, under a certain overall breakdown voltage, the number of transistor stages needs to be increased, but the increase in the number of series stages will lead to an increase in the on-resistance Ron, and the chip area will increase accordingly, which is not conducive to the demand for chip miniaturization. Summary of the invention

[0004] The object of the present invention is to provide a radio frequency switch and a manufacturing method thereof, wherein a first gate oxide layer and a second gate oxide layer together form a gate oxide layer structure in which a middle region is relatively thin and edge regions on both sides are thickened, and the gate oxide layer structure with thickened edges reduces the longitudinal electric field, relieves tunneling current, and increases the breakdown voltage of each transistor. Under a certain overall breakdown voltage of the radio frequency switch, only a smaller number of transistor stages are required, and the number of series stages is reduced to reduce the on-resistance and the chip area; harmonics under high power are improved; the overall thickness of the gate oxide layer is not changed, and the overall electrical performance is not changed; the preparation process is simple and the gate oxide layer is not damaged.

[0005] The present invention provides a method for manufacturing a radio frequency switch, comprising:

[0006] Providing an SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon layer, a buried oxide layer and a top silicon layer;

[0007] forming a first gate oxide layer on the surface of the top silicon layer;

[0008] forming a patterned hard mask layer on the surface of the first gate oxide layer, wherein the patterned hard mask layer covers a middle region of the first gate oxide layer and exposes regions on both sides of the first gate oxide layer;

[0009] forming a second gate oxide layer in the regions on both sides of the first gate oxide layer exposed by the patterned hard mask layer;

[0010] removing the patterned hard mask layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer;

[0011] A polysilicon gate layer is formed, and the polysilicon gate layer covers the gate oxide layer; the polysilicon gate layer is used to form a gate of a transistor in a radio frequency switch.

[0012] Furthermore, the thickness of the first gate oxide layer is 50 angstroms to 70 angstroms, and the thickness of the second gate oxide layer is 10 angstroms to 20 angstroms.

[0013] Furthermore, the first gate oxide layer is formed by thermal oxidation or deposition process.

[0014] Furthermore, the material of the first gate oxide layer includes silicon dioxide or chromium oxide.

[0015] Further, forming a patterned hard mask layer on the surface of the first gate oxide layer specifically includes:

[0016] forming a hard mask material layer on the surface of the first gate oxide layer;

[0017] forming a patterned photoresist layer on the surface of the hard mask material layer;

[0018] The exposed hard mask material layer is dry-etched or wet-etched using the patterned photoresist layer as a mask to form the patterned hard mask layer.

[0019] Furthermore, the polysilicon gate layer is formed by any one of chemical vapor deposition, plasma enhanced chemical vapor deposition or metal organic chemical vapor deposition.

[0020] Furthermore, the production method also includes:

[0021] Etching the polysilicon gate layer to form a gate; forming sidewalls on the gate oxide layer on both sides of the gate, wherein the sidewalls cover the sidewalls of the gate; and

[0022] The top layer of silicon on the side of each of the sidewalls away from the gate is heavily doped to form a source and a drain.

[0023] Furthermore, the radio frequency switch includes a plurality of transistors connected in series.

[0024] The present invention also provides a radio frequency switch, comprising:

[0025] An SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon layer, a buried oxide layer and a top silicon layer;

[0026] A first gate oxide layer is formed on the surface of the top silicon layer; a second gate oxide layer is formed on both side edge regions of the first gate oxide layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer;

[0027] A polysilicon gate layer, wherein the polysilicon gate layer covers the gate oxide layer; and the polysilicon gate layer is etched to form a gate of a transistor in a radio frequency switch.

[0028] Furthermore, sidewalls are formed on the gate oxide layer on both sides of the gate, and the sidewalls cover the sidewalls of the gate; and a source and a drain are formed in the top silicon layer on the side of the sidewalls away from the gate;

[0029] The radio frequency switch includes a plurality of transistors connected in series.

[0030] Compared with the prior art, the present invention has the following beneficial effects:

[0031] The present invention provides a radio frequency switch and a manufacturing method thereof, comprising: providing an SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon, a buried oxide layer and a top silicon layer; forming a first gate oxide layer on the surface of the top silicon layer; forming a patterned hard mask layer on the surface of the first gate oxide layer, wherein the patterned hard mask layer covers the middle region of the first gate oxide layer and exposes the regions on both sides of the first gate oxide layer; forming a second gate oxide layer on the regions on both sides of the first gate oxide layer exposed by the patterned hard mask layer; removing the patterned hard mask layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer; forming a polysilicon gate layer, wherein the polysilicon gate layer covers the gate oxide layer; the polysilicon gate layer is used to form the gate of a transistor in the radio frequency switch. The first gate oxide layer and the second gate oxide layer together form a gate oxide layer structure in which the middle region is thinner and the edge regions on both sides of the middle region are thickened. The gate oxide layer structure with thickened edges reduces the longitudinal electric field, relieves the tunneling current, and increases the breakdown voltage of each transistor of the RF switch. In this way, under a certain overall breakdown voltage of the RF switch, only a smaller number of transistor stages (number) are required. The reduction in the number of series stages can reduce the on-resistance Ron, and correspondingly reduce the chip area and cost; improve harmonics under high power; do not change the overall thickness of the gate oxide layer, and do not change the overall electrical performance; the preparation process is simple and does not damage the gate oxide layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 The present invention is a schematic diagram of a method for manufacturing a radio frequency switch according to an embodiment of the present invention.

[0033] Figures 2 to 7 The figure is a schematic diagram of each step of a method for manufacturing a radio frequency switch according to an embodiment of the present invention.

[0034] Figure 8 Schematic diagram of a multi-stage transistor cascade of a radio frequency switch according to an embodiment of the present invention.

[0035] The reference numerals are as follows:

[0036] 10-SOI substrate; 11-bottom silicon; 12-buried oxide layer; 13-top silicon; 21-first gate oxide layer; 22-second gate oxide layer; 20-gate oxide layer; 30-hard mask material layer; 31-patterned hard mask layer; 40-polysilicon gate layer. DETAILED DESCRIPTION

[0037] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in a very simplified form and use an inaccurate scale, which is only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0038] For ease of description, some embodiments of the present application may use spatially relative terms such as "above", "below", "top", "below", etc. to describe the relationship between one element or component and another (or other) elements or components as shown in the various figures of the embodiments. It should be understood that in addition to the orientations described in the drawings, the spatially relative terms are also intended to include different orientations of the device in use or operation. For example, if the device in the drawings is turned over, the elements or components described as being "below" or "below" other elements or components will subsequently be positioned as being "above" or "above" other elements or components. The terms "first", "second", etc. below are used to distinguish between similar elements and are not necessarily used to describe a specific order or time sequence. It is to be understood that these terms used in this way are interchangeable where appropriate.

[0039] The embodiment of the present invention provides a method for manufacturing a radio frequency switch, such as Figure 1 As shown, including:

[0040] Step S1, providing an SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon layer, a buried oxide layer and a top silicon layer;

[0041] Step S2, forming a first gate oxide layer on the surface of the top silicon layer;

[0042] Step S3, forming a patterned hard mask layer on the surface of the first gate oxide layer, wherein the patterned hard mask layer covers the middle region of the first gate oxide layer and exposes regions on both sides of the first gate oxide layer;

[0043] Step S4, forming a second gate oxide layer on both side regions of the first gate oxide layer exposed by the patterned hard mask layer;

[0044] Step S5, removing the patterned hard mask layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer;

[0045] Step S6, forming a polysilicon gate layer, wherein the polysilicon gate layer covers the gate oxide layer; the polysilicon gate layer is used to form the gate of the transistor in the radio frequency switch.

[0046] Combine the following Figures 2 to 7 The steps of the method for manufacturing a radio frequency switch according to an embodiment of the present invention are described in detail.

[0047] like Figure 2 As shown, a SOI (silicon on insulator) substrate 10 is provided, and the SOI substrate 10 includes a stacked bottom silicon 11, a buried oxide layer 12 and a top silicon 13. The material of the bottom silicon 11 includes silicon, silicon carbide, silicon germanium or other suitable semiconductor materials. The material of the buried oxide layer 12 includes silicon dioxide or other suitable dielectric materials. The material of the top silicon 13 includes silicon, silicon carbide, silicon germanium or other suitable semiconductor materials.

[0048] A first gate oxide layer 21 is formed on the surface of the top silicon 13; the first gate oxide layer 21 can be formed by thermal oxidation or deposition process or other suitable process. The deposition process can be any one of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) or metal organic chemical vapor deposition (MOCVD). The material of the first gate oxide layer 21 includes: silicon dioxide, chromium oxide or other suitable dielectric materials.

[0049] like Figure 3 and Figure 4 As shown, a hard mask material layer 30 is formed on the surface of the first gate oxide layer 21; the hard mask material layer 30 can be formed by a deposition process. A patterned photoresist layer (not shown) is formed on the surface of the hard mask material layer 30; the exposed hard mask material layer is dry-etched or wet-etched using the patterned photoresist layer as a mask, the hard mask material layer 30 above the middle region of the first gate oxide layer 21 is retained, and the hard mask material layer 30 above both sides of the first gate oxide layer 21 is etched away to form a patterned hard mask layer 31. The material of the patterned hard mask layer 31 includes: silicon nitride, amorphous carbon, a high-K dielectric layer or other suitable materials.

[0050] like Figure 5 As shown, a second gate oxide layer 22 is formed on both sides of the first gate oxide layer 21 exposed by the patterned hard mask layer 31; the material of the second gate oxide layer 22 can be the same as that of the first gate oxide layer 21. The material of the second gate oxide layer 22 includes: silicon dioxide, chromium oxide or other suitable dielectric materials. The second gate oxide layer 22 can be formed by a deposition process.

[0051] like Figure 5 and Figure 6As shown, the patterned hard mask layer 31 above the middle region of the first gate oxide layer 21 is removed; the first gate oxide layer 21 and the second gate oxide layer 22 are collectively referred to as the gate oxide layer 20. The first gate oxide layer 21 and the second gate oxide layer 22 together form a gate oxide layer structure in which the middle region is thinner and the edge regions on both sides of the middle region are thicker. The thickness of the first gate oxide layer is 50 angstroms to 70 angstroms, and the thickness of the second gate oxide layer is 10 angstroms to 20 angstroms.

[0052] like Figure 7 As shown, a polysilicon gate layer 40 is formed, and the polysilicon gate layer 40 covers the gate oxide layer 20. The polysilicon gate layer 40 can be formed by any one of chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD) or metal organic chemical vapor deposition (MOCVD) and other suitable processes. The polysilicon gate layer 40 is used to make the gate of the transistor of the radio frequency switch.

[0053] Next, the polysilicon gate layer 40 is etched to form a gate, and sidewalls (not shown) are formed on the gate oxide layer 20 on both sides of the gate, the sidewalls covering the sidewalls of the gate. The top silicon of the sidewalls away from the gate is heavily doped to form a source and a drain.

[0054] Figure 8 FIG. 1 is a schematic diagram of a multi-stage transistor cascade connection of a radio frequency switch according to an embodiment of the present invention. Figure 8 As shown, the radio frequency switch includes, for example, two branches, each branch including N-level transistors connected in series.

[0055] The present invention provides a method for manufacturing a radio frequency switch, wherein a first gate oxide layer 21 and a second gate oxide layer 22 together form a gate oxide layer structure in which a middle region is relatively thin and edge regions on both sides of the middle region are thickened, wherein the gate oxide layer structure with thickened edges reduces the longitudinal electric field, alleviates tunneling current, and increases the breakdown voltage of each transistor of the radio frequency switch; improves harmonics under high power; does not change the overall thickness of the gate oxide layer, and does not change the overall electrical performance; and has a simple preparation process and does not damage the gate oxide layer.

[0056] The RF switch is composed of several levels (numbers) of transistors connected in series, and the overall breakdown voltage (withstand voltage) of the RF switch is equal to the breakdown voltage of a single transistor multiplied by the number of transistor levels (number). The present invention increases the breakdown voltage of each transistor of the RF switch, so that under a certain overall breakdown voltage, only a smaller number of transistor levels (number) are required. The reduction in the number of series levels can reduce the on-resistance Ron, and correspondingly reduce the chip area, which meets the market demand for chip miniaturization.

[0057] RF switches mostly use field effect transistors MOSFET, which use the characteristics of low resistance conduction in the saturation region and high resistance shutdown in the cut-off region to achieve the switching function. The transistor can be approximately equivalent to an on-resistance Ron in the on state, and the on-resistance Ron determines the size of the switching loss. In the off state, it can be approximately equivalent to an off-capacitor Coff. The existence of Coff will cause signal leakage and determine the size of the switch isolation. The smaller the on-resistance Ron and the off-capacitor Coff, the better.

[0058] The present invention also provides a radio frequency switch, such as Figure 5 and Figure 7 As shown, including:

[0059] SOI substrate 10, the SOI substrate 10 includes a stacked bottom silicon layer 11, a buried oxide layer 12 and a top silicon layer 13;

[0060] A first gate oxide layer 21 is formed on the surface of the top silicon 13; a second gate oxide layer 22 is formed on both side edge regions of the first gate oxide layer 21; the first gate oxide layer 21 and the second gate oxide layer 22 are collectively referred to as a gate oxide layer 20;

[0061] The polysilicon gate layer 40 covers the gate oxide layer 20 . After being etched, the polysilicon gate layer 40 forms a gate of a transistor in the radio frequency switch.

[0062] Sidewalls are formed on the gate oxide layer on both sides of the gate, and the sidewalls cover the sidewalls of the gate; and a source and a drain are formed in the top silicon layer on each side of the sidewalls away from the gate; the radio frequency switch includes a plurality of transistors connected in series.

[0063] In summary, the present invention provides a radio frequency switch and a manufacturing method thereof, comprising: providing an SOI substrate, the SOI substrate comprising a stacked bottom silicon, a buried oxide layer and a top silicon; forming a first gate oxide layer on the surface of the top silicon; forming a patterned hard mask layer on the surface of the first gate oxide layer, the patterned hard mask layer covering the middle area of ​​the first gate oxide layer, exposing the two side areas of the first gate oxide layer; forming a second gate oxide layer in the two side areas of the first gate oxide layer exposed by the patterned hard mask layer; removing the patterned hard mask layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer; forming a polysilicon gate layer, the polysilicon gate layer covering the gate oxide layer; the polysilicon gate layer is used to form the gate of a transistor in the radio frequency switch. The first gate oxide layer and the second gate oxide layer together form a gate oxide layer structure in which the middle region is thinner and the edge regions on both sides of the middle region are thickened. The gate oxide layer structure with thickened edges reduces the longitudinal electric field, relieves the tunneling current, and increases the breakdown voltage of each transistor of the RF switch. In this way, under a certain overall breakdown voltage of the RF switch, only a smaller number of transistor stages (number) are required. The reduction in the number of series stages can reduce the on-resistance Ron and correspondingly reduce the chip area; improve harmonics under high power; do not change the overall thickness of the gate oxide layer, and do not change the overall electrical properties; the preparation process is simple and does not damage the gate oxide layer.

[0064] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the method disclosed in the embodiment, since it corresponds to the device disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0065] The above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of rights of the present invention. Any technical personnel in this field can make possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for manufacturing a radio frequency switch, characterized in that: include: Providing an SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon layer, a buried oxide layer and a top silicon layer; forming a first gate oxide layer on the surface of the top silicon layer; forming a patterned hard mask layer on the surface of the first gate oxide layer, wherein the patterned hard mask layer covers a middle region of the first gate oxide layer and exposes regions on both sides of the first gate oxide layer; forming a second gate oxide layer on both side regions of the first gate oxide layer exposed by the patterned hard mask layer; removing the patterned hard mask layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer; A polysilicon gate layer is formed, and the polysilicon gate layer covers the gate oxide layer; the polysilicon gate layer is used to form a gate of a transistor in a radio frequency switch.

2. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: The thickness of the first gate oxide layer is 50 angstroms to 70 angstroms, and the thickness of the second gate oxide layer is 10 angstroms to 20 angstroms.

3. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: The first gate oxide layer is formed by thermal oxidation or deposition process.

4. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: The material of the first gate oxide layer includes silicon dioxide or chromium oxide.

5. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: Forming a patterned hard mask layer on the surface of the first gate oxide layer specifically includes: forming a hard mask material layer on a surface of the first gate oxide layer; forming a patterned photoresist layer on the surface of the hard mask material layer; The exposed hard mask material layer is dry-etched or wet-etched using the patterned photoresist layer as a mask to form the patterned hard mask layer.

6. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: The polysilicon gate layer is formed by any one of chemical vapor deposition, plasma enhanced chemical vapor deposition or metal organic chemical vapor deposition.

7. The method for manufacturing a radio frequency switch according to any one of claims 1 to 6, characterized in that: The production method further comprises: Etching the polysilicon gate layer to form a gate; forming sidewalls on the gate oxide layer on both sides of the gate, wherein the sidewalls cover the sidewalls of the gate; and The top layer of silicon on the side of each of the sidewalls away from the gate is heavily doped to form a source and a drain.

8. The method for manufacturing a radio frequency switch according to claim 1, characterized in that: The radio frequency switch includes a plurality of transistors connected in series.

9. A radio frequency switch, characterized in that: include: An SOI substrate, wherein the SOI substrate comprises a stacked bottom silicon layer, a buried oxide layer and a top silicon layer; A first gate oxide layer is formed on the surface of the top silicon layer; a second gate oxide layer is formed on both side edge regions of the first gate oxide layer; the first gate oxide layer and the second gate oxide layer are collectively referred to as a gate oxide layer; A polysilicon gate layer, wherein the polysilicon gate layer covers the gate oxide layer; and the polysilicon gate layer is etched to form a gate of a transistor in a radio frequency switch.

10. The method for manufacturing a radio frequency switch according to claim 9, characterized in that: Sidewalls are formed on the gate oxide layer at both sides of the gate, and the sidewalls cover the sidewalls of the gate; and a source and a drain are formed in the top silicon layer at one side of the sidewalls away from the gate; The radio frequency switch includes a plurality of transistors connected in series.