Manufacturing method of chip embedded substrate

Abstract

The invention relates to a manufacturing method of a chip embedded substrate. The manufacturing method of the chip embedded substrate comprises the following steps: cutting a first wafer to form a first chip; bonding the front surface of the first chip with the front surface of a second wafer to form a first semi-finished product; cutting the first semi-finished product, so that the second wafer is cut to form a second chip, and the first chip and the second chip which are bonded with each other form a chip assembly; patterning a core plate to form an accommodating cavity; embedding the chip assembly into the accommodating cavity of the core plate; and filling the accommodating cavity to form a first protective layer. According to the chip embedded substrate, the first chip and the second chip are embedded into the accommodating cavity of the core plate after being stacked and bonded, and the overall thickness of the chip assembly is smaller than the thickness of the core plate, so that more chips can be integrated on the basis of not influencing the thickness of the chip embedded substrate, the density of the chip embedded substrate is improved, and the chip assembly is more compact. And the function of miniaturization of the chip embedded substrate is realized.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for manufacturing a chip embedded substrate. Background Art

[0002] In recent years, terminal consumer electronic products have all been designed to be light, thin, short and small, which has led to the development of chip integration in the direction of thinness and high density. Multi-chip modules (MCM) have been widely used in electronic devices. Multi-chip modules mainly contain more than two chips to improve the electrical properties and performance of multi-chip modules. However, the multiple chips in the current multi-chip modules are laid out in the form of single-layer chips in the multi-chip module, and there is less space for miniaturization of the multi-chip module. Summary of the invention

[0003] The purpose of the present application is to provide a method for manufacturing a chip embedded substrate, which can solve the technical problem in the prior art that multiple chips are laid flat in a multi-chip module in the form of a single-layer chip, and the multi-chip module has less space for miniaturization.

[0004] In order to solve the above problems, the present application provides a method for manufacturing a chip-embedded substrate, and the method for manufacturing a chip-embedded substrate includes: cutting a first wafer to form a first chip; bonding the front side of the first chip to the front side of a second wafer to form a first semi-finished product; cutting the first semi-finished product so that the second wafer is cut to form a second chip, so that the first chip and the second chip bonded to each other form a chip assembly; patterning a core board to form a receiving cavity; embedding the chip assembly into the receiving cavity of the core board; filling the receiving cavity to form a first protective layer.

[0005] In some embodiments, the steps of cutting a first wafer to form a first chip include: setting a first protective film on the front side of the first wafer; thinning the back side of the first wafer; removing the first protective film; setting a second protective film on the back side of the first wafer; and cutting the first wafer to form a first chip.

[0006] In some embodiments, the step of bonding the front side of a first chip to the front side of a second wafer to form a first semi-finished product includes: setting a third protective film on the front side of the second wafer; thinning the back side of the second wafer; removing the third protective film; and bonding the front side of the first chip to the front side of the second wafer to form a first semi-finished product.

[0007] In some embodiments, the first wafer includes a first main body portion and a first conductive portion arranged on one side of the first main body portion, and the second wafer includes a second main body portion and a second conductive portion arranged on one side of the second main body portion; the step of bonding the front side of the first chip to the front side of a second wafer to form a first semi-finished product includes: bonding the first conductive portion of the first chip to the second conductive portion of the second wafer to form a first semi-finished product.

[0008] In some embodiments, the step of cutting the first semi-finished product so that the second wafer is cut to form a second chip, and the first chip and the second chip bonded to each other form a chip assembly includes: setting a fourth protective film on the back side of the second wafer; cutting the second wafer of the first semi-finished product so that the second wafer is cut to form a second chip, and the first chip and the second chip bonded to each other form a chip assembly.

[0009] In some embodiments, the core board has a first direction, and the step of patterning a core board to form a receiving cavity includes: patterning the core board through a laser process to form the receiving cavity, and the receiving cavity penetrates the core board along the first direction.

[0010] In some embodiments, the step of embedding the chip assembly into the receiving cavity of the core board includes: providing an adhesive layer on a carrier; attaching the core board to the adhesive layer; attaching the chip assembly to the adhesive layer in the receiving cavity.

[0011] In some embodiments, the step of filling the accommodating cavity to form a first protective layer includes: filling the accommodating cavity with protective material, curing and grinding the protective material to form a first protective layer, and the first protective layer covers the side of the chip component away from the carrier; and removing the carrier and the glue layer.

[0012] In some embodiments, the front side of the first chip is bonded to the front side of the second wafer by at least one of thermocompression welding, ultrasonic welding, laser welding, conductive adhesive welding and micro welding to form a first semi-finished product.

[0013] In some embodiments, the core board has a first direction, and after the step of filling the accommodating cavity to form a first protective layer, it also includes: patterning the core board to form a first through hole, and the first through hole penetrates the core board along the first direction; making a conductive layer on the surface of both sides of the core board in the first direction, and the conductive layer is also arranged in the first through hole; patterning the conductive layer on the surface of both sides of the core board in the first direction to form a core board circuit; making build-up boards on both sides of the core board in the first direction; making build-up board circuits on the build-up boards; and making a second protective layer on the surface of the build-up board away from the core board, and the second protective layer at least partially exposes the build-up board circuit.

[0014] The present application adopts bonding of the first chip and the second wafer, and then cuts the first semi-finished product, so that the second wafer is cut to form the second chip, so that the first chip and the second chip bonded to each other form a chip assembly, and then the chip assembly is embedded in the accommodating cavity of the core board. By stacking and bonding the first chip and the second chip and embedding them in the accommodating cavity of the core board, since the overall thickness of the chip assembly is less than the thickness of the core board, more chips can be integrated without affecting the thickness of the chip embedded substrate, thereby improving the density of the chip embedded substrate and realizing the function of miniaturization of the chip embedded substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 is a flow chart of a method for manufacturing a chip embedded substrate according to an embodiment of the present application;

[0017] Figure 2a-2f is a schematic structural diagram of cutting a first wafer to form a first chip in an embodiment of the present application;

[0018] Figure 3a-3d It is a structural schematic diagram of bonding a front side of a first chip to a front side of a second wafer to form a first semi-finished product in an embodiment of the present application;

[0019] Figure 4a-4c is a schematic structural diagram of cutting the first semi-finished product in an embodiment of the present application;

[0020] Figure 5 It is a structural schematic diagram of a core board subjected to patterning to form an accommodation cavity in an embodiment of the present application;

[0021] Figure 6a-6c It is a schematic diagram of the structure of embedding the chip assembly into the accommodating cavity of the core board in the embodiment of the present application;

[0022] Figure 7a-Figure 7b is a structural schematic diagram of filling the accommodating cavity to form a first protective layer in an embodiment of the present application;

[0023] Figure 8 It is a structural schematic diagram of patterning a core board to form a first through hole in an embodiment of the present application;

[0024] Fig. 9 It is a schematic structural diagram of manufacturing a conductive layer on the surfaces of both sides of a core board in a first direction according to an embodiment of the present application;

[0025] Fig.10 It is a structural schematic diagram of an embodiment of the present application in which a conductive layer on a surface of two sides of a core board in a first direction is patterned to form a core board circuit;

[0026] Fig.11 It is a structural schematic diagram of manufacturing build-up boards and build-up board circuits on both sides of a core board in a first direction according to an embodiment of the present application;

[0027] Fig.12 It is a schematic structural diagram of a second protective layer formed on the surface of a build-up board on a side away from a core board in an embodiment of the present application.

[0028] Description of reference numerals:

[0029] 1. First wafer; 2. First protective film; 3. Second protective film; 4. First chip; 5. Second wafer; 6. Third protective film; 7. First semi-finished product; 8. Fourth protective film; 9. Chip assembly; 10. Core board; 11. Accommodating cavity; 12. Carrier; 13. Adhesive layer; 14. First protective layer; 15. First through hole; 16. Conductive layer; 17. Core board circuit; 18. Build-up board; 19. Build-up board circuit; 20. Second protective layer; 21. Second chip; 110. First main body; 120. First conductive part; 510. Second main body; 520. Second conductive part. DETAILED DESCRIPTION

[0030] The preferred embodiments of the present invention are described in detail below in conjunction with the drawings in the specification, so as to fully introduce the technical content of the present invention to those skilled in the art, to illustrate that the present invention can be implemented, to make the technical content disclosed in the present invention clearer, and to make it easier for those skilled in the art to understand how to implement the present invention. However, the present invention can be embodied through many different forms of embodiments, and the protection scope of the present invention is not limited to the embodiments mentioned in the text, and the description of the embodiments below is not intended to limit the scope of the present invention.

[0031] The directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., are only directions in the drawings. The directional terms used in this article are used to explain and illustrate the present invention, rather than to limit the scope of protection of the present invention.

[0032] In the drawings, components with the same structure are represented by the same numerical numerals, and components with similar structures or functions are represented by similar numerical numerals. In addition, for ease of understanding and description, the size and thickness of each component shown in the drawings are arbitrarily shown, and the present invention does not limit the size and thickness of each component.

[0033] See also Figure 1 , Figure 1It is a flow chart of the manufacturing method of the chip embedded substrate of the embodiment of the present application. The manufacturing method of the chip embedded substrate includes: step 101, cutting a first wafer 1 to form a first chip 4; step 102, bonding the front of the first chip 4 to the front of a second wafer 5 to form a first semi-finished product 7; step 103, cutting the first semi-finished product 7 so that the second wafer 5 is cut to form a second chip 21, so that the first chip 4 and the second chip 21 bonded to each other form a chip assembly 9; step 104, patterning a core board 10 to form a receiving cavity 11; step 105, embedding the chip assembly 9 into the receiving cavity 11 of the core board 10; step 106, filling the receiving cavity 11 to form a first protective layer 14.

[0034] See also Figure 2a In some embodiments, step 101 includes: providing a first protective film 2 on the front side of the first wafer 1. Specifically, the first wafer 1 includes a first main body 110 and a first conductive part 120 provided on one side of the first main body 110. The first protective film 2 covers the side of the first conductive part 120 away from the first main body 110. That is, the front side of the first wafer 1 refers to the surface of the first conductive part 120 away from the first main body 110, and the back side of the first wafer 1 refers to the surface of the first main body 110 away from the first conductive part 120.

[0035] See also Figure 2b In some embodiments, step 101 includes: thinning the back side of the first wafer 1. Specifically, the surface of the first main body 110 away from the first conductive part 120 may be ground to reduce the thickness of the first main body 110, thereby reducing the overall thickness of the first wafer 1.

[0036] See also Figure 2c In some embodiments, step 101 includes: removing the first protective film 2 .

[0037] See also Figure 2d In some embodiments, step 101 includes: disposing a second protective film 3 on the back side of the first wafer 1 . That is, the second protective film 3 covers the surface of the first main body 110 away from the first conductive part 120 .

[0038] See also Figure 2e In some embodiments, step 101 includes: cutting the first wafer 1 to form a first chip 4. Specifically, the first wafer 1 may be cut by a cutting process such as laser cutting to form a plurality of first chips 4. Figure 2f shown.

[0039] See also Figure 2fThe first chip 4 includes a first main body portion 110 and at least two first conductive portions 120 disposed on one side of the first main body portion 110 .

[0040] See also Figure 3a In some embodiments, step 102 includes: providing a third protective film 6 on the front side of the second wafer 5. Specifically, the second wafer 5 includes a second main body 510 and a second conductive part 520 provided on one side of the second main body 510. The third protective film 6 covers the side of the second conductive part 520 away from the second main body 510. That is, the front side of the second wafer 5 refers to the surface of the second conductive part 520 away from the second main body 510, and the back side of the second wafer 5 refers to the surface of the second main body 510 away from the second conductive part 520.

[0041] See also Figure 3b In some embodiments, step 102 includes: thinning the back side of the second wafer 5. Specifically, the surface of the second main body 510 away from the second conductive part 520 may be ground to reduce the thickness of the second main body 510, thereby reducing the overall thickness of the second wafer 5.

[0042] See also Figure 3c , in some embodiments, step 102 includes: removing the third protective film 6;

[0043] See also Figure 3d In some embodiments, step 102 includes: bonding the front surface of the first chip 4 to the front surface of the second wafer 5 to form a first semi-finished product 7. Specifically, the first conductive portion 120 of the first chip 4 is bonded to the second conductive portion 520 of the second wafer 5 to form the first semi-finished product 7.

[0044] In some embodiments, the front side of the first chip 4 is bonded to the front side of the second wafer 5 by at least one of hot pressing welding, ultrasonic welding, laser welding, conductive adhesive welding and micro welding to form the first semi-finished product 7 .

[0045] See also Figure 4a In some embodiments, step 103 includes: disposing a fourth protective film 8 on the back side of the second wafer 5. That is, the fourth protective film 8 covers the surface of the second main body 510 away from the second conductive part 520.

[0046] See also Figure 4bIn some embodiments, step 103 includes: cutting the second wafer 5 of the first semi-finished product 7, the second wafer 5 is cut to form a second chip 21, and the first chip 4 and the second chip 21 bonded to each other form a chip assembly 9. Specifically, the second wafer 5 can be cut by a cutting process such as laser cutting to form a plurality of second chips 21, and the second chip 21 and the first chip 4 are combined to form a chip assembly 9.

[0047] See also Figure 4c In some embodiments, the chip assembly 9 includes a first chip 4 and a second chip 21 stacked along a first direction M. The first chip 4 and the second chip 21 are bonded to each other, and the second chip 21 and the first chip 4 are combined to form the chip assembly 9.

[0048] See also Figure 5 , the core board 10 has a first direction M. In some embodiments, step 104 includes: patterning the core board 10 by laser processing to form a receiving cavity 11 , and the receiving cavity 11 penetrates the core board 10 along the first direction M.

[0049] See also Figure 6a In some embodiments, step 105 includes: providing a glue layer 13 on a carrier 12. In some embodiments, the glue layer 13 may be a double-sided adhesive tape. Specifically, the glue layer 13 is attached to a surface of one side of the carrier 12.

[0050] See also Figure 6b In some embodiments, step 105 includes: laminating the core board 10 on the adhesive layer 13 . Specifically, the core board 10 is laminating on the surface of the adhesive layer 13 away from the carrier 12 .

[0051] See also Figure 6c In some embodiments, step 105 includes: attaching the chip assembly 9 to the adhesive layer 13 in the accommodating cavity 11 .

[0052] See also Figure 7a In some embodiments, step 106 includes: filling the accommodating cavity 11 with a protective material, curing and grinding the protective material to form a first protective layer 14, wherein the first protective layer 14 covers the side of the chip component 9 away from the carrier 12. In some embodiments, the protective material is a resin, and in other embodiments, other materials may be used to form the first protective layer 14, and the first protective layer 14 is used to protect the chip component 9 thereunder.

[0053] See also Figure 7b In some embodiments, step 106 further includes: removing the carrier 12 and the adhesive layer 13 .

[0054] Through the above scheme, the present application stacks and bonds the first chip 4 and the second chip 21 to form a chip assembly 9 and then embeds it into the accommodating cavity 11 of the core board 10. Since the overall thickness of the chip assembly 9 is less than the thickness of the core board 10, more chips can be integrated without affecting the thickness of the chip embedded substrate, thereby improving the density of the chip embedded substrate and realizing the miniaturization function of the chip embedded substrate.

[0055] See also Figure 8 In some embodiments, the method for manufacturing the chip embedded substrate further includes: patterning the core board 10 to form a first through hole 15, and the first through hole 15 penetrates the core board 10 along the first direction M. Specifically, the core board 10 is patterned by a laser process to form the first through hole 15, and the first through hole 15 penetrates the core board 10 along the first direction M.

[0056] See also Fig. 9 In some embodiments, the method for manufacturing the chip embedded substrate further includes: manufacturing a conductive layer 16 on the surface of both sides of the core board 10 in the first direction M, and the conductive layer 16 is also disposed in the first through hole 15. In some embodiments, the conductive layer 16 is manufactured by a spraying process, and the conductive layer 16 is copper. In other embodiments, the conductive layer 16 can also be manufactured by other processes and other conductive materials according to actual conditions and requirements.

[0057] See also Fig.10 In some embodiments, the method for manufacturing the chip embedded substrate further includes: patterning the conductive layer 16 on the surface of the core board 10 on both sides in the first direction M to form a core board circuit 17. In some embodiments, the conductive layer 16 on the surface of the core board 10 on both sides in the first direction M can be etched by exposure and development processes to form the core board circuit 17.

[0058] See also Fig.11 In some embodiments, the method for manufacturing the chip embedded substrate further includes: manufacturing build-up boards 18 on both sides of the core board 10 in the first direction M; and manufacturing build-up board circuits 19 on the build-up boards 18. Specifically, the build-up boards 18 are manufactured on both sides of the core board 10 in the first direction M by a lamination process. Then, the build-up boards 18 are patterned to form a second through hole (not shown), and then a conductive material layer is manufactured on the surface of the build-up board 18 away from the core board 10, and the conductive material layer is also disposed in the second through hole, and then the conductive material layer is patterned to form the build-up board circuit 19.

[0059] See also Fig.12In some embodiments, the method for manufacturing a chip embedded substrate further includes: manufacturing a second protective layer 20 on the surface of the build-up board 18 away from the core board 10, and the second protective layer 20 at least partially exposes the build-up board circuit 19. In some embodiments, the material of the second protective layer 20 is green oil. In other embodiments, the second protective layer 20 can also be made of other materials according to actual conditions and needs. The second protective layer 20 protects the structures such as the build-up board 18, the build-up board circuit 19, the core board 10, the core board circuit 17, and the chip assembly 9 thereunder. The build-up board circuit 19 is at least partially exposed by the second protective layer 20, so that the exposed build-up board circuit 19 can be connected to external components.

[0060] In some embodiments, a method for manufacturing a chip-embedded substrate includes: setting a first protective film 2 on the front side of a first wafer 1, thinning the back side of the first wafer 1, removing the first protective film 2, setting a second protective film 3 on the back side of the first wafer 1, and cutting the first wafer 1 to form a first chip 4; setting a third protective film 6 on the front side of a second wafer 5, thinning the back side of the second wafer 5, removing the third protective film 6, bonding the front side of the first chip 4 to the front side of the second wafer 5 to form a first semi-finished product 7, setting a fourth protective film 8 on the back side of the second wafer 5, cutting the second wafer 5 of the first semi-finished product 7, cutting the second wafer 5 to form a second chip 21, and the first chip 4 and the second chip 21 bonded to each other form a chip assembly 9; patterning the core board 10 by a laser process to form a receiving cavity 11, A glue layer 13 is provided on a carrier 12, a core board 10 is attached to the glue layer 13, a chip assembly 9 is attached to the glue layer 13 in a receiving cavity 11, a protective material is filled in the receiving cavity 11, the protective material is cured and ground to form a first protective layer 14, and the carrier 12 and the glue layer 13 are removed; the core board 10 is patterned to form a first through hole 15, a conductive layer 16 is made on the surface of both sides of the core board 10 in a first direction M, the conductive layer 16 on the surface of both sides of the core board 10 in the first direction M is patterned to form a core board circuit 17, build-up boards 18 are respectively made on both sides of the core board 10 in the first direction M, a build-up board circuit 19 is made on the build-up board 18, and a second protective layer 20 is made on the surface of the build-up board 18 away from the core board 10, and the second protective layer 20 at least partially exposes the build-up board circuit 19.

[0061] The above is a detailed introduction to the manufacturing method of a chip embedded substrate provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the core idea of ​​the present application; at the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for manufacturing a chip embedded substrate, characterized in that: The manufacturing method of the chip embedded substrate comprises: Cutting a first wafer (1) to form a first chip (4); Bonding the front side of the first chip (4) to the front side of a second wafer (5) to form a first semi-finished product (7); cutting the first semi-finished product (7) so that the second wafer (5) is cut into second chips (21), and the first chip (4) and the second chip (21) bonded to each other form a chip assembly (9); Performing patterning on a core board (10) to form a receiving cavity (11); Embedding the chip assembly (9) into the accommodating cavity (11) of the core board (10); The accommodating cavity (11) is filled to form a first protective layer (14).

2. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The step of cutting a first wafer (1) to form a first chip (4) comprises: Providing a first protective film (2) on the front surface of the first wafer (1); Performing a thinning process on the back side of the first wafer (1); removing the first protective film (2); Arranging a second protective film (3) on the back side of the first wafer (1); The first wafer (1) is cut into pieces to form the first chips (4).

3. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The step of bonding the front surface of the first chip (4) to the front surface of a second wafer (5) to form a first semi-finished product (7) comprises: Arranging a third protective film (6) on the front surface of the second wafer (5); Performing a thinning process on the back side of the second wafer (5); Removing the third protective film (6); The front side of the first chip (4) is bonded to the front side of the second wafer (5) to form the first semi-finished product (7).

4. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The first wafer includes a first main body and a first conductive portion disposed on one side of the first main body, and the second wafer includes a second main body and a second conductive portion disposed on one side of the second main body; The step of bonding the front surface of the first chip (4) to the front surface of a second wafer (5) to form a first semi-finished product (7) comprises: The first conductive portion of the first chip is bonded to the second conductive portion of the second wafer to form a first semi-finished product (7).

5. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The step of cutting the first semi-finished product (7) so that the second wafer (5) is cut into a second chip (21), and the first chip (4) and the second chip (21) bonded to each other form a chip assembly (9) comprises: Arranging a fourth protective film (8) on the back side of the second wafer (5); The second wafer (5) of the first semi-finished product (7) is cut to form the second chip (21). The first chip (4) and the second chip (21) bonded to each other form the chip assembly (9).

6. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The core plate (10) has a first direction (M), and the step of patterning a core plate (10) to form a receiving cavity (11) comprises: The core board (10) is patterned by laser processing to form a receiving cavity (11), and the receiving cavity (11) penetrates the core board (10) along the first direction (M).

7. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The step of embedding the chip assembly (9) into the accommodating cavity (11) of the core board (10) comprises: Disposing a glue layer (13) on a carrier (12); Laminating the core board (10) onto the adhesive layer (13); The chip assembly (9) is attached to the adhesive layer (13) in the accommodating cavity (11).

8. The method for manufacturing a chip embedded substrate according to claim 7, characterized in that: The step of filling the accommodating cavity (11) to form a first protective layer (14) comprises: Filling the containing cavity (11) with a protective material, and subjecting the protective material to a curing and grinding process to form a first protective layer (14), wherein the first protective layer (14) covers a side of the chip component (9) away from the carrier (12); The carrier (12) and the adhesive layer (13) are removed.

9. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The front side of the first chip (4) and the front side of the second wafer (5) are bonded to form a first semi-finished product (7) by using at least one of hot pressing welding, ultrasonic welding, laser welding, conductive adhesive welding and micro welding.

10. The method for manufacturing a chip embedded substrate according to claim 1, characterized in that: The core plate (10) has a first direction (M), and after the step of filling the accommodating cavity (11) to form the first protective layer (14), the step further includes: Performing patterning on the core plate (10) to form a first through hole (15), wherein the first through hole (15) penetrates the core plate (10) along the first direction (M); A conductive layer (16) is formed on the surface of both sides of the core board (10) in the first direction (M), and the conductive layer (16) is also arranged in the first through hole (15); Patterning the conductive layer (16) on the surfaces of both sides of the core board (10) in the first direction (M) to form a core board circuit (17); Making build-up plates (18) on both sides of the core plate (10) in the first direction (M); Fabricating a build-up board circuit (19) on the build-up board (18); A second protective layer (20) is formed on the surface of the build-up board (18) on a side away from the core board (10), and the second protective layer (20) at least partially exposes the build-up board circuit (19).

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