LED chip preparation method and LED chip

Abstract

The application provides an LED chip preparation method and an LED chip. The method comprises the following steps: MSA etching is performed on a GaN epitaxial layer, specifically, the MSA etching is divided into two etching processes, Cl2 is introduced to etch the GaN epitaxial layer until part of the N-type GaN layer is exposed, and then SiCl4 gas is introduced to etch again; the etched wafer is soaked in a BOE solution, and then cleaned; the cleaned wafer is patterned by a photoresist through a yellow light process, so that the area of the wafer on which metal needs to be evaporated is exposed; the wafer after the yellow light process is placed in an oxygen plasma cleaning machine, so that the residual photoresist on the surface of the wafer after development is removed; the wafer after the residual photoresist is removed is cleaned with deionized water, then metal electrodes are evaporated on the area of the wafer on which metal needs to be evaporated, and an N electrode metal layer is obtained. Through the above process, the contact resistance between the metal electrode and the N-type GaN layer can be further reduced, and the luminous brightness of the LED chip is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a LED chip preparation method and LED chip. BACKGROUND

[0002] As a kind of high efficiency, energy-saving light source, LED (Light Emitting Diode) has unique advantages in reducing chip voltage. Compared with traditional incandescent lamp and halogen lamp, the working voltage of GaN-based LED chip is generally about 3V. This makes the LED driving circuit can adopt more simple and efficient design, thereby greatly reducing the power consumption of overall system.

[0003] In recent years, with the continuous progress of LED manufacturing process, the working voltage of LED chip also presents the trend of gradually reducing. The main difficulty of reducing the voltage of LED chip is how to effectively reduce the contact resistance of metal electrode and P-type and N-type GaN. Previously, Cr, Ti, Ni and other metals have been proved to effectively reduce the contact resistance with GaN, and thus are usually used as adhesion layer metal. SUMMARY

[0004] Based on this, the purpose of the present application is to provide a LED chip preparation method and LED chip, aiming at further reducing the contact resistance of metal electrode and N-type GaN layer while improving the luminous brightness of LED chip.

[0005] According to one of the LED chip preparation methods in the embodiments of the present application, the method comprises:

[0006] providing a GaN epitaxial layer, the GaN epitaxial layer comprises N-type GaN layer, multiple quantum well layer and P-type GaN layer deposited in sequence;

[0007] MSA etching is performed on the GaN epitaxial layer, and the MSA etching is divided into two etchings, first Cl2 is introduced to etch the GaN epitaxial layer until part of the N-type GaN layer is exposed, and then SiCl4 gas is introduced to etch again;

[0008] the etched wafer is soaked in BOE solution, and then cleaned;

[0009] the cleaned wafer is patterned by photoresist through yellow light process, and the area of the wafer where metal needs to be deposited is exposed;

[0010] the wafer after yellow light process is placed in an oxygen plasma cleaning machine to remove the residual glue on the surface of the wafer after development;

[0011] the wafer after residual glue removal is cleaned with deionized water, and then metal electrode is deposited on the area of the wafer where metal needs to be deposited, to obtain N electrode metal layer.

[0012] Further, in the step of etching the GaN epitaxial layer by Cl2 until part of the N-type GaN layer is exposed, the flow rate of the Cl2 is 60-200sccm, the upper power of the ICP machine is 300-800W, the lower power is 100-300W, the etching pressure is 3-10mtorr, and the etching time is 200-600s.

[0013] Further, in the step of etching the GaN epitaxial layer by Cl2 until part of the N-type GaN layer is exposed, the etching depth is 800-2000nm.

[0014] Further, in the step of etching by Cl2 and then etching by SiCl4, the flow rate of the SiCl4 is 70-150sccm, the upper power of the ICP machine is 200-600W, the lower power is 70-200W, the etching pressure is 3-10mtorr, and the etching time is 60-300s.

[0015] Further, the etching depth of the N-type GaN layer is 100-300nm.

[0016] Further, in the step of placing the etched wafer in a BOE solution for soaking and then cleaning, the concentration of the BOE solution is 5-20%, and the soaking time is 30-180s.

[0017] Further, the mass ratio of HF to NH4F in the BOE solution is 1:10-30.

[0018] Further, in the step of cleaning the wafer after removing the residual glue by deionized water, and then evaporating a metal electrode on the wafer in the area where the metal is needed, to obtain an N-electrode metal layer, the wafer is cleaned within 2 hours before the metal is evaporated.

[0019] Further, the thickness of the GaN epitaxial layer is 3-7μm.

[0020] According to one of the embodiments of the present application, the LED chip is prepared according to the above method.

[0021] The present application has the following advantages:

[0022] The MSA etching is divided into two etching processes, first, Cl2 is introduced to etch the GaN epitaxial layer until part of the N-type GaN layer is exposed, and then SiCl4 gas is introduced to etch again; the etched wafer is soaked in a BOE solution, and then cleaned; the cleaned wafer is patterned by a photoresist through a photo-lithography process, so as to expose the area on the wafer where metal needs to be deposited; the wafer after the photo-lithography process is placed in an oxygen plasma cleaning machine to remove the residual photoresist on the surface of the wafer after development; the wafer after the residual photoresist is removed is cleaned with deionized water, and then a metal electrode is deposited on the area of the wafer where the metal needs to be deposited, so as to obtain an N-electrode metal layer; through the above process, the contact resistance between the metal electrode and the N-type GaN layer can be further reduced, and the luminous brightness of the LED chip is improved. DETAILED DESCRIPTION

[0023] The present application can be realized in many different ways and is not limited to the embodiments described herein. Rather, the present embodiments are provided so that this disclosure will be thorough and complete.

[0024] It should be noted that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements can also be present. As used herein, the terms "vertical", "horizontal", "left", "right" and the like are merely used for the purpose of explanation.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0026] The embodiment of the present application provides an LED chip preparation method, which specifically comprises the following steps:

[0027] S100: providing a substrate;

[0028] The substrate can be a sapphire substrate, and the sapphire substrate is cleaned by using a mixed solution of deionized water, ammonia water and hydrogen peroxide for ultrasonic cleaning, so as to remove organic matter and particulate matter on the surface.

[0029] S200: depositing a GaN epitaxial layer, a current blocking layer, an ITO current spreading layer, a metal electrode layer and a passivation protective layer on the substrate in sequence along an epitaxial growth direction;

[0030] The GaN epitaxial layer comprises a Si-doped N-type GaN layer, a multi-quantum well layer and a Mg-doped P-type GaN layer deposited in sequence, and the thickness of the GaN epitaxial layer is 3-7 μm.

[0031] S300: peeling off the substrate;

[0032] Specifically, S200 comprises:

[0033] S201: growing a GaN buffer layer with a thickness of 1 μm, an N-type GaN layer with a thickness of 4 μm and three periods of active layers on a sapphire substrate in sequence by MOCVD (Metal-organic Chemical Vapor Deposition) technology, wherein the thickness of a single quantum well layer is 3 nm, the thickness of a single quantum barrier layer is 12 nm, the quantum well layer is an InGaN layer and the quantum barrier layer is a GaN layer, then growing a P-type AlGaN layer with a thickness of 20 nm and a P-type GaN layer to obtain a GaN epitaxial wafer, and then cleaning the GaN epitaxial wafer with an organic solution;

[0034] S202: depositing an ITO current spreading layer on the GaN epitaxial wafer by magnetic control sputtering technology, making a pattern on the ITO current spreading layer by photolithography technology, etching the ITO current spreading layer in a specific area by wet etching with the photoresist as a mask, and then performing MSA etching on the GaN epitaxial layer, wherein the MSA etching is divided into two etching processes, first etching the GaN epitaxial layer by passing in Cl2 until part of the N-type GaN layer is exposed, and then etching again by passing in SiCl4 gas;

[0035] It should be noted that in the step of etching the GaN epitaxial layer by passing in Cl2, the flow rate of Cl2 is 60-200 sccm, the ICP machine etching upper power is 300-800 W, i.e. the plasma source power is 300-800 W, the lower power is 100-300 W, i.e. the bias power is 100-300 W, the etching gas pressure is 3-10 mtorr, the etching time is 200-600 s, and the final etching depth is 800-2000 nm.

[0036] Further, in the step of passing SiCl4 gas and etching, the flow rate of the SiCl4 gas is 70-150 sccm, the upper power of the ICP machine is 200-600 W, the lower power is 70-200 W, 3-10 mtorr, the etching time is 60-300 s, and the depth of the N-type GaN layer etched is 100-300 nm. It should be noted that the purpose of treating the surface of the N-type GaN layer etched by Cl2 with SiCl4 gas is that, after SiCl4 etching, not only can the surface of the N-type GaN layer be repaired, but also nitrogen vacancies can be formed in the N-type GaN layer, thereby producing an electron-type doping effect.

[0037] S203: The etched wafer is placed in a BOE solution for soaking, and then cleaned;

[0038] The concentration of the BOE solution is 5-20%, and the soaking time is 30-180 s. Specifically, the mass ratio of HF to NH4F in the BOE solution is 1:10-30. It should be noted that the effects of using BOE to treat the epitaxial surface etched by SiCl4 are mainly as follows: 1. After SiCl4 treatment, the wafer surface is prone to liquefaction or mutual dissolution with photoresist, thereby existing residual phenomenon. However, the BOE can react with Si elements, thereby removing the SiCl4 or photoresist that is mutually dissolved with SiCl4. In the subsequent photoresist removal process, the residual BOE solution will also be cleaned. 2. After the N-type GaN layer surface is treated, a large number of nitrogen vacancies are formed. When the wafer contacts air, an oxide with high resistance is quickly formed. However, the BOE solution can effectively remove this oxide layer, thereby forming a stable N-type GaN layer surface with low ohmic contact.

[0039] S204: The cleaned wafer is patterned by a photoresist through a photolithography process, thereby exposing the area of the wafer where metal needs to be deposited;

[0040] S205: The wafer after the photolithography process is placed in an oxygen plasma cleaning machine to remove the residual photoresist on the surface of the wafer after development;

[0041] S206: The wafer after the residual photoresist is removed is cleaned with deionized water, and then a metal electrode is deposited on the area of the wafer where the metal needs to be deposited, thereby obtaining an N-electrode metal layer. In this embodiment, the cleaned wafer is subjected to metal deposition within 2 hours.

[0042] Finally, a passivation protective layer is deposited on the entire wafer, and a hole is opened in the passivation protective layer at the corresponding position. A multi-layer metal film (such as Ti / Al / Ni / Au) is deposited on the hole through an electron beam evaporation or sputtering device, thereby forming an N-electrode metal layer and a P-electrode metal layer.

[0043] In the embodiment, trimethylaluminum (TMAl), trimethylindium (TMIn), trimethylgallium or triethylgallium (TMGa or TEGa) are used as the precursors of the Group III source, ammonia (NH3) and stibine (SbH3) are used as the precursors of the Group V source, silane (SiH4) and dimethyl magnesium (Cp2Mg) are used as the precursors of the N-type dopant and the P-type dopant respectively, and nitrogen and hydrogen are used as the carrier gas.

[0044] The application will be further described in the following specific embodiments:

[0045] Embodiment 1

[0046] The LED chip preparation method provided in the embodiment 1 of the application specifically comprises the following steps:

[0047] (1) providing a substrate;

[0048] The substrate is a sapphire substrate, and the sapphire substrate is cleaned by ultrasonic cleaning using a mixed solution of deionized water, ammonia and hydrogen peroxide to remove organic matter and particulate matter on the surface.

[0049] (2) sequentially depositing a GaN epitaxial layer, a current blocking layer, an ITO current spreading layer, a metal electrode layer and a passivation protective layer on the substrate along the epitaxial growth direction;

[0050] The GaN epitaxial layer comprises a Si-doped N-type GaN layer, a multi-quantum well layer and a Mg-doped P-type GaN layer deposited in sequence, and the thickness of the GaN epitaxial layer is 3 μm.

[0051] (3) peeling off the substrate;

[0052] Specifically, the step of sequentially depositing a GaN epitaxial layer, a current blocking layer, an ITO current spreading layer, a metal electrode layer and a passivation protective layer on the substrate along the epitaxial growth direction comprises:

[0053] Step one: growing a 1 μm-thick gallium nitride buffer layer, a 4 μm-thick N-type GaN layer and three periods of active layers on the sapphire substrate in sequence by MOCVD (Metal-organic Chemical Vapor Deposition) technology, wherein the thickness of a single quantum well layer is 3 nm, the thickness of a single quantum barrier layer is 12 nm, the quantum well layer is an InGaN layer, and the quantum barrier layer is a GaN layer, then growing a 20 nm-thick P-type AlGaN layer and a P-type GaN layer to obtain a GaN epitaxial wafer, and then cleaning the GaN epitaxial wafer with an organic solution;

[0054] Step two: ITO current spreading layer is deposited on the GaN epitaxial wafer by using magnetron sputtering technology, a pattern is made on the ITO current spreading layer by using photolithography technology, the ITO current spreading layer in the specific area is etched by using wet etching with the photoresist as a mask, then the GaN epitaxial layer is etched by MSA, the MSA etching is divided into two etching processes, first, Cl2 is introduced to etch the GaN epitaxial layer until part of the N-type GaN layer is exposed, then SiCl4 gas is introduced to etch again;

[0055] It should be noted that in the step of introducing Cl2 to etch the GaN epitaxial layer, the flow rate of Cl2 introduced is 140 sccm, the upper power of the ICP machine etching is 300 W, the lower power is 120 W, the etching gas pressure is 5mtorr, and the etching time is 540 s;

[0056] Further, in the step of introducing SiCl4 gas to etch again, the flow rate of SiCl4 gas introduced is 100 sccm, the upper power of the ICP machine etching is 400 W, the lower power is 200 W, the etching gas pressure is 10mtorr, and the etching time is 150 s.

[0057] Step three: the etched wafer is soaked in BOE solution, and then cleaned;

[0058] The concentration of the BOE solution is 10%, the soaking time is 60 s, and the wafer is fully cleaned in deionized water after soaking.

[0059] Step four: the cleaned wafer is patterned by photolithography to expose the area on the wafer where metal needs to be deposited;

[0060] Step five: the wafer after photolithography is placed in an oxygen plasma cleaning machine to remove the residual photoresist on the surface of the wafer after development;

[0061] Step six: the wafer after removing the residual photoresist is fully cleaned with deionized water, then metal electrodes are deposited on the area of the wafer where metal needs to be deposited, and an N electrode metal layer is obtained, in this embodiment, the cleaned wafer is subjected to metal deposition within 2 hours.

[0062] Further, a passivation protective layer is deposited on the whole wafer, and a hole is opened in the corresponding position of the passivation protective layer, and a multi-layer metal film is deposited on the hole by electron beam evaporation or sputtering equipment to form an N electrode metal layer and a P electrode metal layer, specifically, the N electrode metal layer is a multi-layer metal film composed of Al, Ti, Ni, Pt, Ti, Pt, and the thicknesses are 120 nm, 100 nm, 120 nm, 100 nm, 100 nm, and 100 nm, respectively.

[0063] In the embodiment, trimethylaluminum (TMAl), trimethylindium (TMIn), trimethylgallium or triethylgallium (TMGa or TEGa) are used as the precursors of the group III source, ammonia (NH3) and stibine (SbH3) are used as the precursors of the group V source, silane (SiH4) and dimethyl magnesium (Cp2Mg) are used as the precursors of the N-type dopant and the P-type dopant respectively, and nitrogen and hydrogen are used as the carrier gas.

[0064] Embodiment 2

[0065] The embodiment 2 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that the N electrode metal layer is a multi-layer metal film composed of Cr, Al, Ti, Ni, Pt, Ti, Pt, and the thicknesses are 5 nm, 120 nm, 100 nm, 120 nm, 100 nm, 100 nm, 100 nm respectively.

[0066] Embodiment 3

[0067] The embodiment 3 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that in the step of etching the GaN epitaxial layer by Cl2 until part of the N-type GaN layer is exposed, the upper power of the ICP machine is 800 W and the lower power is 300 W.

[0068] Embodiment 4

[0069] The embodiment 4 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that in the step of etching the GaN epitaxial layer by Cl2 until part of the N-type GaN layer is exposed, the etching time is 400 s.

[0070] Embodiment 5

[0071] The embodiment 5 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that in the step of etching the GaN epitaxial layer by Cl2 until part of the N-type GaN layer is exposed, the etching time is 600 s.

[0072] Embodiment 6

[0073] The embodiment 6 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that in the step of etching by Cl2 after the SiCl4 gas is introduced, the upper power of the ICP machine is 200 W and the lower power is 70 W.

[0074] Embodiment 7

[0075] The embodiment 7 of the present application also provides a preparation method of an LED chip, which is different from the embodiment 1 in that in the step of etching by Cl2 after the SiCl4 gas is introduced, the upper power of the ICP machine is 400 W and the lower power is 70 W.

[0076] Example 8

[0077] The example 8 of the present application also provides a LED chip preparation method, which is different from the example 1 in that the etching time is 60s in the step of passing SiCl4 gas and then etching.

[0078] Example 9

[0079] The example 9 of the present application also provides a LED chip preparation method, which is different from the example 1 in that the etching time is 300s in the step of passing SiCl4 gas and then etching.

[0080] Comparative Example 1

[0081] The comparative example 1 also provides a LED chip preparation method, which is different from the example 1 of the present application in that SiCl4 etching is not performed and BOE solution soaking treatment is not performed.

[0082] Comparative Example 2

[0083] The comparative example 2 also provides a LED chip preparation method, which is different from the example 2 of the present application in that SiCl4 etching is not performed and BOE solution soaking treatment is not performed.

[0084] The LED chips in the example 1 to the example 9 and the comparative example 1 and the comparative example 2 are tested under the same conditions (tested on 48mil*48mil flip chip, test current is 320mA), and the calculation method of the luminous efficiency is the light power divided by the electric power, and the specific results are as follows:

[0085] Embodiment Voltage (V) Luminous efficiency (%) Example 1 2.85 60.3 Example 2 2.78 59.6 Example 3 2.84 60.1 Example 4 2.86 59.5 Example 5 2.85 60.2 Example 6 2.86 59.8 Example 7 2.86 59.8 Example 8 2.86 59.9 Example 9 2.85 59.6 Comparative Example 1 3.62 48.3 Comparative Example 2 2.87 57.7

[0086] As can be seen from the table, the voltage of the LED chip prepared by the example of the present application is decreased to different degrees compared with the comparative examples, that is, the contact resistance of the N-type GaN layer and the metal Al is reduced, at the same time, the brightness is improved to different degrees, wherein the voltage of the LED chip prepared in the example 1 of the present application is the smallest, and the luminous brightness is the strongest.

[0087] To sum up, the LED chip preparation method and the LED chip in the embodiment of the present application can further reduce the contact resistance between the metal electrode and the N-type GaN layer while improving the luminous brightness of the LED chip by MSA etching the GaN epitaxial layer, specifically, the MSA etching is divided into two etching, first, Cl2 is introduced to etch the GaN epitaxial layer until part of the N-type GaN layer is exposed, then SiCl4 gas is introduced to etch again; the etched wafer is soaked in the BOE solution, and then cleaned; the cleaned wafer is patterned by the photoresist through the yellow light process, and the area on the wafer where the metal needs to be evaporated is exposed; the wafer after the yellow light process is placed in an oxygen plasma cleaning machine, and the residual glue on the surface of the wafer after development is removed; the wafer after the residual glue is removed is cleaned with deionized water, and then the metal electrode is evaporated on the area on the wafer where the metal needs to be evaporated, to obtain an N electrode metal layer.

[0088] The above-described embodiments only express several embodiments of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the patent of the present application. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method of manufacturing an LED chip, characterized by, The method comprises: providing a GaN epitaxial layer, the GaN epitaxial layer comprising an N-type GaN layer, a multi-quantum well layer and a P-type GaN layer deposited in sequence; performing MSA etching on the GaN epitaxial layer, the MSA etching being divided into two etching processes, first etching the GaN epitaxial layer by passing in Cl2 until part of the N-type GaN layer is exposed, and then etching by passing in SiCl4 gas; immersing the etched wafer in a BOE solution, and then cleaning; performing photoresist patterning on the cleaned wafer by a photo-lithography process to expose the area on the wafer where metal needs to be deposited; placing the wafer after the photo-lithography process in an oxygen plasma cleaning machine to remove the photoresist residue on the surface of the wafer after development; cleaning the wafer after removal of the photoresist residue with deionized water, and then depositing a metal electrode on the area of the wafer where metal needs to be deposited to obtain an N-electrode metal layer.

2. The LED chip manufacturing method according to claim 1, wherein In the step of etching the GaN epitaxial layer by passing in Cl2 until part of the N-type GaN layer is exposed, the flow rate of Cl2 is 60-200 sccm, the upper power of the ICP machine for etching is 300-800 W, the lower power is 100-300 W, the etching gas pressure is 3-10 mtorr, and the etching time is 200-600 s.

3. The LED chip manufacturing method according to claim 2, wherein In the step of etching the GaN epitaxial layer by passing in Cl2 until part of the N-type GaN layer is exposed, the etching depth is 800-2000 nm.

4. The LED chip manufacturing method according to claim 3, wherein In the step of etching by passing in SiCl4 gas, the flow rate of SiCl4 gas is 70-150 sccm, the upper power of the ICP machine for etching is 200-600 W, the lower power is 70-200 W, the etching gas pressure is 3-10 mtorr, and the etching time is 60-300 s.

5. The LED chip manufacturing method according to claim 4, wherein The depth of the N-type GaN layer etched is 100-300 nm.

6. The LED chip manufacturing method according to claim 5, wherein In the step of immersing the etched wafer in a BOE solution, and then cleaning, the concentration of the BOE solution is 5-20%, and the immersion time is 30-180 s.

7. The LED chip manufacturing method according to claim 6, wherein The mass ratio of HF to NH4F in the BOE solution is 1:10-30.

8. The LED chip manufacturing method according to claim 7, wherein In the step of cleaning the wafer after removal of the photoresist residue with deionized water, and then depositing a metal electrode on the area of the wafer where metal needs to be deposited to obtain an N-electrode metal layer, the cleaned wafer is subjected to metal deposition within 2 hours.

9. The LED chip manufacturing method according to claim 8, wherein The thickness of the GaN epitaxial layer is 3-7 μm.

10. An LED chip, characterized by The LED chip is prepared by the method according to any one of claims 1-9. The LED chip is prepared by the method according to any one of claims 1-9.