Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel, a preparation method thereof and a display device, and belongs to the technical field of display. The display panel comprises a substrate and a device layer arranged on the substrate; the packaging structure is arranged on the side, away from the substrate, of the device layer, the packaging structure comprises a plurality of packaging layers which are sequentially arranged in a stacked mode, and the packaging structure covers the display area and the non-display area of the display panel at the same time; the packaging structure further comprises a hydrogen blocking layer, and the hydrogen blocking layer is at least located between one group of two adjacent packaging layers. According to the display panel, the preparation method thereof and the display device provided by the invention, the situation of failure of the thin film transistor can be reduced, and the product performance is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel and a method for preparing the same, and a display device. Background Art

[0002] The core technology of the new flat panel display (FPD) industry is the thin film transistor (TFT) backplane technology. Compared with amorphous silicon thin film transistors, the carrier concentration of oxide thin film transistors is about ten times that of amorphous silicon thin film transistors, and the carrier mobility is 20-30 times that of amorphous silicon thin film transistors. Therefore, oxide thin film transistors can greatly increase the charge and discharge rate of thin film transistors for pixel electrodes, increase the response speed of pixels, and thus achieve a faster refresh rate.

[0003] Oxide thin-film transistors can meet the needs of applications that require fast response and large current, such as high-frequency, high-resolution, large-size displays and organic light-emitting displays. Therefore, oxide thin-film transistors have become semiconductor components for the new generation of OLED (Organic Light-Emitting Diode) display devices.

[0004] However, since the oxide semiconductor layer is easily affected by the hydrogen element in the inorganic film layer, the semiconductor layer becomes conductive, resulting in the deviation of the oxide TFT characteristics and the loss of switching characteristics. In the related technology, the H atoms in the SiN and SiON necessary for the TFE (Thin Film Encapsulation) film layer in the display device can easily pass through the device layer during the formation process, causing the TFT to lose its switching characteristics, which has a great impact on the product. Summary of the invention

[0005] The present application provides a display panel and a method for manufacturing the same, and a display device, aiming to reduce the occurrence of thin film transistor failures and improve product performance.

[0006] A first aspect of an embodiment of the present application provides a display panel, including: A substrate and a device layer disposed on the substrate; A packaging structure is arranged on a side of the device layer away from the substrate, the packaging structure comprises a plurality of packaging layers stacked in sequence, and the packaging structure covers both the display area and the non-display area of ​​the display panel; Wherein, the packaging structure further includes a hydrogen barrier layer, and the hydrogen barrier layer is located between at least a group of two adjacent packaging layers.

[0007] Optionally, the packaging structure includes a first packaging layer, a second packaging layer, a third packaging layer and a hydrogen barrier layer, and the hydrogen barrier layer is located between the first packaging layer and the second packaging layer; The orthographic projection of the first encapsulation layer on the substrate is located within the orthographic projection range of the hydrogen barrier layer on the substrate.

[0008] Optionally, the distance that the edge of the hydrogen barrier layer exceeds the edge of the first encapsulation layer is greater than 5 μm.

[0009] Optionally, the thickness of the hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm.

[0010] Optionally, the packaging structure includes a first packaging layer, a second packaging layer, a third packaging layer, a first hydrogen barrier layer and a second hydrogen barrier layer, the first hydrogen barrier layer is located between the first packaging layer and the second packaging layer, and the second hydrogen barrier layer is located between the second packaging layer and the third packaging layer; The orthographic projection of the first encapsulation layer on the substrate is located within the orthographic projection range of the first hydrogen barrier layer on the substrate.

[0011] Optionally, the distance from the edge of the first hydrogen barrier layer to the edge of the first encapsulation layer is greater than 5 μm.

[0012] Optionally, an orthographic projection of the third encapsulation layer on the substrate overlaps with an orthographic projection of the second hydrogen barrier layer on the substrate; Alternatively, the orthographic projection of the third encapsulation layer on the substrate is located within the orthographic projection range of the second hydrogen barrier layer on the substrate.

[0013] Optionally, the orthographic projection of the third encapsulation layer on the substrate is located within the orthographic projection range of the second hydrogen barrier layer on the substrate; The distance that the edge of the second hydrogen barrier layer exceeds the edge of the third packaging layer is greater than 5 μm.

[0014] Optionally, an oxygen plasma film layer is formed on a side of the first hydrogen barrier layer and / or the second hydrogen barrier layer away from the substrate.

[0015] Optionally, the thickness of the first hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm; The thickness of the second hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm.

[0016] Optionally, the material of the hydrogen barrier layer includes indium zinc oxide.

[0017] A second aspect of the embodiments of the present application provides a display device, comprising the display panel provided in the first aspect of the embodiments of the present application.

[0018] A third aspect of an embodiment of the present application provides a method for manufacturing a display panel, the method comprising: providing a substrate; forming a device layer on the substrate; Forming a packaging structure on a side of the device layer away from the substrate, the packaging structure comprising a plurality of packaging layers stacked in sequence, and the packaging structure covers both the display area and the non-display area of ​​the display panel; Wherein, the packaging structure further includes a hydrogen barrier layer, and the hydrogen barrier layer is located between at least a group of two adjacent packaging layers.

[0019] Beneficial effects: The present application provides a display panel and a preparation method thereof, and a display device, including a substrate and a device layer and a packaging structure arranged on the substrate, wherein the packaging structure includes a plurality of packaging layers and a hydrogen barrier layer stacked in sequence, wherein the packaging structure covers a display area and a non-display area of ​​the display panel at the same time, and the hydrogen barrier layer is located between at least two adjacent packaging layers; in this way, the hydrogen barrier layer can be used to prevent hydrogen elements in the packaging layer from diffusing to the location where the thin film transistor is located, thereby reducing the occurrence of a negative threshold voltage bias of the thin film transistor and improving the performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0021] Figure 1 is a schematic diagram of a planar structure of a display panel proposed in an embodiment of the present application; Figure 2 yes Figure 1 Schematic diagram of the structure of the C-C' section; Figure 3 is a schematic structural diagram of a display panel including a packaging structure of a first hydrogen barrier layer and a second hydrogen barrier layer proposed in one embodiment of the present application; Figure 4 is a schematic diagram of the structure of a device layer in a display panel proposed in one embodiment of the present application; Figure 5 It is a flowchart of the steps of a method for preparing a display panel proposed in one embodiment of the present application.

[0022] Explanation of the reference numerals: 10, substrate; 11, buffer layer; 20, thin film transistor; 21, active layer; 22, first gate insulating layer; 23, first gate electrode; 24, second gate insulating layer; 25, second gate electrode; 26, interlayer dielectric layer; 27, source electrode; 28, drain electrode; 30, light-emitting layer; 31, pixel electrode; 32, pixel defining portion; 33, light-emitting portion; 34, planar layer; 40, encapsulation structure; 41, first encapsulation layer; 42, second encapsulation layer; 43, third encapsulation layer; 44, hydrogen barrier layer; 45, first hydrogen barrier layer; 46, second hydrogen barrier layer; AA, display area; BA, non-display area. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0024] Reference Figure 1 and Figure 2 As shown, a display panel disclosed in an embodiment of the present application includes a substrate 10 , a device layer arranged on the substrate 10 , and a packaging structure 40 .

[0025] Specifically, the substrate 10 may be a flexible substrate or a rigid substrate. When the substrate 10 is a flexible substrate, the display panel may have properties such as being bendable or foldable; when the substrate 10 is a rigid substrate, the rigidity requirements of the display panel may be met; the performance of the specific substrate 10 is determined according to the actual requirements of the product.

[0026] In addition, the substrate 10 may include a single-layer structure or a multi-layer structure. Exemplarily, the substrate 10 may include a polyimide layer and a buffer layer 11 stacked in sequence; in other embodiments, the substrate 10 may also include a plurality of polyimide layers and a buffer layer 11 stacked in sequence. Among them, the buffer layer 11 may be made of materials such as silicon nitride or silicon oxide to achieve the effect of blocking water oxygen and blocking alkaline ions. It should be noted that the structure of the substrate 10 is not limited to this, and in specific applications, it can be determined according to actual needs.

[0027] The device layer will vary depending on the display panel area. Figure 2As shown, it can be understood that the display panel may include a display area AA and a non-display area BA surrounding the display area AA, wherein the display area AA is the area where the display panel emits light to display image content, and the non-display area BA does not emit light, but there are related device areas in the non-display area BA, such as the GOA (Gate Driver on Array) area and the EOA (Edge of Array) area, and TFT structures also exist in these areas.

[0028] The device layer may include a driving circuit layer and a light emitting layer 30 .

[0029] Specifically, refer to Figure 4 As shown, the portion of the driving circuit layer located in the display area AA and the non-display area BA may include a thin film transistor 20 .

[0030] The thin film transistor 20 may be a top gate type, and the thin film transistor 20 may include an active layer 21, a first gate insulating layer 22, a first gate electrode 23, a second gate insulating layer 24, a second gate electrode 25, an interlayer dielectric layer 26, a source electrode 27, and a drain electrode 28. Specifically, the active layer 21 may be formed on the buffer layer 11, the first gate insulating layer 22 covers the buffer layer 11 and the active layer 21, the first gate electrode 23 is formed on the side of the first gate insulating layer 22 away from the active layer 21, the second gate insulating layer 24 covers the gate electrode and the first gate insulating layer 22, the second gate electrode 25 is formed on the side of the second gate insulating layer 24 away from the active layer 21, the interlayer dielectric layer 26 covers the second gate electrode 25, the source electrode 27 and the drain electrode 28 are formed on the side of the interlayer dielectric layer 26 away from the substrate 10 11 and are respectively located on opposite sides of the first gate electrode 23, and the source electrode 27 and the drain electrode 28 may be in contact with opposite sides of the active layer 21 through vias (e.g., metal vias), respectively. It should be understood that the thin film transistor 20 may also be a bottom-gate type.

[0031] Reference Figure 4 As shown, the light emitting layer 30 includes a pixel electrode 31 and a pixel defining portion 32 which are sequentially formed on the interlayer dielectric layer 26 . It should be understood that the display device may further include a light emitting portion 33 .

[0032] Specifically, when the thin film transistor 20 in the display area AA is a top-gate type, a flat layer 34 may be formed before manufacturing the display device. The flat layer 34 may be a single-layer structure or a multi-layer structure. The flat layer 34 is usually made of organic materials, such as photoresist, acrylic polymer, silicon polymer, etc. The pixel electrode 31 may be electrically connected to the drain electrode 28 through a metal via. The pixel electrode 31 may be an anode. The anode may be made of materials such as ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), etc. The pixel defining portion 32 may cover the flat layer 34. The pixel defining portion 32 may be a plurality of layers. 2 can be made of organic materials, such as organic materials such as photoresist, and the portion of the pixel defining portion 32 located in the display area AA can have a pixel opening exposing the pixel electrode 31; the light-emitting portion 33 is located in the pixel opening and formed on the pixel electrode 31, and the light-emitting portion 33 can include small molecule organic materials or polymer molecule organic materials, and can be fluorescent luminescent materials or phosphorescent luminescent materials, and can emit red light, green light, blue light, or white light, etc.; and, according to different actual needs, in different examples, the light-emitting portion 33 can further include functional layers such as an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0033] Reference Figure 2 As shown, the encapsulation structure 40 is arranged on the side of the device layer away from the substrate 10, and the encapsulation structure 40 covers the display area AA and the non-display area BA of the display panel at the same time. In an embodiment of the present application, the encapsulation structure 40 includes a plurality of encapsulation layers stacked in sequence. Exemplarily, the plurality of encapsulation layers may include a first encapsulation layer 41, a second encapsulation layer 42, and a third encapsulation layer 43 stacked in sequence, the first encapsulation layer 41 and the third encapsulation layer 43 may be obtained by two chemical vapor depositions, respectively, or may be formed by a physical vapor deposition process, the materials of the first encapsulation layer 41 and the third encapsulation layer 43 may be selected from inorganic materials such as silicon nitride and silicon oxide; the second encapsulation layer 42 is made by an inkjet printing process, or may be formed by a spraying process, the material of the second encapsulation layer 42 may be acrylic-based polymers, silicon-based polymers, and the like.

[0034] In order to prevent the hydrogen element in the packaging film layer made of inorganic material from diffusing into the thin film transistor 20, causing the thin film transistor 20 to lose its switching characteristics, in an embodiment of the present application, the packaging structure 40 also includes a hydrogen barrier layer 44, which can prevent the hydrogen element from diffusing toward the thin film transistor 20, and the hydrogen barrier layer 44 is located at least between a group of two adjacent packaging layers.

[0035] Specifically, when the hydrogen barrier layer 44 has only one layer, the hydrogen barrier layer 44 can be located between any two adjacent packaging layers, so that the hydrogen barrier layer 44 can prevent the hydrogen elements in the packaging layer above it from diffusing toward the thin film transistor 20; when the hydrogen barrier layer 44 has multiple layers, the hydrogen barrier layer 44 can be located between two adjacent packaging layers respectively, thereby achieving a multi-layer barrier effect.

[0036] In this way, the hydrogen barrier layer 44 can prevent the hydrogen element in the encapsulation layer from diffusing to the location of the thin film transistor 20, thereby reducing the occurrence of a negative threshold voltage bias of the thin film transistor 20 and improving the performance of the display panel. In addition, the encapsulation structure 40 covers both the display area AA and the non-display area BA of the display panel, thereby ensuring that the thin film transistors 20 on the display panel are not affected.

[0037] Reference Figure 2 As shown, in an optional implementation, the embodiment of the present application provides a display panel, in which the encapsulation structure 40 includes a first encapsulation layer 41 , a second encapsulation layer 42 , a third encapsulation layer 43 and a hydrogen barrier layer 44 .

[0038] Specifically, the hydrogen barrier layer 44 is located between the first encapsulation layer 41 and the second encapsulation layer 42. The material of the hydrogen barrier layer 44 can be indium zinc oxide (IZO). The hydrogen barrier layer 44 of indium zinc oxide can be made by magnetron sputtering process. The amount of hydrogen used in the manufacturing process is very small, so the impact on the thin film transistor 20 is small, and the hydrogen barrier layer 44 of indium zinc oxide has a strong ability to block the diffusion of hydrogen elements, which can better ensure that the switching characteristics of the thin film transistor 20 are not affected by the diffused hydrogen elements. In addition, the hydrogen barrier layer 44 of indium zinc oxide has a low water vapor permeability at a certain thickness, which can achieve a better packaging effect.

[0039] Specifically, the thickness of the first encapsulation layer 41 (that is, the size of the first encapsulation layer 41 in the light emitting direction of the display panel) is greater than or equal to 200nm and less than or equal to 2000nm. Exemplarily, the thickness of the first encapsulation layer 41 can be 200nm, 500nm, 1000nm, 1500nm, 2000nm, etc. In the embodiment of the present application, the thickness of the first encapsulation layer 41 is preferably 1000nm.

[0040] The thickness of the second encapsulation layer 42 (that is, the size of the second encapsulation layer 42 in the light emitting direction of the display panel) is greater than or equal to 5 μm and less than or equal to 30 μm. For example, the thickness of the second encapsulation layer 42 can be 5 μm, 10 μm, 20 μm, 30 μm, etc. In the embodiment of the present application, the thickness of the second encapsulation layer 42 is preferably 10 μm.

[0041] The thickness of the third encapsulation layer 43 (that is, the size of the third encapsulation layer 43 in the light emitting direction of the display panel) is greater than or equal to 200nm and less than or equal to 2000nm. Exemplarily, the thickness of the third encapsulation layer 43 can be 200nm, 500nm, 1000nm, 1500nm, 2000nm, etc. In the embodiment of the present application, the thickness of the third encapsulation layer 43 is preferably 600nm.

[0042] The thickness of the hydrogen barrier layer 44 (that is, the size of the hydrogen barrier layer 44 in the light emitting direction of the display panel) is greater than or equal to 80nm and less than or equal to 600nm. Exemplarily, the thickness of the hydrogen barrier layer 44 can be 80nm, 100nm, 200nm, 400nm, 600nm, etc. In the embodiment of the present application, the thickness of the hydrogen barrier layer 44 is preferably 300nm to reduce the influence of the hydrogen barrier layer 44 on the efficiency of the display panel device.

[0043] Since there is a relatively thick first encapsulation layer 41 between the hydrogen barrier layer 44 and the light emitting layer 30 , the hydrogen barrier layer 44 has little effect on the efficiency and color of light emitted by the light emitting layer 30 .

[0044] At the same time, refer to Figure 2 As shown, the orthographic projection of the first encapsulation layer 41 on the substrate 10 is located within the orthographic projection range of the hydrogen barrier layer 44 on the substrate 10, that is, the hydrogen barrier layer 44 wraps the first encapsulation layer 41, so that the hydrogen barrier layer 44 can be used to prevent the hydrogen elements in the second encapsulation layer 42 and the third encapsulation layer 43 from diffusing toward the thin film transistor 20. In the embodiment of the present application, the distance that the edge of the hydrogen barrier layer 44 exceeds the edge of the first encapsulation layer 41 is greater than 5 μm.

[0045] The display panel provided by the embodiment of the present application can prevent hydrogen elements in the second encapsulation layer 42 and the third encapsulation layer 43 from diffusing into the thin film transistor 20, thereby reducing the loss of switching characteristics of the thin film transistor 20 and improving the performance of the display panel.

[0046] Reference Figure 3 As shown, in an optional implementation, the embodiment of the present application provides a display panel, in which the encapsulation structure 40 includes a first encapsulation layer 41, a second encapsulation layer 42, a third encapsulation layer 43, a first hydrogen barrier layer 45 and a second hydrogen barrier layer 46.

[0047] Specifically, the first hydrogen barrier layer 45 is located between the first encapsulation layer 41 and the second encapsulation layer 42, and the second hydrogen barrier layer 46 is located between the second encapsulation layer 42 and the third encapsulation layer 43. The materials of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 can both be indium zinc oxide (IZO). The hydrogen barrier layer 44 of indium zinc oxide can be made by a magnetron sputtering process. During the manufacturing process, the amount of hydrogen element used is very small, so the impact on the thin film transistor 20 is small, and the hydrogen barrier layer 44 of indium zinc oxide has a strong ability to block the diffusion of hydrogen elements, which can better ensure that the switching characteristics of the thin film transistor 20 are not affected by the diffused hydrogen elements. In addition, the hydrogen barrier layer 44 of indium zinc oxide has a low water vapor permeability at a certain thickness, which can achieve a better packaging effect.

[0048] Specifically, the thickness of the first encapsulation layer 41 (that is, the size of the first encapsulation layer 41 in the light emitting direction of the display panel) is greater than or equal to 200nm and less than or equal to 2000nm. Exemplarily, the thickness of the first encapsulation layer 41 can be 200nm, 500nm, 1000nm, 1500nm, 2000nm, etc. In the embodiment of the present application, the thickness of the first encapsulation layer 41 is preferably 1000nm.

[0049] The thickness of the second encapsulation layer 42 (that is, the size of the second encapsulation layer 42 in the light emitting direction of the display panel) is greater than or equal to 5 μm and less than or equal to 30 μm. For example, the thickness of the second encapsulation layer 42 can be 5 μm, 10 μm, 20 μm, 30 μm, etc. In the embodiment of the present application, the thickness of the second encapsulation layer 42 is preferably 10 μm.

[0050] The thickness of the third encapsulation layer 43 (that is, the size of the third encapsulation layer 43 in the light emitting direction of the display panel) is greater than or equal to 200nm and less than or equal to 2000nm. Exemplarily, the thickness of the third encapsulation layer 43 can be 200nm, 500nm, 1000nm, 1500nm, 2000nm, etc. In the embodiment of the present application, the thickness of the third encapsulation layer 43 is preferably 600nm.

[0051] The thickness of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 (that is, the size of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 in the light emitting direction of the display panel) is greater than or equal to 80nm and less than or equal to 600nm. Exemplarily, the thickness of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 can be 80nm, 100nm, 200nm, 400nm, 600nm, etc. In the embodiment of the present application, the thickness of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 is preferably 300nm to reduce the influence of the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 on the efficiency of the display panel device.

[0052] And, refer to Figure 3 As shown, the orthographic projection of the first encapsulation layer 41 on the substrate 10 is located within the orthographic projection range of the first hydrogen barrier layer 45 on the substrate 10, that is, the first hydrogen barrier layer 45 wraps the first encapsulation layer 41, so that the first hydrogen barrier layer 45 can be used to prevent the hydrogen elements in the second encapsulation layer 42 and the third encapsulation layer 43 from diffusing toward the thin film transistor 20. In the embodiment of the present application, the edge of the first hydrogen barrier layer 45 exceeds the edge of the first encapsulation layer 41 by more than 5 μm.

[0053] And, refer to Figure 3 As shown, the orthographic projection of the third encapsulation layer 43 on the substrate 10 overlaps with the orthographic projection of the second hydrogen barrier layer 46 on the substrate 10, or the orthographic projection of the third encapsulation layer 43 on the substrate 10 is located within the orthographic projection range of the second hydrogen barrier layer 46 on the substrate 10. That is, the second hydrogen barrier layer 46 can be the same size as the third encapsulation layer 43, or the second hydrogen barrier layer 46 can be slightly larger than the third encapsulation layer 43, so as to prevent the hydrogen element in the third encapsulation layer 43 from diffusing toward the thin film transistor 20.

[0054] In the embodiment of the present application, the orthographic projection of the third encapsulation layer 43 on the substrate 10 is within the orthographic projection range of the second hydrogen barrier layer 46 on the substrate 10 , and the edge of the second hydrogen barrier layer 46 exceeds the edge of the third encapsulation layer 43 by more than 5 μm.

[0055] In one embodiment, the surface of the first hydrogen barrier layer 45 and / or the second hydrogen barrier layer 46 on the side away from the substrate 10 may be treated with oxygen plasma to form an oxygen plasma film layer on the side of the first hydrogen barrier layer 45 and / or the second hydrogen barrier layer 46 away from the substrate 10. The oxygen plasma film layer can further increase the binding ability of hydrogen elements, thereby improving the hydrogen barrier layer 44's ability to block hydrogen elements.

[0056] It is understandable that when the packaging structure 40 includes only one hydrogen barrier layer 44 , an oxygen plasma film layer may also be formed on the surface of the hydrogen barrier layer 44 .

[0057] With the display panel provided by the embodiment of the present application, the first hydrogen barrier layer 45 and the second hydrogen barrier layer 46 can prevent the hydrogen elements in the second encapsulation layer 42 and the third encapsulation layer 43 from diffusing into the thin film transistor 20, thereby reducing the loss of switching characteristics of the thin film transistor 20 and improving the performance of the display panel.

[0058] Figure 5 A flowchart of a method for preparing a display panel is shown. Figure 5 As shown, the embodiment of the present application discloses a method for preparing a display panel, the method comprising: Step 201: Provide a substrate 10.

[0059] Specifically, the substrate 10 may be a flexible substrate or a rigid substrate. When the substrate 10 is a flexible substrate, the display panel may have properties such as being bendable or foldable; when the substrate 10 is a rigid substrate, the rigidity requirements of the display panel may be met; the performance of the specific substrate 10 is determined according to the actual requirements of the product.

[0060] Step 202 : forming a device layer on the substrate 10 .

[0061] Specifically, the device layer may include a driving circuit layer and a light emitting layer 30 .

[0062] Portions of the driving circuit layer located in the display area AA and the non-display area BA may include a thin film transistor 20 .

[0063] The thin film transistor 20 may be a top gate type, and the thin film transistor 20 may include an active layer 21, a first gate insulating layer 22, a first gate electrode 23, a second gate insulating layer 24, a second gate electrode 25, an interlayer dielectric layer 26, a source electrode 27, and a drain electrode 28. Specifically, the active layer 21 may be formed on the buffer layer 11, the first gate insulating layer 22 covers the buffer layer 11 and the active layer 21, the first gate electrode 23 is formed on the side of the first gate insulating layer 22 away from the active layer 21, the second gate insulating layer 24 covers the gate electrode and the first gate insulating layer 22, the second gate electrode 25 is formed on the side of the second gate insulating layer 24 away from the active layer 21, the interlayer dielectric layer 26 covers the second gate electrode 25, the source electrode 27 and the drain electrode 28 are formed on the side of the interlayer dielectric layer 26 away from the substrate 10 11 and are respectively located on opposite sides of the first gate electrode 23, and the source electrode 27 and the drain electrode 28 may be in contact with opposite sides of the active layer 21 through vias (e.g., metal vias), respectively. It should be understood that the thin film transistor 20 may also be a bottom-gate type.

[0064] The light emitting layer 30 includes a pixel electrode 31 and a pixel defining portion 32 which are sequentially formed on the interlayer dielectric layer 26 . It should be understood that the display device may further include a light emitting portion 33 .

[0065] Specifically, when the thin film transistor 20 in the display area AA is a top-gate type, a flat layer 34 may be formed before manufacturing the display device. The flat layer 34 may be a single-layer structure or a multi-layer structure. The flat layer 34 is usually made of organic materials, such as photoresist, acrylic polymer, silicon polymer, etc. The pixel electrode 31 may be electrically connected to the drain electrode 28 through a metal via. The pixel electrode 31 may be an anode. The anode may be made of materials such as ITO (indium tin oxide), indium zinc oxide (IZO), zinc oxide (ZnO), etc. The pixel defining portion 32 may cover the flat layer 34. The pixel defining portion 32 may be a plurality of layers. 2 can be made of organic materials, such as organic materials such as photoresist, and the portion of the pixel defining portion 32 located in the display area AA can have a pixel opening exposing the pixel electrode 31; the light-emitting portion 33 is located in the pixel opening and formed on the pixel electrode 31, and the light-emitting portion 33 can include small molecule organic materials or polymer molecule organic materials, and can be fluorescent luminescent materials or phosphorescent luminescent materials, and can emit red light, green light, blue light, or white light, etc.; and, according to different actual needs, in different examples, the light-emitting portion 33 can further include functional layers such as an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer.

[0066] Step 203 : forming a packaging structure 40 on a side of the device layer facing away from the substrate 10 .

[0067] Specifically, the encapsulation structure 40 includes a plurality of encapsulation layers stacked in sequence. Exemplarily, the plurality of encapsulation layers may include a first encapsulation layer 41, a second encapsulation layer 42, and a third encapsulation layer 43 stacked in sequence, the first encapsulation layer 41 and the third encapsulation layer 43 may be obtained by two chemical vapor depositions, respectively, or may be formed by a physical vapor deposition process, and the materials of the first encapsulation layer 41 and the third encapsulation layer 43 may be selected from inorganic materials such as silicon nitride and silicon oxide; the second encapsulation layer 42 is made by an inkjet printing process, or may be formed by a spraying process, and the materials of the second encapsulation layer 42 may be acrylic-based polymers, silicon-based polymers, and the like.

[0068] In order to prevent the hydrogen element in the packaging film layer made of inorganic material from diffusing into the thin film transistor 20, causing the thin film transistor 20 to lose its switching characteristics, in an embodiment of the present application, the packaging structure 40 also includes a hydrogen barrier layer 44, which can prevent the hydrogen element from diffusing toward the thin film transistor 20, and the hydrogen barrier layer 44 is located at least between a group of two adjacent packaging layers.

[0069] Specifically, when the hydrogen barrier layer 44 has only one layer, the hydrogen barrier layer 44 can be located between any two adjacent packaging layers, so that the hydrogen barrier layer 44 can prevent the hydrogen elements in the packaging layer above it from diffusing toward the thin film transistor 20; when the hydrogen barrier layer 44 has multiple layers, the hydrogen barrier layer 44 can be located between two adjacent packaging layers respectively, thereby achieving a multi-layer barrier effect.

[0070] In this way, the hydrogen barrier layer 44 can prevent the hydrogen element in the encapsulation layer from diffusing to the location of the thin film transistor 20, thereby reducing the occurrence of a negative threshold voltage bias of the thin film transistor 20 and improving the performance of the display panel. In addition, the encapsulation structure 40 covers both the display area AA and the non-display area BA of the display panel, thereby ensuring that the thin film transistors 20 on the display panel are not affected.

[0071] Based on the same inventive concept, an embodiment of the present application discloses a display device, comprising any display panel as described above in the embodiment of the present application.

[0072] Specifically, the display device may include a computer monitor, a television, a billboard, a laser printer with a display function, a telephone, a mobile phone, a personal digital assistant (PDA), a laptop computer, a digital camera, a camcorder, a viewfinder, a vehicle, a large-area wall, a theater screen, or a stadium sign, etc.

[0073] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0074] It should also be noted that, in this article, the orientation or position relationship indicated by the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations, nor can they be understood as indicating or implying relative importance. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. Without more restrictions, an element defined by the phrase "comprising a ..." does not exclude the existence of other identical elements in the process, method, article or terminal device comprising the element.

[0075] The technical solution provided by the present application is described in detail above. The principle and implementation method of the present application are described in this article using specific examples. The description of the above embodiments is only used to help understand the present application, and the content of this specification should not be understood as limiting the present application. At the same time, for those of ordinary skill in the art, according to the present application, there will be different forms of changes in the specific implementation methods and application scopes. It is not necessary and impossible to list all the implementation methods here, and the obvious changes or modifications derived therefrom are still within the scope of protection of the present application.

Claims

1. A display panel, characterized in that: include: A substrate and a device layer disposed on the substrate; A packaging structure is arranged on a side of the device layer away from the substrate, the packaging structure comprises a plurality of packaging layers stacked in sequence, and the packaging structure covers both the display area and the non-display area of ​​the display panel; Wherein, the packaging structure further includes a hydrogen barrier layer, and the hydrogen barrier layer is located between at least two adjacent packaging layers.

2. The display panel according to claim 1, characterized in that: The packaging structure includes a first packaging layer, a second packaging layer, a third packaging layer and a hydrogen barrier layer, and the hydrogen barrier layer is located between the first packaging layer and the second packaging layer; The orthographic projection of the first encapsulation layer on the substrate is located within the orthographic projection range of the hydrogen barrier layer on the substrate.

3. The display panel according to claim 2, characterized in that: The distance that the edge of the hydrogen barrier layer exceeds the edge of the first encapsulation layer is greater than 5 μm.

4. The display panel according to claim 2, wherein: The thickness of the hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm.

5. The display panel according to claim 1, wherein: The packaging structure includes a first packaging layer, a second packaging layer, a third packaging layer, a first hydrogen barrier layer and a second hydrogen barrier layer, wherein the first hydrogen barrier layer is located between the first packaging layer and the second packaging layer, and the second hydrogen barrier layer is located between the second packaging layer and the third packaging layer; The orthographic projection of the first encapsulation layer on the substrate is located within the orthographic projection range of the first hydrogen barrier layer on the substrate.

6. The display panel according to claim 5, characterized in that: The distance that the edge of the first hydrogen barrier layer exceeds the edge of the first encapsulation layer is greater than 5 μm.

7. The display panel according to claim 5, characterized in that: The orthographic projection of the third encapsulation layer on the substrate overlaps with the orthographic projection of the second hydrogen barrier layer on the substrate; Alternatively, the orthographic projection of the third encapsulation layer on the substrate is located within the orthographic projection range of the second hydrogen barrier layer on the substrate.

8. The display panel according to claim 7, characterized in that: The orthographic projection of the third encapsulation layer on the substrate is located within the orthographic projection range of the second hydrogen barrier layer on the substrate; The distance that the edge of the second hydrogen barrier layer exceeds the edge of the third packaging layer is greater than 5 μm.

9. The display panel according to claim 5, characterized in that: An oxygen plasma film layer is formed on a side of the first hydrogen barrier layer and / or the second hydrogen barrier layer away from the substrate.

10. The display panel according to claim 5, characterized in that: The thickness of the first hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm; The thickness of the second hydrogen barrier layer is greater than or equal to 80 nm and less than or equal to 600 nm.

11. The display panel according to claim 1, characterized in that: The material of the hydrogen barrier layer includes indium zinc oxide.

12. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-11.

13. A method for preparing a display panel, characterized in that: The preparation method comprises: providing a substrate; forming a device layer on the substrate; Forming a packaging structure on a side of the device layer away from the substrate, the packaging structure comprising a plurality of packaging layers stacked in sequence, and the packaging structure covers both the display area and the non-display area of ​​the display panel; Wherein, the packaging structure further includes a hydrogen barrier layer, and the hydrogen barrier layer is located between at least two adjacent packaging layers.

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