Display panel and electronic equipment

Abstract

According to the display panel and the electronic equipment, the display effect of the display panel is improved. The display panel includes: a substrate; a first metal layer, a second metal layer and a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are sequentially stacked on one side of the substrate; the third metal layer comprises a plurality of data lines which are arranged in parallel along the first direction, the plurality of data lines comprise a first data line and a second data line which are arranged adjacently, the second metal layer comprises a first connecting wire which extends along the first direction, and the first data line is electrically connected with the first connecting wire; the first metal layer comprises a first jumper segment extending in the first direction, the first jumper segment is electrically connected with the first connecting wire, the orthographic projection of the first jumper segment on the substrate and the orthographic projection of the second data line on the substrate intersect, and the orthographic projection of the first connecting wire on the substrate and the orthographic projection of the second data line on the substrate do not intersect.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and an electronic device. Background Art

[0002] Active-matrix organic light-emitting diode (AMOLED) combines the self-luminous properties of organic light emitting diode (OLED) with the precise control capability of active matrix. It is known for its excellent contrast, color saturation and response speed. It also has the characteristics of ultra-thin, low power consumption and flexible display. AMOLED technology is widely used in smart phones, TV screens and wearable devices.

[0003] With the development of AMOLED display technology, users have an increasing demand for high screen-to-body ratio and narrow bezels in smartphones. In order to achieve the narrow bezel design of smartphones, a display panel with fanout wiring arranged in the display area (Fanout in AA, FIAA) is provided in the related art; however, in the display panel, the layout design of the fanout wiring will cause signal crosstalk between data lines, thereby affecting the display effect. Summary of the invention

[0004] In view of this, embodiments of the present application provide a display panel and an electronic device to solve the problem in the related art that signal crosstalk occurs between data lines of the display panel, thereby causing poor display effects.

[0005] In a first aspect, the present application provides a display panel, comprising: a substrate; a first metal layer, a second metal layer and a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are sequentially stacked on one side of the substrate; the third metal layer comprises a plurality of data lines arranged in parallel along a first direction, wherein the plurality of data lines comprise a first data line and a second data line arranged adjacently, the second metal layer comprises a first connecting wire extending along the first direction, wherein the first data line is electrically connected to the first connecting wire; the first metal layer comprises a first jumper segment extending along the first direction, wherein the first jumper segment is electrically connected to the first connecting wire, an orthographic projection of the first jumper segment on the substrate intersects with an orthographic projection of the second data line on the substrate, and an orthographic projection of the first connecting wire on the substrate does not intersect with an orthographic projection of the second data line on the substrate.

[0006] In some embodiments, the third metal layer also includes a power line extending along the second direction; the second metal layer also includes a second jumper segment electrically connected to the power line, and the orthographic projection of the intersection position on the substrate is within the orthographic projection of the second jumper segment on the substrate.

[0007] In some embodiments, the second jumper segment includes a first routing segment, a second routing segment, and a third routing segment connected in sequence, the first routing segment and the third routing segment extend along a first direction, the second routing segment extends along a second direction, and the orthographic projection of the second routing segment on the substrate is located within the orthographic projection of the second data line on the substrate.

[0008] In some embodiments, the intersection position is located at a middle position of an orthographic projection of the first jumper segment on the substrate.

[0009] In some embodiments, the display panel further includes a multiplexer circuit, and the plurality of data lines are electrically connected to the multiplexer circuit; the multiplexer circuit is configured to sequentially provide data voltages to the first data line and the second data line.

[0010] In some embodiments, the plurality of data lines include a plurality of odd-numbered data lines and a plurality of even-numbered data lines arranged alternately; the number of first jumper segments is a plurality, the plurality of first jumper segments are arranged at intervals from each other, and the orthographic projections of the plurality of first jumper segments on the substrate intersect with the orthographic projections of the plurality of even-numbered data lines on the substrate respectively. Preferably, there is a one-to-one correspondence between the first jumper segments and the even-numbered data lines.

[0011] In some embodiments, the second metal layer also includes a second connecting trace extending along the first direction, and the second connecting trace is electrically connected to the even-numbered column data line; the first metal layer includes a third jumper segment extending along the first direction, and the third jumper segment is electrically connected to the second connecting trace, and the orthographic projection of the third jumper segment on the substrate intersects with the orthographic projection of at least one odd-numbered column data line on the substrate.

[0012] In some embodiments, the second metal layer also includes a second connecting line extending along the first direction, and the second connecting line is electrically connected to the even-numbered column data lines; the third metal layer also includes multiple power lines, and the multiple power lines and the multiple data lines are alternately arranged along the first direction; the second metal layer also includes multiple second jumper segments, and the multiple second jumper segments are respectively electrically connected to the multiple power lines, and there is a corresponding relationship between the second jumper segments and the data lines, and there is an overlapping area between the orthographic projection of the second jumper segment on the substrate and the orthographic projection of the corresponding data line on the substrate, and the overlapping area intersects with the orthographic projection of the first connecting line or the second connecting line on the substrate.

[0013] In some embodiments, the display panel further comprises a planarization layer and an insulating layer, the planarization layer is disposed between the third metal layer and the second metal layer, and the insulating layer is disposed between the second metal layer and the first metal layer. Preferably, the insulating layer comprises a via hole, and the first jumper segment is electrically connected to the first connecting line through the via hole.

[0014] A second aspect of the present application provides an electronic device, comprising the display panel provided by the first aspect.

[0015] In the display panel and electronic device provided by the present application, the first connecting line jumps from the second metal layer to the first metal layer within a certain range of the intersection position of the first connecting line and the second data line, thereby increasing the distance between the two and reducing the coupling effect at the intersection position, thereby avoiding the crosstalk problem between the data lines. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or structures.

[0017] Figure 1 Shown is a schematic diagram of a top view structure of a display panel in the related art.

[0018] Figure 2 Shown is a schematic diagram of the display effect of a display panel in the related art.

[0019] Figure 3 Shown is a schematic diagram of a top view of the structure of a display panel provided in an embodiment of the present application.

[0020] Figure 4 Shown Figure 3 The diagram shown is a partial enlarged schematic diagram of the display panel in area B.

[0021] Figure 5 Shown Figure 3 The schematic diagram of the structure of part of the film layer of the display panel in area B is shown.

[0022] Figure 6 Shown is a schematic diagram of a top view of the structure of a display panel provided in another embodiment of the present application.

[0023] Figure 7 Shown Figure 6 The schematic diagram of the structure of part of the film layer of the display panel in the F area is shown.

[0024] Figure 8 Shown Figure 6 The shown diagram is a partial enlarged schematic diagram of the display panel in the F area.

[0025] Fig. 9 Shown is a schematic top view of the structure of a display panel provided in yet another embodiment of the present application.

[0026] Fig.10 Shown is a schematic top view of the structure of a display panel provided in yet another embodiment of the present application. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of this specification to clearly and completely describe the technical solutions in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this specification.

[0028] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0029] In the related art, in order to realize the narrow frame design of the display panel, the fan-out wiring is routed in the design of the pixel area of ​​the display area. The source fan-out wiring output from the source IC enters the display area and is electrically connected to the data line of the display area.

[0030] In the process of implementing the present invention, the inventors found that the related art has the following problems: Figure 1 FIG. 1 is a schematic diagram of a top view structure of a display panel in the related art. Figure 1 As shown, the display panel includes a plurality of data lines D1, D2, ..., D2n-1, D2n extending along the second direction and arranged in parallel with each other, and a plurality of fan-out routing lines. Each fan-out routing line includes a first fan-out routing line segment FL1 extending along the first direction, and a second fan-out routing line segment FL2 extending along the second direction, wherein the first direction intersects with the second direction. One end of the first fan-out routing line segment FL1 is electrically connected to the data line, and the other end is electrically connected to one end of the second fan-out routing line segment FL2; the other end of the second fan-out routing line segment FL2 extends to the frame area of ​​the display panel.

[0031] observe Figure 1 It can be found that the data line extending along the second direction and the first fan-out routing segment extending along the first direction have an overlapping area, and parasitic capacitance is easily generated in the overlapping area, so that the display panel generates the following when it is lit: Figure 2 The blue line shown affects the display effect. Figure 2 Figure 2 Figure 2

[0032] In view of this, the present application provides a display panel, comprising: a substrate; a first metal layer, a second metal layer and a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are sequentially stacked on one side of the substrate; the third metal layer comprises a plurality of data lines arranged in parallel along a first direction, the plurality of data lines comprise a first data line and a second data line arranged adjacently, the second metal layer comprises a first connecting wire extending along the first direction, the first data line and the first connecting wire are electrically connected; the first metal layer comprises a first jumper segment extending along the first direction, the first jumper segment is electrically connected to the first connecting wire, an orthographic projection of the first jumper segment on the substrate and an orthographic projection of the second data line on the substrate intersect at an intersection, and an orthographic projection of the first connecting wire on the substrate and an orthographic projection of the second data line on the substrate do not intersect.

[0033] Through the above design, the crosstalk problem between data lines in the display panel can be solved and the display effect can be improved. The technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0034] An embodiment of the present application provides a display panel. The display panel includes a substrate, a first metal layer, a second metal layer, and a third metal layer. The first metal layer, the second metal layer, and the third metal layer are sequentially stacked on one side of the substrate. In addition to the film layer structure described above, other functional film layers, such as an insulating layer, a planarization layer, etc., may be arranged between the film layers. The display panel may also include a fourth metal layer, which is arranged between the first metal layer and the second metal layer to form a signal routing line.

[0035] Figure 3 FIG. 1 is a schematic diagram of a top view of a display panel provided in an embodiment of the present application. Figure 3 As shown, the display panel includes a display area and a non-display area. The display area includes a plurality of data lines arranged in parallel along a first direction. The plurality of data lines extend along a second direction and are all arranged in a third metal layer (i.e., the metal layer M4 in the display panel provided by the above-mentioned related technology). The plurality of data lines include a first data line D1 and a second data line D2 that are arranged adjacent to each other. The display area AA also includes a first connecting wire 10 extending along a first direction, and the first direction intersects with the second direction; the first connecting wire 10 is arranged in a second metal layer (i.e., the metal layer M3 in the display panel provided by the above-mentioned related technology). The first end of the first connecting wire 10 is electrically connected to the first data line D1 through a via in the film layer, and the second end of the first connecting wire 10 is electrically connected to the fan-out wire of the display panel.

[0036] The first metal layer of the display panel includes a first jumper segment extending along a first direction, and the first jumper segment is electrically connected to the first connecting wire. Figure 4 Shown Figure 3 The partial enlarged schematic diagram of the display panel in area B is shown. Figure 4 As shown, the first jumper segment 20 (indicated by a dotted line) is disposed near the overlapping region of the second data line D2 and the first connecting wire 10 in the extending direction. The first end of the first jumper segment 20 is electrically connected to the C point of the first connecting wire 10, and the second end of the first jumper segment 20 is electrically connected to the D point of the first connecting wire 10, thereby realizing the electrical connection between the first jumper segment 20 and the first data line D1.

[0037] The orthographic projection of the first jumper segment 20 on the substrate and the orthographic projection of the second data line D2 on the substrate intersect at position E, and the orthographic projection of the first connection line 10 on the substrate and the orthographic projection of the second data line D2 on the substrate do not intersect. That is, in the second metal layer, no metal line is set between the position of point C and the position of point D of the first connection line 10, but the electrical connection between the position of point C and the position of point D of the first connection line 10 is realized by the first jumper segment 20 in the first metal layer.

[0038] Figure 5 Shown Figure 3 The structure diagram of part of the film layer of the display panel in area B is shown in FIG. Figure 5 As shown, a first insulating layer 72, a first metal layer 73 (a film layer where the first jumper segment 20 is located), a second insulating layer 74, a planarization layer 75, and a third metal layer 76 (a film layer where the second data line D2 is located) are sequentially arranged above the substrate 71. The substrate 71 may be a flexible substrate including a buffer layer, a barrier layer, or a polyimide film layer. The first insulating layer 72 may be a gate insulating layer, the second insulating layer 74 may be a capacitor insulating layer and / or an interlayer dielectric layer, and both the first insulating layer 72 and the second insulating layer 74 are inorganic insulating layers.

[0039] It is understandable that the film layer structure described above is only exemplary, and those skilled in the art can design and adjust it according to actual application scenarios.

[0040] contrast Figure 2 It can be found that at the intersection position of the orthographic projection, the vertical distance between the first jumper segment 20 electrically connected to the first data line D1 and the second data line D2 increases, so that the parasitic capacitance between the two is reduced during the display process. It can be understood that the above-mentioned intersection position refers to the intersection position of the orthographic projection of the first jumper segment on the substrate and the orthographic projection of the second data line on the substrate, and the partial area of ​​the film layer above the substrate corresponding to the intersection position, rather than meaning that the two lines are in contact with each other.

[0041] Through the above settings, the first connecting line jumps from the second metal layer to the first metal layer within a certain range of the intersection position with the orthographic projection of the second data line, thereby increasing the distance between the two and reducing the coupling effect at the intersection position, thereby avoiding the crosstalk problem between data lines.

[0042] It is understandable that the jumper length of the first connecting line (ie, the length of the first jumper segment) can be designed according to the actual line layout, and the present application does not impose any specific limitation on this.

[0043] In some embodiments, continue to refer to Figure 4 The intersection position E is located at the middle position of the orthographic projection of the first jumper segment on the substrate. Such a setting helps to reduce the stress concentration problem in the preparation process and improve the overall stability.

[0044] In some embodiments, the display panel further includes a multiplexer (Mux) circuit, and the plurality of data lines are electrically connected to the Mux circuit. The Mux circuit can sequentially provide data voltages to the first data line and the second data line, and the data voltages can control the brightness of the pixel units in the display area to realize the display function of the display panel.

[0045] The Mux circuit specifically includes a Mux1 circuit and a Mux2 circuit. First, the Mux1 circuit provides the corresponding data voltage to the first data line. Then, the Mux1 circuit is closed, and the Mux2 circuit provides the corresponding data voltage to the second data line. In this process, at the intersection of the orthographic projections of the first jumper segment and the second data line on the substrate, the parasitic capacitance generated in the film layer structure between the first jumper segment and the second data line decreases as the distance between the two increases. Compared with Figure 2 As shown in the related technology, the distance between the first jumper segment and the second data line in the embodiment of the present application is increased, and the coupling effect is reduced, thereby avoiding the crosstalk problem between the data lines when the data potential in the second data line controlled by the Mux2 circuit jumps.

[0046] Continue to refer Figure 2 , Figure 5 In the embodiment of the present application, the first connection line jumps from the second metal layer to the first metal layer within a certain range of the intersection position of the orthographic projection with the second data line; therefore, within a certain range of the intersection position of the orthographic projection, no metal line is provided in the second metal layer. Based on this, another embodiment of the present application provides a display panel.

[0047] Figure 6 FIG. 2 is a schematic diagram of a top view of a display panel provided by another embodiment of the present application. Figure 6 As shown, the wiring distribution of some of the display panels is Figure 3The display panel shown is similar to the one shown in the figure, but different from it, the third metal layer of the display panel in the embodiment of the present application further includes a power line 30, which extends along the second direction and is located on the side of the second data line D2 away from the first data line D1. The power line 30 is used to transmit the positive power voltage ELVDD.

[0048] The second metal layer further includes a second jumper segment 40 (indicated by a dot-dash line), and the second jumper segment 40 is electrically connected to the power line 30. The orthographic projection of the first jumper segment on the substrate and the orthographic projection of the second data line D2 on the substrate intersect at a position, and the orthographic projection of the intersection on the substrate is located within the orthographic projection of the second jumper segment 40 on the substrate.

[0049] Figure 7 Shown Figure 6 The structure diagram of part of the film layer of the display panel in the F area is shown in FIG. Figure 7 As shown, the display panel further includes an insulating layer 74 and a planarization layer 75. The insulating layer 74 is disposed between the second metal layer 91 (the film layer where the second jumper segment 40 is located) and the first metal layer 73 (the film layer where the first jumper segment 20 is located), and the planarization layer 75 is disposed between the third metal layer 76 (the film layer where the second data line D2 is located) and the second metal layer 91.

[0050] Optionally, the insulating layer includes a via hole, and the first jumper segment and the first connecting wire are electrically connected through the via hole.

[0051] Continue to refer Figure 7 , viewed from a direction perpendicular to the plane where the display panel is located, the second jumper segment 40 is located between the first jumper segment 20 and the second data line D2. Since the voltage in the second jumper segment 40 is 4.6V, and the data signal voltages in the first jumper segment 20 and the second data line D2 are generally 2 to 7V; therefore, the ELVDD in the second jumper segment 40 can shield the coupling effect between the first jumper segment 20 and the second data line D2.

[0052] The implementation of this embodiment benefits from the jumper design for the first connecting line in the above embodiments. By combining the shielding effect of ELVDD in this embodiment with the jumper design that can increase the spacing between data lines, the parasitic capacitance between data lines is further reduced, thereby avoiding signal crosstalk problems and improving display effects.

[0053] Figure 8 Shown Figure 6 The partial enlarged schematic diagram of the display panel in the F area is shown. Figure 8As shown, the second jumper segment includes a first routing segment 41, a second routing segment 42 and a third routing segment 43 connected in sequence, wherein the first routing segment 41 and the third routing segment 43 extend along a first direction, and the second routing segment 42 extends along a second direction. The orthographic projection of the second routing segment 42 on the substrate is located within the orthographic projection of the second data line D2 on the substrate, and the orthographic projection of the second routing segment 42 on the substrate passes through the intersection of the orthographic projection of the first jumper segment on the substrate and the orthographic projection of the second data line on the substrate. Optionally, the intersection is located in the middle of the orthographic projection of the second routing segment 42 on the substrate. Such an arrangement reduces the design complexity, helps to simplify the routing layout and path planning, and improves the overall stability.

[0054] The above describes the implementation of the technical solution in the embodiment of the present application between two adjacent data lines through the first data line, the second data line and the first connecting line. As described above, the display panel usually includes multiple data lines. The following further describes the implementation of the technical solution in the embodiment of the present application between multiple data lines in conjunction with the accompanying drawings.

[0055] Fig. 9 FIG. 2 is a schematic diagram of a top view of a display panel provided by another embodiment of the present application. Fig. 9 As shown, the third metal layer of the display panel includes a plurality of data lines D1, D2, ..., D2n-1, D2n extending along the second direction, the plurality of data lines include a plurality of odd-numbered column data lines (such as D1, D2n-1) and a plurality of even-numbered column data lines (such as D2, D2n) arranged alternately, the plurality of odd-numbered column data lines are powered by the Mux1 circuit, and the plurality of even-numbered column data lines are powered by the Mux2 circuit.

[0056] The second metal layer of the display panel includes a first connecting wire 10 extending along a first direction, and the first connecting wire 10 is electrically connected to one data line (such as D1) among a plurality of odd-numbered column data lines. The first metal layer of the display panel includes a plurality of first jumper segments 20 extending along the first direction, and the plurality of first jumper segments 20 are arranged at intervals from each other. The plurality of first jumper segments 20 are electrically connected to the first connecting wire 10, and the first connecting wire 10 is not arranged in the area corresponding to the position of the first jumper segment 20 in the second metal layer, and the first connecting wire 10 uses the plurality of first jumper segments 20 to realize data signal transmission. Based on this, the orthographic projection of the first connecting wire 10 on the substrate does not intersect with the orthographic projection of the even-numbered column data line on the substrate, while the orthographic projections of the plurality of first jumper segments 20 on the substrate intersect with the orthographic projections of the plurality of even-numbered column data lines on the substrate respectively.

[0057] Through the above arrangement, the first connecting line jumps from the second metal layer to the first metal layer within a certain range of the intersection position with the orthographic projection of the even-numbered column data line, thereby increasing the spacing between the first connecting line and the even-numbered column data line. Figure 1The display panel shown reduces the coupling effect at the intersection of the orthographic projections, thereby avoiding the crosstalk problem between data lines.

[0058] In some embodiments, there is a one-to-one correspondence between the first jumper segments and the even-numbered data lines, that is, each first jumper segment corresponds to an even-numbered data line, so as to avoid crosstalk between the first connecting wires and the even-numbered data lines.

[0059] In some embodiments, the number of first connection lines in the second metal layer is multiple. The multiple first connection lines extend along the first direction and are arranged in parallel. Each first connection line is electrically connected to one of the multiple odd-numbered data lines, respectively, for transmitting the data signal in the corresponding data line. At this time, each first connection line jumps from the second metal layer to the first metal layer within a certain range of the intersection position with the orthographic projection of the even-numbered data line.

[0060] observe Figure 1 It can be found that parasitic capacitance is also generated in the film layer of the overlapping area between the transverse windings of the even-numbered columns of data lines and the odd-numbered columns of data lines.

[0061] Similarly, to solve this problem, another embodiment of the present application provides a display panel. Fig.10 As shown, the partial wiring distribution of the display panel is similar to that of the display panel in the above embodiment, except that the second metal layer of the display panel also includes a second connecting wiring 50 extending along the first direction, and the second connecting wiring 50 is electrically connected to one of the multiple even-numbered column data lines (such as D2).

[0062] The first metal layer of the display panel includes a third jumper segment 60 (indicated by a dotted line) extending along the first direction, and the third jumper segment 60 is electrically connected to the second connecting wire 50. The orthographic projection of the third jumper segment 60 on the substrate intersects with the orthographic projection of at least one odd-numbered column data line (such as D2n-1) on the substrate, while the orthographic projection of the second connecting wire 50 on the substrate does not intersect with the orthographic projection of the odd-numbered column data line on the substrate.

[0063] Through the above arrangement, the second connecting line jumps from the second metal layer to the first metal layer within a certain range of the intersection position with the positive projection of the odd-numbered column data line, thereby increasing the spacing between the second connecting line and the odd-numbered column data line. Figure 1 The display panel shown reduces the coupling effect at the intersection of the orthographic projections, thereby avoiding the crosstalk problem between data lines.

[0064] In some embodiments, the number of second connection lines in the second metal layer is multiple. The multiple second connection lines extend along the first direction and are arranged in parallel. Each second connection line is electrically connected to one of the multiple even-numbered data lines, respectively, for transmitting the data signal in the corresponding data line. At this time, each second connection line jumps from the second metal layer to the first metal layer within a certain range of the intersection position with the orthographic projection of the odd-numbered data line.

[0065] Similar to the above embodiment, in the film layer of the overlapping region of the second connecting wiring and the odd-numbered column data lines, ELVDD can also be used to shield the coupling effect between the two.

[0066] Based on this, the third metal layer of the display panel may include a plurality of power lines, and the plurality of power lines and the plurality of data lines are alternately arranged along the first direction.

[0067] The second metal layer of the display panel may further include a plurality of second jumper segments, each of which is electrically connected to one of the plurality of power lines, and the second jumper segments correspond to the data lines. The orthographic projection of the second jumper segment on the substrate overlaps with the orthographic projection of the corresponding data line on the substrate, and the overlapped area intersects with the orthographic projection of the first connecting wire or the second connecting wire on the substrate.

[0068] For example, continue to refer to Fig.10 , within a certain range of the intersection position of the second connecting line 50 and the orthographic projection of the odd-numbered column data line D2n-1, the power line 30 on one side of the data line D2n-1 is jumped from the third metal layer to the second metal layer, and the orthographic projection of the second jumper segment 40 corresponding to the data line D2n-1 on the substrate has an overlapping area F with the data line D2n-1, and the overlapping area F intersects with the orthographic projection of the second connecting line 50 on the substrate.

[0069] Through the above configuration, the ELVDD can be used to shield the coupling effect between the odd-numbered column data lines and the second connecting wires, and the coupling effect between the even-numbered column data lines and the first connecting wires, thereby further improving the display effect.

[0070] Based on the same inventive concept, the present application also provides an electronic device, including the display panel provided in the above embodiments of the present application. In the embodiments of the present application, the electronic device may include a mobile phone, a tablet computer, a smart wearable device, a television, a laptop computer, a display, and other devices with display functions. The present application does not specifically limit the specific form of the electronic device.

[0071] Since the principle of solving the problem in the electronic device embodiment is similar to that in the above-mentioned display panel embodiment, the implementation of the electronic device embodiment may refer to the implementation of the above-mentioned display panel embodiment, and the repeated parts will not be repeated.

[0072] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0073] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the appended claims.

Claims

1. A display panel, characterized in that: include: substrate; A first metal layer, a second metal layer and a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are sequentially stacked on one side of the substrate; The third metal layer includes a plurality of data lines arranged in parallel along a first direction, the plurality of data lines include a first data line and a second data line arranged adjacent to each other, the second metal layer includes a first connecting wire extending along the first direction, the first data line and the first connecting wire are electrically connected; The first metal layer includes a first jumper segment extending along a first direction, the first jumper segment is electrically connected to the first connecting line, the orthographic projection of the first jumper segment on the substrate and the orthographic projection of the second data line on the substrate intersect at an intersection, and the orthographic projection of the first connecting line on the substrate and the orthographic projection of the second data line on the substrate do not intersect.

2. The display panel according to claim 1, characterized in that: The third metal layer further includes a power line, and the power line extends along the second direction; The second metal layer further includes a second jumper segment, the second jumper segment is electrically connected to the power line, and the orthographic projection of the intersection position on the substrate is located within the orthographic projection of the second jumper segment on the substrate.

3. The display panel according to claim 2, characterized in that: The second jumper segment includes a first routing segment, a second routing segment and a third routing segment connected in sequence, the first routing segment and the third routing segment extend along the first direction, the second routing segment extends along the second direction, and the orthographic projection of the second routing segment on the substrate is located within the orthographic projection of the second data line on the substrate.

4. The display panel according to claim 1, characterized in that: The intersection position is located at a middle position of an orthographic projection of the first jumper segment on the substrate.

5. The display panel according to claim 1, characterized in that: It also includes a multiplexer circuit, and the multiple data lines are electrically connected to the multiplexer circuit; the multiplexer circuit is configured to provide data voltages to the first data line and the second data line in sequence.

6. The display panel according to claim 1, characterized in that: The plurality of data lines include a plurality of odd-numbered column data lines and a plurality of even-numbered column data lines that are alternately arranged; There are a plurality of first jumper segments, the plurality of first jumper segments are arranged at intervals from each other, and the orthographic projections of the plurality of first jumper segments on the substrate respectively intersect with the orthographic projections of the plurality of even-numbered column data lines on the substrate; Preferably, there is a one-to-one correspondence between the first jumper segments and the even-numbered column data lines.

7. The display panel according to claim 6, characterized in that: The second metal layer further includes a second connecting wire extending along the first direction, and the second connecting wire is electrically connected to the even-numbered column data wire; The first metal layer includes a third jumper segment extending along a first direction, the third jumper segment is electrically connected to the second connecting wire, and an orthographic projection of the third jumper segment on the substrate intersects with an orthographic projection of at least one of the odd-numbered column data lines on the substrate.

8. The display panel according to claim 6, characterized in that: The second metal layer further includes a second connecting wire extending along the first direction, and the second connecting wire is electrically connected to the even-numbered column data wire; The third metal layer further includes a plurality of power lines, and the plurality of power lines and the plurality of data lines are alternately arranged along the first direction; The second metal layer also includes multiple second jumper segments, which are electrically connected to the multiple power lines respectively. The second jumper segments correspond to the data lines. The orthographic projections of the second jumper segments on the substrate and the orthographic projections of the corresponding data lines on the substrate have overlapping areas, and the overlapping areas intersect with the orthographic projections of the first connecting wire or the second connecting wire on the substrate.

9. The display panel according to claim 1, characterized in that: The device further comprises a planarization layer and an insulating layer, wherein the planarization layer is disposed between the third metal layer and the second metal layer, and the insulating layer is disposed between the second metal layer and the first metal layer; Preferably, the insulating layer includes a via hole, and the first jumper segment is electrically connected to the first connecting wire through the via hole.

10. An electronic device, characterized in that: A display panel comprising any one of claims 1 to 9.

Images