Treatment access for substrate support

Abstract

Methods and apparatus for processing a substrate are provided herein. In some embodiments, a process kit for a substrate support includes an upper edge ring made of quartz and having an upper surface and a lower surface, where the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring.

Description

Technical Field

[0001] Embodiments of the present disclosure relate generally to substrate processing facilities and, more particularly, are directed to process kits for substrate supports and methods of using the same. Background Art

[0002] Substrate processing systems (e.g., plasma reactors) may be used to deposit, etch, or form layers on a substrate or to treat a substrate surface. One technique useful for controlling aspects of such substrate processing is to use radio frequency (RF) energy to control a plasma proximate to a substrate, such as by coupling RF energy to an electrode disposed below the substrate (disposed on a substrate support).

[0003] The inventors herein provide embodiments of a substrate processing system that can provide improved RF energy control of the substrate processing system and flexible control of the plasma sheath near the edge of the wafer. Summary of the invention

[0004] Methods and apparatus for processing substrates are provided herein. In some embodiments, a processing accessory for a substrate support includes: an upper edge ring made of quartz and having an upper surface and a lower surface, wherein the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring.

[0005] In some embodiments, a substrate support comprises: a lower edge ring, wherein the lower edge ring is conductive; and an upper edge ring, the upper edge ring having a wavy lower surface configured to intersect the lower edge ring, the upper edge ring further having an inner diameter smaller than the inner diameter of the lower edge ring and an outer diameter larger than the outer diameter of the lower edge ring, the upper edge ring further having an upper surface, the upper surface being substantially planar, wherein the upper edge ring is made of quartz.

[0006] In some embodiments, a substrate support comprises: a base supporting a substrate supporting surface configured to support a substrate having a given diameter; and a processing accessory disposed atop the substrate support and comprising: a lower edge ring having an upper surface disposed at a height greater than the upper surface of the base and less than the substrate supporting surface; and an upper edge ring disposed atop the lower edge ring, the upper edge ring having an inner diameter less than the given diameter and an outer diameter greater than the outer diameter of the base, the upper edge ring further having a substantially planar upper surface.

[0007] Other and further embodiments of the disclosure are described below. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The manner in which the above-described features of the present disclosure may be understood in detail may be understood by reference to the illustrative embodiments of the disclosure depicted in the accompanying drawings (briefly summarized above and discussed in more detail below). However, the accompanying drawings illustrate only typical embodiments of the disclosure and are therefore not to be considered limiting of the scope of the disclosure, as the disclosure may admit to other equally effective embodiments.

[0009] Figure 1 A schematic diagram of a plasma reactor is depicted in accordance with some embodiments of the present disclosure.

[0010] Figure 2 A schematic side view of a substrate support is depicted in accordance with some embodiments of the present disclosure.

[0011] Figure 3 A partially schematic side view of a substrate support is depicted in accordance with some embodiments of the present disclosure.

[0012] Figure 4 A side cross-sectional view of a lower edge ring for a substrate support is depicted in accordance with some embodiments of the present disclosure.

[0013] Figure 4A Depiction Figure 4 Partial side cross-sectional view of the lower edge ring of .

[0014] Figure 5 A side cross-sectional view of an upper edge ring for a substrate support is depicted in accordance with some embodiments of the present disclosure.

[0015] Figure 5A Depiction Figure 5 Partial side cross-sectional view of the upper edge ring.

[0016] Figure 6 A side cross-sectional view of a lower edge ring is depicted according to some embodiments of the present disclosure.

[0017] Fig. 6A Depiction Figure 6 Partial side cross-sectional view of the lower edge ring of .

[0018] Figure 7 A side cross-sectional view of an upper edge ring is depicted according to some embodiments of the present disclosure.

[0019] Fig. 7A Depiction Figure 7 Partial side cross-sectional view of the upper edge ring.

[0020] For ease of understanding, the same reference numerals are used whenever possible to indicate common and identical elements in the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. DETAILED DESCRIPTION

[0021] Disclosed herein are methods and apparatus for processing substrates. The disclosed methods and apparatus can advantageously facilitate more uniform plasma processing of substrates compared to conventional plasma processing apparatus. For example, embodiments of the present disclosure can improve processing uniformity, such as etching uniformity, between the edge of a substrate and the center of a substrate, thereby providing more uniform overall substrate processing.

[0022] For example, the inventors have discovered that during etching processes on certain substrates (e.g., semiconductor wafers), center-to-edge non-uniformity in etch volume is found. Specifically, the inventors have discovered that the substrate edge acts like an RF antenna, causing the electric field in the processing chamber to be localized and attracted to the substrate edge during processing with an applied RF bias. As a result, plasma strikes on the substrate edge also become localized and stronger. The inventors have discovered an inventive edge ring design that includes two edge ring components: an upper edge ring and a lower edge ring, as discussed in more detail below. The upper edge ring is made of quartz, has a higher etch resistance and produces fewer defects / particles inside the chamber during processing. The lower edge ring can be made of a conductive material or a high dielectric constant material, such as aluminum. The conductive or high dielectric constant lower edge ring raises the RF conductive surface and changes the electric field near the substrate edge. The change in the electric field advantageously shifts the plasma strikes from the substrate edge to the upper edge ring disposed above the lower edge ring.

[0023] Figure 1 A schematic side view of an inductively coupled plasma reactor (reactor 100) is depicted in accordance with some embodiments of the present disclosure. Reactor 100 may be used alone or as a processing module of an integrated semiconductor substrate processing system, or cluster tool, such as the one available from Applied Materials, Inc. of Santa Clara, California. Integrated semiconductor wafer processing system. Examples of suitable plasma reactors that may advantageously benefit from modification according to embodiments of the present disclosure include inductively coupled plasma etch reactors, such as those of semiconductor facilities. wire or other inductively coupled plasma reactors, such as the MESA also available from Applied Materials, Inc. TMEtc. The semiconductor facilities listed above are merely illustrative, and other etch reactors and non-etch facilities (eg, CVD reactors, or other semiconductor processing facilities) may also be suitable for modification according to the present teachings. For example, suitable non-limiting plasma reactors that may be modified in accordance with the present disclosure may be found in U.S. Patent Application Publication No. 2011 / 009499 (published on April 28, 2011 by V. Todorow et al. and entitled “INDUCTIVELY COUPLED PLASMA APPARATUS”), U.S. Patent Application Publication No. 2011 / 0097901 (published on April 28, 2011 by S. Banna et al. and entitled “DUAL MODE INDUCTIVELY COUPLED PLASMA REACTOR WITH ADJUSTABLE PHASE COIL ASSEMBLY”), or U.S. Patent Application Publication No. 2015 / 0068682 (published on May 12, 2015 by S. Banna et al. and entitled “POWERDEPOSITION CONTROL IN INDUCTIVELY COUPLED PLASMA (ICP) REACTORS”).

[0024] The reactor 100 generally includes a processing chamber 104 having a conductive body (chamber walls 130) and a lid 120 (e.g., ceiling) that together define an inner volume, a substrate support 116 (shown as supporting a substrate 115) disposed within the inner volume, an inductively coupled plasma apparatus 102, and a controller 140. The chamber walls 130 are typically coupled to an electrical ground 134. In embodiments where the reactor 100 is configured as an inductively coupled plasma reactor, the lid 120 may include a dielectric material facing the inner volume of the reactor 100. In other embodiments, other plasma sources may also or alternatively be used, such as a capacitively coupled plasma source, a remote plasma source, etc.

[0025] The substrate support 116 generally includes an upper portion having a support surface for supporting the substrate 115. In some embodiments, the support surface is formed from a dielectric material. Figure 1An upper portion of a substrate support 116 is shown, for example, as an electrostatic chuck 117. The substrate support 116 further includes a cathode 118 coupled to a bias source 122 via a matching network 124. The bias source 122 may illustratively be a source of up to about 1000 W (but not limited to about 1000 W) of RF energy, such as about 150 W for some applications, using a frequency of, for example, about 13.56 MHz, although other frequencies and powers may be provided as needed for a particular application. The bias source 122 may be capable of generating one or both of continuous or pulsed power. In some embodiments, the bias source 122 may be a DC or pulsed DC source. In some embodiments, the bias source 122 may be capable of providing multiple frequencies, or one or more secondary bias sources (such as Figure 2 ) may be coupled via the same matching network 124 or via one or more additional matching networks (such as Figure 2 An insulator layer 128 surrounds the cathode 118.

[0026] A processing accessory 125 is disposed atop the substrate support 116 to protect the upper surface of the substrate support 116, which would otherwise be exposed. The processing accessory 125 is further configured to improve substrate processing, as will be discussed in more detail below. In some embodiments, a plasma screen 129 may be disposed in the area between the substrate support 116 and the chamber wall 130 to limit or prevent the plasma from moving below the substrate support 116.

[0027] Figure 2 Further details of the substrate support 116 are described according to some embodiments of the present disclosure. Figure 2 , the substrate support 116 includes an electrode 200 (e.g., cathode 118) disposed within the substrate support 116. In some embodiments, the electrode 200 may be centrally disposed below a support surface 216 of the substrate support 116. The electrode 200 is formed of a conductive material, such as one or more of aluminum (Al), doped silicon carbide (SiC), or other suitable conductive materials that are compatible with the processing environment. In some embodiments, the electrode 200 may be disposed on or may be a base 205 that supports a dielectric support surface of the substrate support 116. The base 205 may have a peripheral edge 202 and an upper surface 204. In some embodiments, the base 205 may include a plurality of channels 207 disposed through the base 205 to flow a heat transfer medium through the channels 207. A heat transfer medium source 209 may be coupled to the plurality of channels 207 to provide a heat transfer medium to the plurality of channels 207. For example, the flow of the heat transfer medium through the plurality of channels 207 may be used to adjust the temperature of a substrate disposed on the substrate support 116.

[0028] The substrate support 116 further includes a substrate supporting surface 216 disposed above the upper surface 204 of the electrode 200. For example, the substrate supporting surface 216 may be part of the electrostatic chuck 117. The electrostatic chuck 117 is disposed above the electrode 200 and the substrate supporting surface 216 is the upper surface of the electrostatic chuck 117. The electrostatic chuck 117 may include a dielectric plate, such as a ceramic puck 220. The ceramic puck 220 includes one or more electrodes (electrode 222 shown) disposed in the ceramic puck 220 to provide DC energy for clamping the substrate 115 to the electrostatic chuck 117. The electrode 222 is typically coupled to a DC power supply 226.

[0029] A processing assembly (e.g., processing assembly 125) is disposed atop substrate support 116 to protect the upper surface of substrate support 116, which would otherwise be exposed. For example, processing assembly 125 includes lower edge ring 206 and upper edge ring 208. Lower edge ring 206 is made of a conductive or high dielectric constant process compatible material, such as aluminum or an aluminum alloy, such as Al6061. In some embodiments, and as Figure 4A As shown, the lower edge ring 206 may have an anodized coating 410. In some embodiments, the coating of the anodized coating 410 completely surrounds the lower edge ring 206. However, in some embodiments, the anodized coating 410 does not completely surround the lower edge ring 206. For example, the anodized coating 410 may be selectively formed on the lower edge ring 206. The anodized coating 410 may help protect the metal surface of the lower edge ring 206 from chemical attack (e.g., fluorine attack), which may cause defects or contamination. The anodized coating 410 may have a thickness of about 4 microns + / - 2 microns. The lower edge ring 206 is electrically coupled to the electrode 200 (e.g., substrate 205) so that the electrode 200 and the lower edge ring 206 can be coupled to a shared RF power supply (e.g., bias source 122). In some embodiments, the lower edge ring 206 is made of the same conductive material as the substrate 205, in some embodiments Al6061. The lower edge ring 206 generally includes curved edges to avoid arcing. The upper edge ring 208 is made of an insulating process-compatible material, such as quartz. An insulator layer 128 surrounding the cathode 118 (e.g., electrode 200, or substrate 205) is also disposed around the outer diameter surface of the lower edge ring 206. The upper edge ring 208 is disposed on the insulator layer 128, the lower edge ring 206, and a portion of the ceramic puck 220, as will be discussed in more detail below.

[0030] The inventors have observed that during plasma processing, the edges of the substrate 115 can act like RF antennas, causing the electric field in the processing chamber to be localized and attracted to the substrate edge during processing with an applied RF bias. As a result, plasma strikes on the substrate edge also become localized and stronger, resulting in non-uniform substrate processing. For example, the inventors have found that during etching processes on certain substrates (e.g., semiconductor wafers), center-to-edge non-uniformity in etch volume is found.

[0031] The conductive or high dielectric constant lower edge ring 206 raises the RF conductive surface and changes the electric field near the edge of the substrate 115. The change in the electric field advantageously shifts the plasma strike from the edge of the substrate 115 to the upper edge ring 208 disposed above the lower edge ring 206. The upper edge ring 208 is made of quartz, which advantageously has a higher etch resistance and generates fewer defects / particles inside the chamber during processing. Therefore, the inventors have discovered that providing a process accessory 125 (as discussed herein) can advantageously provide more uniform substrate processing (e.g., etching) while generating fewer defects / particles inside the chamber during processing. In embodiments of the lower edge ring 206 having an anodized coating 410, the anodized coating 410 is non-conductive. However, the anodized coating 410 advantageously does not affect the ability of the conductive or high dielectric constant lower edge ring 206 to raise the RF conductive surface and change the electric field near the edge of the substrate 115.

[0032] Figure 3 According to some embodiments of the present disclosure, Figure 2 1. A partially schematic side view of a substrate support 116 is depicted in FIG. 1. For example, the electrostatic chuck 117 is configured to support a substrate having a given diameter, such as 300 mm (although other sizes and shapes, such as 150 mm, 200 mm, 450 mm, etc., may also be used). The support surface 216 of the electrostatic chuck 117 has a diameter that is less than the given width, such that the outer peripheral edge of the substrate 115 slightly overhangs the support surface 216. For example, in a configuration for processing 300 mm wafers, the support surface 216 has a diameter that is slightly less than 300 mm. The electrostatic chuck 117 includes a wall 304 that extends vertically or substantially vertically downward from the support surface 216 and terminates at an upper surface 306 of an outer peripheral protrusion 308 that extends radially outward from the bottom of the wall 304.

[0033] The outer peripheral protrusion 308 of the electrostatic chuck 117 radially disposes the lower edge ring 206 outward. For example, the inner diameter of the lower edge ring 206 is larger than the inner diameter of the outer peripheral protrusion 308, and therefore, is larger than the inner diameter of a given width of the substrate (e.g., 300 mm). As described above, the lower edge ring 206 is conductively coupled to the electrode 200. Figure 3, the lower edge ring 206 is conductively coupled to the electrode 200, for example, by being disposed directly atop the substrate 205 (the substrate 205 forming the electrode 200). The lower edge ring 206 includes an upper surface 302 disposed above the upper surface 204 of the substrate 205 (e.g., above the electrode 200) to locally elevate the RF conductive surface in an area disposed radially outwardly from the outer edge of the substrate 115.

[0034] The inventors have discovered that positioning the upper surface 302 of the lower edge ring 206 above the upper surface 204 of the electrode 200 advantageously provides more uniform substrate processing, as described above. For example, the inventors believe that the elevated upper surface 302 of the lower edge ring 206 attracts ions outside the diameter of the substrate 115, preventing or reducing increased process products at the edge of the substrate.

[0035] However, the inventors have further discovered that for some processes, placing the upper surface 302 of the lower edge ring 206 too close to or above the substrate 115 will dramatically reduce the process rate, such as the etching rate, near the edge of the substrate 115. Therefore, in some embodiments, the upper surface 302 of the lower edge ring 206 is further disposed at a height less than the upper surface 306 of the outer peripheral protrusion 308.

[0036] In some embodiments, the base 205 includes a cutout or recess 310 configured to receive the lower edge ring 206. In some embodiments, the radial inner wall of the recess 310 is substantially aligned with the outer wall of the outer peripheral protrusion 308. Figure 3 , the recess 310 and the lower edge ring 206 are sized to place the upper surface 302 of the lower edge ring 206 simultaneously above the upper surface 204 of the base 205 and below the upper surface 306 of the outer peripheral protrusion 308. In some embodiments, the lower edge ring 206 has an inner diameter that is larger than the inner diameter of the radially inner wall of the recess 310 so that the inner sidewall of the lower edge ring does not contact the radially inner wall of the recess 310. In some embodiments, the lower edge ring 206 has an outer diameter that is equal to or smaller than the outer diameter of the base 205. In other words, the peripheral edge 312 of the lower edge ring is aligned with or radially inwardly disposed from the peripheral edge 202.

[0037] In some embodiments, one or both of the lower edge ring 206 or the base 205 may include one or more alignment features to facilitate radial alignment of the lower edge ring 206 to the base 205. For example, Figure 3 , holes 314 may be provided in the recess 310 of the base 205 to receive corresponding protrusions or latches (not shown) of the lower edge ring 206 to facilitate radial alignment of the lower edge ring 206 to the base 205. Other alignment configurations are also contemplated.

[0038] The upper edge ring 208 is disposed on the insulator layer 128, the lower edge ring 206, and a portion of the outer peripheral protrusion 308 of the ceramic puck 220. Specifically, the upper edge ring 208 has a lower surface configured to be disposed at least on the outer peripheral protrusion 308. The lower surface of the upper edge ring 208 is slightly spaced apart from the upper surface 302 of the lower edge ring 206. The lower surface of the upper edge ring 208 may also be disposed on the upper surface of the insulator layer 128.

[0039] In some embodiments, the lower edge ring 206 may include upper and outer perimeter notches 316 configured to intersect corresponding portions of the upper edge ring 208. The notches 316 facilitate alignment of the lower edge ring 206 and the upper edge ring 208. In some embodiments, the lower edge ring does not include upper and outer perimeter notches, such as below with respect to Figures 6 to 6A described.

[0040] In some embodiments, the insulator layer 128 may include upper and outer peripheral notches 318 configured to intersect corresponding portions of the upper edge ring 208. The upper edge ring 208 may include a wavy lower surface, such as a stepped lower surface. In some embodiments, the upper edge ring 208 includes a stepped lower surface having one or more steps to gradually reduce the thickness of the upper edge ring 208 from a thickest radially outermost portion (except for the rounded edge) to a thinnest radially innermost portion.

[0041] For example, in some embodiments, Figure 1 and Figure 7 and 7A As depicted in FIG. 1 , a step is provided defining two portions having different thicknesses: a radially outermost portion (e.g., Fig. 7A 720) and the radially innermost portion (e.g., Fig. 7A 710 in ). In some embodiments, as Figures 2 to 3 and Figures 5 to 5A , two steps are provided, defining three portions having different thicknesses: a radially outermost portion 320, a central portion 322, and a radially innermost portion 324. One or more steps may be placed to intersect the upper edge ring 208 with the components disposed below the outer peripheral protrusion 308, the notch 316, and the notch 318.

[0042] The upper edge ring 208 includes an upper surface 326 and a rounded or curved upper peripheral edge to connect the upper surface 326 to the outer peripheral wall of the upper edge ring 208 or directly to the lower surface of the upper edge ring 208, depending on the nature of the curvature. In some embodiments, the upper surface 326 is planar or substantially planar from the inner diameter of the upper edge ring 208 to near the outer diameter of the upper edge ring 208 (e.g., except for the curved upper peripheral edge of the upper edge ring).

[0043] The upper edge ring 208 has an inner diameter that is larger than the inner diameter of the support surface 216 and smaller than a given diameter of the substrate 115 (e.g., less than 300 mm for a configuration designed to process 300 mm wafers). A gap may be defined between the upper edge ring 208 and the wall 304. The upper edge ring 208 further has a thickness at a radially innermost portion 324 that is less than the height of the wall 304, such that when the upper edge ring 208 is disposed on the outer peripheral protrusion 308, an upper surface 326 of the upper edge ring 208 is below the support surface 216 of the electrostatic chuck 117. The inventors have discovered that placing the upper surface 326 at or above the level of the substrate 115 increases particle defects during certain processes (e.g., etching). Therefore, when the substrate 115 is disposed on the substrate support 116, the radially innermost portion 324 of the upper edge ring 208 extends below the outer peripheral edge of the substrate 115 and defines a gap between the upper edge ring 208 and the backside surface of the substrate 115.

[0044] The upper edge ring 208 has an outer diameter that is greater than the outer diameter of the substrate support 116 such that the outer peripheral edge of the upper edge ring overhangs or extends beyond the substrate support 116 (including the insulator layer 128 ).

[0045] Figure 4 A side cross-sectional view of the lower edge ring 206 is depicted according to some embodiments of the present disclosure. Figure 4A A partial side cross-sectional view of the lower edge ring 206 is depicted.

[0046] Figure 5 A side cross-sectional view of the upper edge ring 208 is depicted according to some embodiments of the present disclosure. Figure 5A A partial side cross-sectional view of the upper edge ring 208 is depicted.

[0047] Figure 6 A side cross-sectional view of the lower edge ring 606 is depicted according to some embodiments of the present disclosure. Fig. 6AA partial side cross-sectional view of a lower edge ring 606 is depicted. A lower edge ring 606 similar to the lower edge ring described above can be used. Also, in some embodiments, the lower edge ring 606 can have an anodized coating 610 similar to the anodized coating 410 described above. For example, in some embodiments, the coating of the anodized coating 610 completely surrounds the lower edge ring 606. However, in some embodiments, the anodized coating 610 does not completely surround the lower edge ring 606. For example, the anodized coating 610 can be selectively formed on the lower edge ring 606. The anodized coating 610 can help protect the metal surface of the lower edge ring 606 from chemical attack (e.g., fluorine attack), which can cause defects or contamination. The anodized coating 610 can have a thickness of about 4 microns + / - 2 microns. The lower edge ring 606 has an upper surface 602 and a peripheral sidewall 612. In some embodiments, the lower edge ring 608 has an outer diameter of about 13.2 inches to about 13.8 inches. In some embodiments, lower edge ring 608 has an inner diameter of about 12.0 inches to about 12.5 inches. In some embodiments, lower edge ring 606 generally includes a curved edge.

[0048] Figure 7 A side cross-sectional view of an upper edge ring 708 is depicted according to some embodiments of the present disclosure. Fig. 7A A partial side cross-sectional view of an upper edge ring 708 is depicted. An upper edge ring 708 similar to the upper edge rings described above may be used. The upper edge ring 708 includes an upper surface 726 and a rounded or curved upper peripheral edge to connect the upper surface 726 to the outer peripheral wall 704 of the upper edge ring 708 or directly to the lower surface 702 of the upper edge ring 708, depending on the nature of the curvature. In some embodiments, the upper surface 726 is planar or substantially planar from the inner diameter of the upper edge ring 708 to near the outer diameter of the upper edge ring 708 (e.g., except for the curved upper peripheral edge of the upper edge ring).

[0049] The upper edge ring 708 has an inner diameter that is larger than the inner diameter of the support surface 216 and smaller than a given diameter of the substrate 115. In some embodiments, the inner diameter of the upper edge ring 708 is about 11.5 inches to about 12.0 inches. In some embodiments, the outer diameter of the upper edge ring 708 is about 14.9 inches to about 15.4 inches. In some embodiments, the upper edge ring 708 has a width of about 1.5 inches to about 2.0 inches, defined by the distance between the inner diameter of the upper edge ring 708 and the outer diameter of the upper edge ring 708.

[0050] The upper edge ring 708 includes a corrugated lower surface 702, such as a stepped lower surface. Figure 7 As depicted in , the upper edge ring 708 includes a stepped lower surface to reduce the thickness of the upper edge ring 708 from a thicker radially outermost portion (except for the rounded edge) to a thinner radially innermost portion. Figures 7 to 7AIn an embodiment, a step is provided, defining two portions having different thicknesses: a radially outermost portion 720 and a radially innermost portion 710. In some embodiments, the radially innermost portion 710 has an outer diameter of about 13.5 inches to about 14.5 inches. The step can be positioned to intersect the upper edge ring 708 with the outer peripheral protrusion 308 and the lower edge ring 206 or the lower edge ring 608.

[0051] Back to Figure 1 , in some embodiments, the lid 120 may be substantially flat. Other modifications of the processing chamber 104 may have other types of lids, such as a dome-shaped lid or other shapes. The inductively coupled plasma apparatus 102 is typically disposed above the lid 120 and is configured to inductively couple RF power into the processing chamber 104. The inductively coupled plasma apparatus 102 includes first and second coils 110, 112 disposed above the lid 120. Each of the relative position, the ratio of the diameters of each coil, and / or the number of turns in each coil may be adjusted as desired to control the profile or density of the plasma formed, for example, by controlling the inductance on each coil. Each of the first and second coils 110, 112 is coupled to an RF power supply 108 via an RF feed structure 106 through a matching network 114. The RF power supply 108 may illustratively be capable of generating up to about 4000 W (but not limited to about 4000 W) at a tunable frequency in the range from 50 kHz to 13.56 MHz, although other frequencies and powers may be provided as desired for specific applications.

[0052] In some embodiments, a power divider 105 (e.g., a dividing capacitor) may be provided between the RF feed structure 106 and the RF power supply 108 to control the relative amounts of RF power provided to the respective first and second coils. Figure 1 , a power divider 105 may be disposed in a line coupling the RF feed structure 106 to the RF power supply 108 to control the amount of RF power provided to each coil (thus, facilitating control of plasma characteristics in the regions corresponding to the first and second coils). In some embodiments, the power divider 105 may be incorporated into a matching network 114. In some embodiments, after the power divider 105, the RF current flows to the RF feed structure 106 and then to the first and second coils 110, 112. Alternatively, the separated RF current may be fed directly to each of the respective first and second coils.

[0053] The heater element 121 may be disposed atop the lid 120 to facilitate heating the interior of the processing chamber 104. The heater element 121 may be disposed between the lid 120 and the first and second coils 110, 112. In some embodiments, the heater element 121 may include a resistive heating element and may be coupled to a power supply 123, such as an AC power supply, configured to provide sufficient energy to control the temperature of the heater element 121 between about 50 and about 100 degrees Celsius. In some embodiments, the heater element 121 may be an open blocking heater. In some embodiments, the heater element 121 may include a non-blocking heater, such as a ring element, thereby facilitating uniform plasma formation within the processing chamber 104.

[0054] During operation, a substrate 115 (e.g., a semiconductor wafer or other substrate suitable for plasma processing) may be placed on the substrate support 116, and a process gas may be supplied from a gas panel 138 through one or more inlet ports 126 (disposed through the lid 120 and / or the chamber wall 130) to form a gas mixture 150 within the processing chamber 104. For example, prior to introducing the process gas, the temperature of the surfaces within the chamber may be controlled by, for example, a heater 121 (as described above) to have an internal volume with the facing surfaces at a temperature between about 100 and 200 degrees Celsius, or about 150 degrees Celsius. The gas mixture 150 may be ignited into a plasma 155 in the processing chamber 104 by applying power from an RF power supply 108 to the first and second coils 110, 112. In some embodiments, power may also be provided to the substrate support 116 from a bias source 122. The pressure within the interior of the processing chamber 104 may be controlled using a throttle valve 127 and a vacuum pump 136. In some embodiments, the pressure within the processing chamber 104 may be controlled using a gate valve, a butterfly valve, a pendulum valve, or the like. The temperature of the chamber wall 130 may be controlled using a pipe (not shown) containing a liquid running through the chamber wall 130. One non-limiting specific application in which the present apparatus finds particular use is in pre-cleaning applications, such as etching oxides (e.g., silicon oxide) from substrates (e.g., silicon substrates or wafers).

[0055] Controller 140 includes a central processing unit (CPU) 144, memory 142, and support circuits 146 for CPU 144 and facilitates control of the components of reactor 100 and methods of forming plasma, such as discussed herein. Controller 140 can be any form of general purpose computer processor that can be used in industrial settings for controlling a variety of chambers and subprocessors. Memory, or computer readable medium 142 of CPU 144 can be one or more readily accessible memories, such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other form of digital storage, local or remote. Support circuits 146 are coupled to CPU 144 for supporting the processor in a conventional manner. These circuits include caches, power supplies, clock circuits, input / output circuits and subsystems, etc. Memory 142 stores executable or callable software (source or object program code) to control the operation of reactor 100 in the manner described herein. Software programs can also be stored and / or executed by a second CPU (not shown) that is located remotely from the hardware controlled by CPU 144.

[0056] Although the foregoing is an embodiment of the present disclosure, other and further embodiments of the present disclosure may be modified without departing from the basic scope of the present disclosure. For example, various sizes of the processing assembly 125 may be controlled for different RF frequencies, and / or different power levels of the RF bias applied to the electrode 200 to position the upper surface 302 (or 602) of the lower edge ring 206 (or 606). For example, in some embodiments, the upper surface 302 (or 602) of the lower edge ring 206 (or 606) may be positioned closer to or further away from the support surface 216. In some embodiments, the inner and / or outer diameter of the lower edge ring 206 (or 606) may be selected or controlled to control the width of the upper surface 302 (or 602) and / or to control the radial position of the upper surface 302 (or 602) of the lower edge ring 206 (or 606).

Claims

1. A processing accessory for a substrate support, comprising: an upper edge ring made of quartz and having an upper surface and a lower surface, wherein the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring; and A lower edge ring is provided, wherein the lower edge ring is configured to intersect the stepped lower surface of the upper edge ring.

2. The process kit of claim 1, wherein the lower edge ring comprises aluminum or an aluminum alloy having an anodized coating.

3. The process kit of claim 1, wherein the lower edge ring has a notch along upper and outer peripheral edges, wherein the stepped lower surface of the upper edge ring is configured to intersect the notch.

4. The process kit of claim 1, wherein the upper edge ring has an inner diameter that is smaller than an inner diameter of the lower edge ring and an outer diameter that is larger than an outer diameter of the lower edge ring.

5. The process kit of claim 1, wherein the lower edge ring is conductive.

6. The process kit of claim 1, wherein the radially outermost portion has a thickness greater than a thickness of the radially innermost portion.

7. The process kit of any one of claims 1 to 6, wherein the upper edge ring comprises a curved upper peripheral edge connecting the upper surface to an outer peripheral wall of the upper edge ring or to the lower surface of the upper edge ring.

8. The treatment kit of any one of claims 1 to 6, wherein the upper edge ring has a width of about 1.5 inches to about 2.0 inches.

9. The process kit of any one of claims 1 to 6, wherein the radially innermost portion of the upper edge ring has an outer diameter of about 13.5 inches to about 14.5 inches.

10. A processing accessory for a substrate support, comprising: a lower edge ring, wherein the lower edge ring is conductive; and An upper edge ring having a wavy lower surface configured to intersect the lower edge ring, the upper edge ring further having an inner diameter smaller than the inner diameter of the lower edge ring and an outer diameter larger than the outer diameter of the lower edge ring, the upper edge ring further having an upper surface that is substantially planar, wherein the upper edge ring is made of quartz.

11. The process kit of claim 10, wherein the undulating lower surface of the upper edge ring comprises a stepped lower surface that generally decreases in thickness from a radially outermost portion to a radially innermost portion of the upper edge ring.

12. The process kit of claim 11, wherein the stepped lower surface includes steps to define the radially outermost portion and the radially innermost portion, wherein the radially innermost portion of the upper edge ring is configured to intersect the lower edge ring.

13. The treatment kit of any one of claims 10 to 12, wherein the lower edge ring is made of aluminum or an aluminum alloy.

14. The process kit of any one of claims 10 to 12, wherein the lower edge ring comprises aluminum or an aluminum alloy having an anodized coating.

15. The treatment kit of any one of claims 10 to 12, wherein the lower edge ring has a notch along upper and outer peripheral edges, wherein the contoured lower surface of the upper edge ring is configured to intersect the notch.

16. The treatment kit of any one of claims 10 to 12, wherein the upper edge ring includes a curved upper peripheral edge connecting the upper surface to an outer peripheral wall of the upper edge ring or to the undulating lower surface of the upper edge ring.

17. A substrate support, comprising: a base supporting a substrate supporting surface configured to support a substrate having a given diameter; and A processing accessory disposed atop the substrate support and comprising: a lower edge ring having an upper surface disposed at a height greater than the upper surface of the base and less than the substrate supporting surface; and An upper edge ring is disposed on top of the lower edge ring, the upper edge ring having an inner diameter smaller than the given diameter and an outer diameter larger than the outer diameter of the substrate, the upper edge ring further having a substantially planar upper surface.

18. The substrate support of claim 17, further comprising: An upper portion of the substrate support is disposed above the base, wherein an upper surface of the upper portion of the substrate support includes the substrate supporting surface.

19. The substrate support of claim 18, wherein the upper portion of the substrate support includes an outer peripheral protrusion extending radially outward, and wherein the upper edge ring has a lower surface configured to be disposed on the outer peripheral protrusion.

20. The substrate support of any one of claims 17 to 19, wherein the lower edge ring comprises aluminum or an aluminum alloy having an anodized coating.

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