Method and system for detecting polysilicon gate in layout

By establishing a bidirectional electrical connection relationship between metal layer and through holes in the CMOS layout design, and defining one-way connection rules, combining Flood-fill algorithm and image processing technology, automating the detection and correction of polysilicon gate wiring problems, the wiring problem has been solved, resulting in the wiring problem. signal delay and stability issues improve design accuracy and circuit performance.

CN119416731AActive Publication Date: 2025-02-11博越微电子(江苏)有限公司
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Patent Information

Application Number
CN202510027159.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-08
Publication Date
2025-02-11
Estimated Expiration
2045-01-08

AI Technical Summary

Technical Problem

In CMOS layout design, wiring problems of polysilicon gates often lead to signal transmission delay and circuit stability problems, and the prior art is difficult to automatically detect and correct these problems.

Method used

By establishing a bidirectional electrical connection relationship between the metal layer and the via hole, the unidirectional connection rule between the first metal layer and the polysilicon gate is defined, and the polysilicon gate is automatically identified and positioned using Flood-fill algorithm and image processing technology. Areas where no electrical connection is established at the end.

Benefits of technology

Automatic detection and correction of polysilicon gate wiring problems is realized, the accuracy of layout design and the electrical performance of the circuit are improved, and the need for manual inspection is reduced.

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Abstract

The invention discloses a method and system for detecting a polysilicon gate in a layout, and the method comprises the steps: building an electrical connection relation between all metal layers for generating mask layers and through holes, excluding a system auxiliary layer, and defining the electrical connection relation as a bidirectional connection relation; when layout detection is carried out, an inspection rule is defined, an area which is zero in edge distance and is not electrically connected is screened out, and then the area where the two ends of a polysilicon gate are both connected is positioned; by establishing bidirectional electrical connection between the metal layer and the through hole and excluding a non-electrical layer, effective transmission of signals is ensured, DRC and signal integrity analysis are combined, connection design is verified and optimized, reverse current and noise interference are prevented according to a unidirectional connection rule, a region which is not connected with a grid electrode is rapidly identified through a Flood-fill algorithm, and therefore circuit performance and reliability are improved.
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Citation Information

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