A terahertz broadband on-off keying modulator with stable input impedance

Abstract

The application discloses a terahertz broadband on-off keying modulator with stable input impedance. The application adopts a parallel common-base common-emitter differential pair, when working in a differential mode, a signal path composed of transistors Q6, Q5, Q7 and Q8 constitutes an amplification path, thereby ensuring high current gain; when working in a common mode, signals from the common-emitter transistor pair Q5 and Q8 and the common-base transistor pair Q6 and Q7 are cancelled, thereby suppressing common-mode leakage signals and further improving the on-off isolation. By adjusting the DC bias and size of the common-base transistor pair Q6 and Q7, the working frequency band is realized. The application adopts a parallel common-base common-emitter differential pair as a double-balanced differential structure OOK modulator with a bottom tail pipe, thereby realizing low on / off input impedance variation while realizing input matching, high on-off isolation and ultra-wideband.

Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency integrated circuits and relates to a terahertz on-off keying (OOK) modulation circuit, and in particular to a terahertz broadband on-off keying modulator with stable input impedance. Background Art

[0002] On-off keying (OOK) modulation is a non-coherent modulation technology that converts digital signals into radio frequency signals with two different amplitudes. When the digital signal is 1, the modulator outputs a high-amplitude carrier signal; when the digital signal is 0, the modulator outputs a low-amplitude carrier signal. Due to the non-coherent nature of OOK modulation, system design does not require phase locking and recovery of the local oscillator signal. At the same time, the sampling rate requirements for the analog-to-digital conversion interface circuit are relatively low, resulting in advantages such as simple structure, small area, and low power consumption. Thanks to the abundant spectrum resources in the terahertz band, communication systems based on OOK modulation have great application potential in short-range, ultra-high-speed terahertz wireless communication scenarios.

[0003] In an OOK modulation circuit, the modulator input is connected to the oscillator output. Excessive changes in the input impedance of the OOK modulator between on and off can cause instability in the amplitude and frequency of the oscillator's output signal, reducing the reliability and stability of the OOK modulation system. Traditional OOK modulators use a switching cascode structure, which achieves modulation by controlling the gate (base) bias of the common gate (base) stage. As frequencies increase to the terahertz band, rapidly deteriorating parasitic effects cause local oscillator leakage, significantly degrading the operating bandwidth and on / off isolation of traditional modulators. Furthermore, the input impedance changes significantly between the on / off states. While the Gilbert structure can theoretically improve the on / off isolation of OOK modulators, this structure still suffers from narrow bandwidth and a large difference in on / off input impedance. Therefore, there is a need for an OOK modulator with ultra-wideband, low on / off input impedance variation, and high on / off isolation in the terahertz band for application in ultra-high-speed OOK transceiver systems in the terahertz band, thereby addressing potential reliability and stability issues.

[0004] In view of the above technical background and existing problems, the present invention provides a terahertz broadband on-off keying modulator with stable input impedance. Based on the design of common-base common-emitter parallel differential pairs, it replaces the common-emitter differential pairs of the traditional Gilbert structure, and achieves low "on / off" input impedance variation and ultra-wide operating bandwidth in the terahertz frequency band, while maintaining high switch isolation to meet the requirements of high-speed communication systems. Summary of the Invention

[0005] The purpose of the present invention is to address the shortcomings of existing technologies and provide a high-isolation terahertz OOK modulator with low input impedance variation. The double-balanced differential structure OOK modulator adopts a parallel cascode differential pair as the bottom tail pipe, which realizes ultra-wideband input matching and high switch isolation while achieving low "on / off" input impedance variation.

[0006] The technical solutions of the present invention are as follows:

[0007] A high-isolation terahertz OOK modulator with low input impedance variation comprises: a double-balanced top differential pair, a parallel cascode bottom differential pair, a bias circuit, an input balun, and an output balun. The output balun's power supply terminal is connected to a power supply Vc, its ground terminal is grounded, its output terminal serves as the output terminal of the OOK modulator, and its input terminal is connected to the output terminal of the double-balanced top differential pair; the input terminal of the double-balanced top differential pair is connected to the output terminal of the parallel cascode differential pair; the input terminal of the parallel cascode differential pair is connected to the differential terminal of the input balun; the ground terminal of the input balun is grounded, and its input terminal is connected to a single-ended local oscillator input signal LO. in .

[0008] in:

[0009] The double-balanced top differential pair includes a first transistor Q1, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4; the collector of the first transistor Q1 is connected to an input terminal of the output balun and the collector of the third transistor Q3, the base is grounded, the emitter is connected to the emitter of the second transistor Q2 and then to an output terminal of the parallel cascode bottom differential pair; the collector of the second transistor Q2 is connected to the collector of the fourth transistor Q4 and then to the other input terminal of the output balun, the base is connected to the base of the third transistor Q3 and then to the baseband input signal BB in The emitter of the third transistor Q3 is connected to the emitter of the fourth transistor Q4 and then connected to the other output end of the parallel cascode bottom differential pair; the base of the fourth transistor Q4 is grounded.

[0010] The parallel cascode bottom differential pair includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, and an eighth transistor Q8; the fifth transistor Q5 and the eighth transistor Q8 are a common-emitter transistor pair; the sixth transistor Q6 and the seventh transistor Q7 are a common-base transistor pair; the base of the fifth transistor Q5 is connected to the emitter of the seventh transistor Q7, serving as the non-inverting input port of the parallel cascode bottom differential pair and connected to a differential terminal of the input balun; the emitter of the sixth transistor Q6 is connected to the base of the eighth transistor Q8, As the inverting input port of the parallel cascode bottom differential pair, it is connected to the other differential end of the input balun; the collector of the fifth transistor Q5 is connected to the collector of the sixth transistor Q6, serving as an output end of the parallel cascode bottom differential pair; the collector of the seventh transistor Q7 is connected to the collector of the eighth transistor Q8, serving as the other output end of the parallel cascode bottom differential pair; the emitter of the fifth transistor Q5 and the emitter of the eighth transistor Q8 are grounded; the base of the sixth transistor Q6 is connected to the base of the seventh transistor Q7.

[0011] Preferably, a bias circuit is further included; the bias circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7; one end of the first resistor R1 is connected to one end of the second resistor R2 and then connected to a power supply V C , and the other end is connected to an output end of the parallel cascode bottom differential pair; the other end of the second resistor R2 is connected to the other output end of the parallel cascode bottom differential pair; one end of the third resistor R3 is connected to one end of the fourth resistor R4 and then connected to the base of the sixth transistor Q6, and the other end is connected to an output end of the parallel cascode bottom differential pair; the other end of the fourth resistor R4 is connected to the other output end of the parallel cascode bottom differential pair; one end of the fifth resistor R5 is connected to the emitter of the fifth transistor Q5, and the other end is grounded; one end of the sixth resistor R6 is connected to the emitter of the eighth transistor Q8, and the other end is grounded; one end of the seventh resistor R7 is connected to the ground end of the input balun, and the other end is grounded.

[0012] When the parallel cascode bottom differential pair described in the present invention operates in a differential mode state, the signal path formed by the sixth transistor Q6 for in-phase amplification and the fifth transistor Q5 for inverting amplification and the signal path formed by the seventh transistor Q7 for in-phase amplification and the eighth transistor Q8 for inverting amplification form an amplification path, ensuring high current gain; when the parallel cascode bottom differential pair operates in a common mode state, the signals from the common-emitter transistor pair Q5, Q8 and the common-base transistor pair Q6, Q7 are offset, thereby suppressing the common-mode leakage signal and further improving the "on-off" isolation.

[0013] For the common-emitter transistor pair Q5 and Q8, the "collector-emitter" parasitic capacitance of the common-base transistor pair Q6 and Q7 can be regarded as its own neutralization capacitance, thereby improving the isolation of the common-base common-emitter differential transistor pair and achieving impedance stability of the local oscillator input port; since this group of "neutralization capacitance" is actually the transistor base diffusion capacitance C1=τ F ×g1,τ F is the time constant, g m is the transistor transconductance; through precise design of the transistor DC bias and size, this set of "neutralizing capacitors" can offset the input parasitic capacitance of the parallel common-base common-emitter bottom differential pair within an ultra-wide frequency band, realizing a purely resistive input impedance that hardly changes with frequency, thereby achieving an ultra-wide operating frequency band; in summary, by adjusting the DC bias and size of the common-base transistor pair Q6 and Q7, the operating frequency band can be adjusted.

[0014] The present invention has the following advantages and beneficial effects:

[0015] (1) By designing a novel parallel cascode bottom differential pair, the present invention can significantly reduce the difference in impedance between the local oscillator signal input port in the "on" and "off" states compared to the traditional double-balanced Gilbert unit, thereby improving the operating stability of the oscillator.

[0016] (2) Based on the novel parallel cascode bottom differential pair, the present invention reduces the matching difficulty and greatly improves the working bandwidth compared with the traditional double-balanced Gilbert unit.

[0017] (3) The novel parallel common-base common-emitter bottom differential pair can further improve the common-mode rejection performance based on the traditional Gilbert cell, thereby improving the circuit stability and isolation. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a circuit principle diagram of the present invention;

[0019] Figure 2 This is the schematic diagram of the traditional Gilbert structure OOK modulator;

[0020] Figure 3 Comparison of the input impedance Smith chart simulation results of the present invention and the traditional Gilbert structure in the "on / off" state;

[0021] Figure 4 The present invention and the traditional Gilbert structure in the "on / off" state |S 11 |Simulation results comparison;

[0022] Figure 5The S parameter simulation results of the present invention in the "on / off" state;

[0023] Figure 6 This is the transient simulation result of the present invention. DETAILED DESCRIPTION

[0024] The present invention will be further described below with reference to the accompanying drawings and examples, but the present invention is not limited to the scope of the examples.

[0025] like Figure 1 As shown, this example provides a high-isolation terahertz band OOK modulator with low input impedance variation, which as a whole includes a double-balanced top differential pair, a parallel common-base common-emitter bottom differential pair, a bias circuit, an input balun, and an output balun. Among them, the double-balanced top differential pair is composed of transistors Q1, Q2, Q3, and Q4. The parallel common-base common-emitter bottom differential pair is composed of transistors Q5, Q6, Q7, and Q8, which is the core innovation part of the present invention. The bias circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7; the first resistor R1 and the second resistor R2 are connected to the power supply V C and the connection between the parallel cascode bottom differential pair and the double-balanced top differential pair; a third resistor R3 and a fourth resistor R4 are connected to the connection between the parallel cascode bottom differential pair and the double-balanced top differential pair, as well as the bases of transistors Q6 and Q7; a fifth resistor R5 and a sixth resistor R6 are connected to the emitters of transistors Q5 and Q8, respectively; and a seventh resistor R7 is connected to ground via the center tap of the input balun secondary coil. The bias circuit can use a resistor network to provide a DC bias current for the transistor, or other methods such as a current source and an RF choke to provide a suitable DC bias point for the transistor.

[0026] The single-ended input port of the input balun is connected to the local oscillator signal LO in , and convert it into a set of differential signals, which are input to the parallel common base and common emitter bottom differential pair; the output balun converts the differential RF signal output by the double balanced top differential pair into a single-ended RF signal RF out , used to connect to subsequent circuits. Since the circuit is a fully differential architecture, the center tap of the secondary coil of the input balun and the center tap of the primary coil of the output balun are differential virtual grounds, which can be used for DC feeding. For example, the center tap of the primary coil of the output balun is connected to the main power supply V C ; The bias resistor R7 is connected to the center tap of the secondary coil.

[0027] The single-ended input port of the input balun is connected to the local oscillator signal LO in ; The differential port is connected to the parallel cascode bottom differential pair;

[0028] The center tap of the output balun primary coil is connected to the power supply V C ; The differential port is connected to the double-balanced top differential pair; the single-ended port is the RF output port RF of the OOK modulated signal out ;

[0029] The above description uses a bipolar junction transistor (BJT) as an example; the first to eighth transistors may also be metal oxide semiconductor field effect transistors (MOSFETs) or high electron mobility transistors (HEMTs); if the first to eighth transistors are metal oxide semiconductor field effect transistors (MOSFETs) or high electron mobility transistors (HEMTs), the common base and common emitter structures should correspond to common gate and common source structures, respectively, due to the different naming methods of the transistor electrodes.

[0030] Figure 2 This is a traditional Gilbert double-balanced structure. Its advantage is that the local oscillator signal leaking from the local oscillator input port to the RF port can be reverse-cancelled, resulting in good isolation. However, the bottom-layer transistors in this traditional structure are common-emitter structures, which have poor isolation. Therefore, the impedance changes of the top-layer differential pair during switching will cause the impedance of the local oscillator signal input port to change, causing oscillator instability.

[0031] The following are the layout simulation results of the design example:

[0032] Figure 3 The Smith chart simulation results for this example and a conventional Gilbert double-balanced structure in the 200-280 GHz range are presented. Comparison reveals that the input impedance curve of the present invention, whether in the on or off state, is closer to the origin on the Smith chart as a whole, and the "on" state curve and the "off" state curve are generally close, demonstrating the advantages of the present invention's ultra-wide operating bandwidth and stable input matching. In contrast, the input impedance curve of the conventional Gilbert double-balanced structure is close to the origin only within a small range, and the "on" state curve and the "off" state curve are far apart, indicating that the conventional structure can only operate within a narrow frequency band and has poor input matching stability at the local oscillator port, which can easily lead to unstable oscillator operation.

[0033] Figure 4 The |S of this example and the traditional Gilbert double-balanced structure in the range of 200-280 GHz 11Simulation results. The simulation results clearly show that the present invention achieves a return loss below -10 dB in the 200-280 GHz range; in contrast, the -10 dB bandwidth of the traditional Gilbert double-balanced structure is only 35 GHz. Overall simulation results demonstrate that the double-balanced structure of the present invention significantly improves input matching performance across a wide frequency band, achieving an overall improvement of nearly -10 dB in the 200-280 GHz range compared to the traditional Gilbert double-balanced structure. Comparative results demonstrate that the improved Gilbert double-balanced structure significantly improves bandwidth performance compared to the traditional structure.

[0034] Figure 5 The S-parameter simulation results of this example are shown. As can be seen from the figure, the insertion loss of the new OOK modulator in the on-state at 240 GHz is less than 4 dB, and the on / off isolation reaches -51 dB, which can fully guarantee the reliability of the OOK communication system.

[0035] Figure 6 The figure shows the transient response simulation results of this example under 24 Gbps baseband signal modulation. It can be seen that when the input signal is "0", the amplitude of the output voltage is close to 0 V, indicating that the OOK modulator proposed in this invention has the advantage of high isolation and can ensure the reliability of the OOK communication system. At the same time, when the control signal changes, the switching time of the RF signal amplitude of the chip in this example increases from 10% to more than 90% in less than 0.02 ns, which can theoretically support a modulation rate of up to 50 Gbps, providing support for ultra-high-speed OOK communication systems.

[0036] This example is implemented based on a 130nm SiGe BiCMOS process.

[0037] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A high-isolation terahertz OOK modulator with low input impedance variation, characterized in that It includes a double-balanced top differential pair, a parallel cascode bottom differential pair, a bias circuit, an input balun, an output balun, and a bias circuit; the power supply terminal of the output balun is connected to the power supply Vc, the ground terminal is grounded, the output terminal serves as the output terminal of the OOK modulator, and the input terminal is connected to the output terminal of the double-balanced top differential pair; the input terminal of the double-balanced top differential pair is connected to the output terminal of the parallel cascode differential pair; the input terminal of the parallel cascode differential pair is connected to the differential terminal of the input balun; the ground terminal of the input balun is grounded, and the input terminal is connected to the local oscillator input signal LO in ; The double-balanced top differential pair includes a first transistor Q1, a second transistor Q2, a third transistor Q3, and a fourth transistor Q4; the collector of the first transistor Q1 is connected to an input terminal of the output balun and the collector of the third transistor Q3, the base is grounded, the emitter is connected to the emitter of the second transistor Q2 and then to an output terminal of the parallel cascode bottom differential pair; the collector of the second transistor Q2 is connected to the collector of the fourth transistor Q4 and then to the other input terminal of the output balun, the base is connected to the base of the third transistor Q3 and then to the baseband input signal BB in The emitter of the third transistor Q3 is connected to the emitter of the fourth transistor Q4 and then connected to the other output end of the parallel cascode bottom differential pair; the base of the fourth transistor Q4 is grounded; The parallel cascode bottom differential pair includes a fifth transistor Q5, a sixth transistor Q6, a seventh transistor Q7, and an eighth transistor Q8; the fifth transistor Q5 and the eighth transistor Q8 are a common-emitter transistor pair; the sixth transistor Q6 and the seventh transistor Q7 are a common-base transistor pair; the base of the fifth transistor Q5 is connected to the emitter of the seventh transistor Q7, serving as the non-inverting input port of the parallel cascode bottom differential pair and connected to a differential terminal of the input balun; the emitter of the sixth transistor Q6 is connected to the base of the eighth transistor Q8, As the inverting input port of the parallel cascode bottom differential pair, it is connected to the other differential end of the input balun; the collector of the fifth transistor Q5 is connected to the collector of the sixth transistor Q6, serving as an output end of the parallel cascode bottom differential pair; the collector of the seventh transistor Q7 is connected to the collector of the eighth transistor Q8, serving as the other output end of the parallel cascode bottom differential pair; the emitter of the fifth transistor Q5 and the emitter of the eighth transistor Q8 are grounded; the base of the sixth transistor Q6 is connected to the base of the seventh transistor Q7; The bias circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7; one end of the first resistor R1 is connected to one end of the second resistor R2 and then connected to a power supply V C , and the other end is connected to an output end of the parallel cascode bottom differential pair; the other end of the second resistor R2 is connected to the other output end of the parallel cascode bottom differential pair; one end of the third resistor R3 is connected to one end of the fourth resistor R4 and then connected to the base of the sixth transistor Q6, and the other end is connected to an output end of the parallel cascode bottom differential pair; the other end of the fourth resistor R4 is connected to the other output end of the parallel cascode bottom differential pair; one end of the fifth resistor R5 is connected to the emitter of the fifth transistor Q5, and the other end is grounded; one end of the sixth resistor R6 is connected to the emitter of the eighth transistor Q8, and the other end is grounded; one end of the seventh resistor R7 is connected to the ground end of the input balun, and the other end is grounded.

2. The high-isolation terahertz OOK modulator with low input impedance variation according to claim 1, characterized in that: When the parallel cascode bottom differential pair operates in a differential mode, a signal path formed by the sixth transistor Q6 for in-phase amplification and the fifth transistor Q5 for inverting amplification and a signal path formed by the seventh transistor Q7 for in-phase amplification and the eighth transistor Q8 for inverting amplification form an amplification path; when the parallel cascode bottom differential pair operates in a common mode, the signals from the common-emitter transistor pair Q5, Q8 and the common-base transistor pair Q6, Q7 are offset, thereby suppressing common-mode leakage signals.

3. The high-isolation terahertz OOK modulator with low input impedance variation according to claim 1, characterized in that: The operating frequency band can be adjusted by adjusting the DC bias and size of the common base transistor pair Q6 and Q7.

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