Signal detection circuit and method based on memristor, receiver and equipment

Abstract

The invention discloses a memristor-based signal detection circuit and method, a receiver and equipment, and relates to the field of wireless communication, a voltage source module of the circuit is connected with a voltage input end of a memristor array module, and a current source module is connected with a current input end of the memristor array module; the current output end of the memristor array module is connected with the reverse input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are connected with the input end of the multiplier module, and the output end of the multiplier module is connected with one end of the resistor module. The voltage of the voltage source module is set according to the emission vector set; the current of the current source module is set according to the received radio frequency signal, and the conductance value of the memristor is set according to the channel matrix, so that a relatively low bit error rate of signal detection can be realized on the basis of greatly reducing calculation time and power consumption, and meanwhile, the requirement on programmable bit precision of the memristor is also reduced.

Description

Technical Field

[0001] The present application relates to the field of wireless communications, and in particular to a memristor-based signal detection circuit, method, receiver, and device. Background Art

[0002] Multiple-input multiple output (MIMO) technology is a wireless communication technology that significantly improves the data transmission rate or signal transmission quality by using multiple antennas at the transmitting and receiving ends. The MIMO receiver is a key component in the wireless communication system. It can use multiple antennas to receive signals, process these signals, and extract the transmitted data from them. The key modules in the MIMO receiver include the RF front end, the channel estimation module, and the signal detection circuit. The RF front end converts the electromagnetic wave signal in the space into an electrical signal, and amplifies and filters the signal in the analog domain. The channel estimation module can infer the channel state information based on the specific information in the received signal. The signal detection circuit uses the channel state information obtained by the channel estimation and the received signal to infer the transmitted signal.

[0003] The baseband chip in the existing signal precoding circuit includes a memristor-based storage and calculation unit, a digital baseband unit and a phase shifter array, wherein the memristor-based storage and calculation unit is used to determine an analog precoding matrix according to a channel state information matrix, and transmit the analog precoding matrix to the digital baseband unit and the phase shifter array respectively; the digital baseband unit is used to determine a digital precoding matrix according to the analog precoding matrix, and convert the signal to be transmitted based on the digital precoding matrix to obtain a converted signal; the phase shifter array is used to obtain a processed signal corresponding to the converted signal, and perform phase shift processing on the processed signal according to the analog precoding matrix to obtain a phase-shifted signal, so as to send the phase-shifted signal through an antenna array. The method calculates the analog precoding matrix (analog domain) in the memristor array and completes precoding (digital domain) in the phase shifter, and belongs to a transmission signal precoding scheme under a digital-analog hybrid system.

[0004] The regression algorithm calculation circuit based on the memristor array in the existing signal detection circuit scheme can be applied in large-scale MIMO uplink receiver detection and downlink transmitter precoding scenarios. This scheme requires mapping the MIMO channel matrix into the conductivity matrix of the memristor array, relying on high-precision array programming. Although the required memristor array programming time is reduced, the programming error is large, and this method has high requirements on the programmable bit accuracy of the memristor.

[0005] In summary, a signal detection circuit is needed that can significantly reduce the calculation time and power consumption, achieve a lower bit error rate of signal detection, and reduce the requirement for the programmable bit accuracy of the memristor. Summary of the invention

[0006] The purpose of the present application is to provide a memristor-based signal detection circuit, method, receiver and device, which can achieve a lower bit error rate of signal detection on the basis of significantly reducing calculation time and power consumption, while also reducing the requirements for the programmable bit accuracy of the memristor.

[0007] To achieve the above objectives, this application provides the following solutions:

[0008] In a first aspect, the present application provides a signal detection circuit based on a memristor, comprising:

[0009] A memristor array module, a voltage source module, a current source module, an operational amplifier module, a multiplier module, a feedback resistor module, and a resistor module;

[0010] The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the reverse input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the same-direction input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to a transmission vector set, and the transmission vector set includes transmission vectors corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0011] In a second aspect, the present application provides a memristor-based signal detection method, which is applied to the above-mentioned memristor-based signal detection device, and the memristor-based signal detection method includes:

[0012] Setting the current of the current source module according to the radio frequency signal received by the radio frequency front end;

[0013] Setting the conductance value of the memristor in the memristor array module according to the channel matrix estimated by the channel estimation module;

[0014] Traversing the emission vector set, setting the voltage of the voltage source module according to each emission vector in the emission vector set, and obtaining the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened;

[0015] Convert the current value output by the resistance module under each transmission vector into a voltage value to obtain the voltage value output by the resistance module under each transmission vector;

[0016] The to-be-screened emission signal corresponding to the target emission vector is determined as the detection signal; the target emission vector is the emission vector corresponding to the minimum voltage value among the voltage values ​​output by the resistance module under each emission vector.

[0017] In a third aspect, the present application provides a receiver, comprising: an antenna, a radio frequency front end, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator, and a demapper;

[0018] The output end of the antenna is connected to the input end of the RF front end, and the output end of the RF front end is respectively connected to the current source module of the signal detection circuit and the input end of the channel estimation module; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0019] In a fourth aspect, the present application provides a signal detection device, comprising: a signal receiving module, an intermediate frequency signal conversion module, a first analog-to-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-to-analog conversion circuit, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a second analog-to-digital conversion circuit and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit, the first output end of the first analog-to-digital conversion circuit and the first output end of the second oscillator are connected to the input end of the second mixer The second output end of the first analog-to-digital conversion circuit and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the input end of the digital-to-analog conversion circuit; the output end of the digital-to-analog conversion circuit is connected to the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the second analog-to-digital conversion circuit, and the output end of the second analog-to-digital conversion circuit is connected to the input end of the demapper.

[0020] In a fifth aspect, the present application provides a signal detection device, comprising: a signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the first output end of the intermediate frequency signal conversion module and the first output end of the second oscillator are connected to the input end of the second mixer, the second output end of the intermediate frequency signal conversion module and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0021] According to the specific embodiments provided in this application, this application discloses the following technical effects:

[0022] The present application provides a memristor-based signal detection circuit, method, receiver and device, which implements signal detection by adding an input current source and an input voltage source to a memristor array, mapping a received signal and a transmission vector to be verified as input in a circuit, and mapping a channel matrix in a memristor array. This greatly reduces the calculation time and power consumption, and achieves a lower bit error rate of signal detection. At the same time, it also reduces the requirements for the programmable bit accuracy of the memristor and improves the allowable programming error range. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 A circuit diagram of a memristor-based signal detection circuit provided in one embodiment of the present application;

[0025] Figure 2 A circuit diagram of a memristor-based signal detection circuit suitable for complex number operations provided in one embodiment of the present application;

[0026] Figure 3 A flow chart of a signal detection method provided in one embodiment of the present application;

[0027] Figure 4 A structural diagram of a receiver provided in an embodiment of the present application;

[0028] Figure 5 A schematic diagram of a signal detection circuit provided in an embodiment of the present application;

[0029] Figure 6 A MIMO communication system signal detection device provided in one embodiment of the present application;

[0030] Figure 7 Another MIMO communication system signal detection device is provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0032] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0033] A memristor is a nonlinear device with memory function, also known as a memory resistor. It has the dimension of resistance, but unlike traditional resistors, the resistance of a memristor is determined by the charge flowing through it (it has the function of remembering the charge), which means that by measuring the resistance of the memristor, the amount of charge flowing through it can be understood. A memristor has a memory effect, which can remember the amount of charge passing through it and maintain its state even after power is turned off. A memristor can change its resistance by applying a pulse, and this process is reversible, which means that a memristor can change from a low resistance value to a high resistance value, and from a high resistance value to a low resistance value. If a high resistance value is defined as "1" and a low resistance value is defined as "0", then a memristor can be used to store data.

[0034] In fact, the resistance of a memristor can change continuously within a range. If a device is set to multiple resistance states, then a memristor can represent multiple bits of information. Also because of its continuously variable resistance, according to Ohm's law, voltage is equal to current multiplied by resistance. The memristor is set to a suitable conductance value, voltage is applied, and the output current is the result of multiplication, so multiplication / division operations can be naturally realized. Therefore, the array based on memristors can be used for storage as well as calculation. Memristors can be used as both memory and computing units, so they have the property of storage and calculation in one, and can realize in-memory calculation. Because the conductance of the memristor, the input and output voltage and current are all analog quantities, so the memristor can realize analog calculation. Under the analog calculation system, the workload of a memristor is equivalent to the utility generated by more than a dozen transistors in a central processing unit (CPU) chip, so it is expected to greatly improve the energy efficiency and area efficiency of the chip. Based on this, the signal detection circuit based on memristors provided in the embodiment of the present application includes:

[0035] A memristor array module, a voltage source module, a current source module, an operational amplifier module, a multiplier module, a feedback resistor module and a resistor module.

[0036] The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the reverse input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the same-direction input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to a transmission vector set, and the transmission vector set includes transmission vectors corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0037] In another exemplary embodiment of the present application, the memristor array module includes: a memristor array, the memristor array is connected in corresponding rows and in corresponding columns; the memristor array includes Nr current input terminals, Nt voltage input terminals and Nr current output terminals; Nr and Nt are both positive integers.

[0038] The current source module includes Nr current sources, the voltage source module includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors.

[0039] The nRth current source is connected to the nRth current input terminal of the memristor array, 1≤nR≤Nr, the nTth voltage source is connected to the nTth voltage input terminal of the memristor array, 1≤nT≤Nt, the nRth current output terminal of the memristor array is respectively connected to the reverse input terminal of the nRth operational amplifier and one end of the nRth feedback resistor; the output terminal of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input terminal of the nRth multiplier, the output terminal of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input terminal of each operational amplifier and the other end of each resistor are grounded.

[0040] The signal detection principle of the signal detection circuit provided in the embodiment of the present application is to search all the transmission vectors and find the signal detection vector that makes ||y-Hs|| 2 The smallest emission vector s op , where y is the received signal vector composed of the RF signal received by the RF front end, H is the channel matrix estimated by the channel estimation module, and s is the transmission vector composed of possible transmission signals (transmission signals to be screened). The implementation principle is: the memristor array and the voltage source can realize the multiplication of the matrix and the vector. The basic principle can be proved by Ohm's law I=GV and Kirchhoff's voltage and current law. I is the vector composed of current, G is the matrix composed of conductance values, and V is the vector composed of voltage. Figure 1 In the example, the matrix H and the input voltage source v in Can realize matrix and vector multiplication Hv in Based on the matrix-vector multiplication, the external input current source i in According to Kirchhoff's current law, the output current i out The output current equals to the matrix-vector multiplication minus the current of the external current source. The final output current from the memristor array is i out =Hv in -y. The channel matrix H is converted into ij =h ij Set the conductance value of each memristor in the memristor array, g ij is the conductance of the memristor in the i-th row and j-th column of the memristor array, h ij is the value of the i-th row and j-th column in H. According to the formula v j =x j Set the voltage value of each voltage source, v j is the voltage value of the jth voltage source, xj is the jth value in S, according to formula i yi =y i Set the current value of each current source, where i yi is the current value of the i-th current source, y i is the i-th value of y.

[0041] The current output of the memristor array is connected to the reverse input of the operational amplifier, and the same-direction input of the operational amplifier is grounded. According to the "virtual disconnection" property, the current at the reverse input is 0, and the output current of the memristor array flows into the feedback resistors R1, R2, ... R n , all feedback resistors have the same resistance value R1=R2=…=R n =g. The non-inverting input terminal is grounded. According to the "virtual short" property and Ohm's law, the voltage at the output of the operational amplifier is v out =-αi out , v out Nr is the output voltage of the Nrth operational amplifier, α represents i out The linear amplification factor, α is a positive number. This step converts the output current signal into a voltage signal to facilitate the next exponentiation operation.

[0042] Because v out =-αi out =-αHs+αy, so ||y-Hs|| 2 Equivalent to v out Each element in is squared and then summed. The voltage signal obtained in the previous step is connected to the two input ports of the analog multiplier to form a square circuit. The output value of the analog multiplier is Then the voltage signal output by the multiplier is connected to the ground through resistors of the same resistance value (resistance value is β), the voltage signal is converted into a current signal, and the square of each element is added using Kirchhoff's current law. Finally, the current i output at the grounding point is sum That is, α is the square of the Euclidean distance between a set of transmitted vectors s and the received signal y determined at a single time. 2 / β times.

[0043] In practical applications, memristors cannot be programmed to complex conductance values, and the elements in the channel matrix H are usually complex numbers containing positive and negative real and imaginary parts. In order for the circuit to perform operations in the complex domain, multiple memristor arrays need to be connected, such as Figure 2 As shown, in another exemplary embodiment of the present application, the memristor array module includes: ψ memristor array units; ψ is a positive integer.

[0044] Each memristor array cell consists of A reverse amplifier circuit module and memristor arrays, which may be 4 memristor arrays, the memristor arrays are connected in corresponding rows, the voltage output end of the ωth memristor array is connected to the voltage input end of the ω+1th memristor array through the ωth reverse amplification circuit module, and the voltage input end of the 1st memristor array is connected to the voltage source module; is a positive integer,

[0045] The current source module is connected to the current input end of the first memristor array unit, the current output end of the ψth memristor array unit is respectively connected to the reverse input end of the operational amplifier module and one end of the feedback resistor module, and the The current output terminal of the first memristor array unit is connected to the The current input terminal of the memristor array unit is connected to the The current output terminal of the first memristor array unit is connected to the The current input terminal of each memristor array unit is connected; is an integer greater than 1 and less than ψ.

[0046] In another exemplary embodiment of the present application, each of the memristor arrays includes Nr current input terminals, Nt voltage input terminals, and Nr current output terminals; Nr and Nt are positive integers.

[0047] The current source module includes Nr current sources, the voltage source module includes ψ voltage source units, each voltage source unit includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors.

[0048] The nRth current source is connected to the nRth current input terminal of each memristor array in the first memristor array unit, 1≤nR≤Nr, the The ntth voltage source in the voltage source unit is connected to the ntth voltage source in the The ntth voltage input terminal of the memristor array is connected to, 1≤nt≤Nt, No. The nRth current output terminal of the first memristor array in the memristor array unit is connected to the nRth current output terminal of the first memristor array The nRth current input terminal of each memristor array in the memristor array unit is connected, and the nRth current input terminal of each memristor array in the memristor array unit is connected. The nRth current output terminal of each memristor array in the memristor array unit is connected to the nRth current output terminal of each memristor array in the memristor array unit. The nRth current input terminals of each memristor array in the memristor array units are connected.

[0049] The nRth current output end of the first memristor array in the ψth memristor array unit is respectively connected to the reverse input end of the nRth operational amplifier and one end of the nRth feedback resistor; the output end of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input end of the nRth multiplier, the output end of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input end of each operational amplifier and the other end of each resistor are grounded.

[0050] In another exemplary embodiment of the present application, the reverse amplification circuit modules each include Nt reverse amplification circuits; the nt-th voltage output terminal in the ω-th memristor array in the memristor array unit and the nt-th voltage input terminal in the ω+1-th memristor array are connected through the nt-th reverse amplification circuit in the ω-th reverse amplification circuit module.

[0051] The detection principle of the signal detection circuit used for complex number calculation is: ||y-Hs|| 2 Equivalent to the real number model, taking the real part as an example, the mapping (i.e. the setting mentioned above) rule is as follows. Map the real part of y into i in , mapping the real part of s into Map the imaginary part of s into Map the real part of H into Map the imaginary part of H into The output current is the result of the real part. Similarly, the result of the imaginary part can be obtained. The two are added together to obtain a set of squares of the Euclidean distance between the transmitting vector S and the received signal y. 2 / β times.

[0052] In an exemplary embodiment, a memristor-based signal detection method is provided, which is applied to the memristor-based signal detection device described above. The memristor-based signal detection method includes:

[0053] The current of the current source module is set according to the RF signal received by the RF front end.

[0054] The conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0055] The emission vector set is traversed, and the voltage of the voltage source module is set according to each emission vector in the emission vector set to obtain the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened.

[0056] The current value output by the resistance module under each transmission vector is converted into a voltage value to obtain the voltage value output by the resistance module under each transmission vector.

[0057] The to-be-screened emission signal corresponding to the target emission vector is determined as the detection signal; the target emission vector is the emission vector corresponding to the minimum voltage value among the voltage values ​​output by the resistance module under each emission vector.

[0058] More specifically, the process of the signal detection method is as follows Figure 3 As shown. First, the received signal is obtained from the RF front end, and the channel estimation module obtains the channel state information from the received signal. Then, the received signal is mapped on the input current source, and the channel matrix is ​​mapped on the memristor array with the conductance value. In the demodulation process of a single signal, these two values ​​do not need to be changed. Subsequently, it is only necessary to map the possible constellation point combinations, that is, the transmission vectors corresponding to each transmitted signal to be screened, on the input voltage source. The calculation time for a set of possible constellation point combinations is less than tns. Every tns, the value is taken from the output end and the constellation point combination of the input voltage source is changed. All constellation point combinations are traversed to compare the output current. The first output i sum Convert it into voltage (can be converted by Hall sensor, integration circuit, op amp circuit and other devices) and record it with the corresponding S. sum are converted into voltage and compared with the reference voltage in the voltage comparator. sum If the converted voltage is less than the reference voltage, the reference voltage value of the voltage comparator is updated to the new i sum The converted voltage updates the optimal emission vector in the memory to the emission vector corresponding to the new reference voltage. By traversing all possible emission vectors, the minimum Euclidean distance and the corresponding emission vector x can be obtained. op .

[0059] The signal detection circuit of the present application obtains the received signal and the channel matrix from the channel estimation module, maps the received signal and the channel matrix into the circuit, searches all possible transmit signals, and finds the transmit signal with the smallest output current, which is the transmit signal (the result of signal detection). The proposed signal detection method can complete hardware-accelerated signal detection.

[0060] In an exemplary embodiment, a receiver is provided, such as Figure 4 As shown, it includes: an antenna, a radio frequency front end, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper.

[0061] The output end of the antenna is connected to the input end of the RF front end, and the output end of the RF front end is respectively connected to the current source module of the signal detection circuit and the input end of the channel estimation module; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0062] As an optional implementation, the receiver also includes: a first controller, the output end of the channel estimation module is connected to the input end of the first controller, the output end of the first controller is connected to the memristor array module, and the first controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit according to the channel matrix estimated by the channel estimation module.

[0063] As an optional implementation, the RF front end includes: a low-noise amplifier, a filter and a down-converter connected in sequence. The antenna converts the electromagnetic wave signal in the space into an electrical signal, the low-noise amplifier amplifies the electrical signal, the filter filters out most of the interference signals, and the down-converter converts the signal from high frequency to baseband signal. The signals processed in this part are all analog signals.

[0064] As an optional implementation, the receiver also includes: a sampling and holding module; the output end of the RF front end is connected to the current source module of the signal detection circuit and the input end of the channel estimation module through the sampling and holding module. The receiver provided in the present application includes two major parts of an analog baseband with integrated storage and computing. The first part is an antenna and a RF front end, and the second part is a channel estimation module and the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper. The sampling and holding module connects the first part and the second part, and can stabilize the analog signal output by the first part and serve as the input of the second part. The signal detection module and the channel estimation module input the same received signal. The channel estimation module estimates the channel state information based on the input and feeds back the channel matrix to the signal detection circuit. The signal detection circuit, in conjunction with the signal detection process, restores the transmission vector after calculation based on the estimated channel matrix and the received signal. The signal detection circuit uses the prior information of the known transmission constellation points to find the optimal transmission vector by comparing the output current, so as to realize the circuit as Figure 5 As shown, the voltage comparator will first output i sum Convert it into voltage and record it with the corresponding S. sum are converted into voltage and compared with the recorded value. If the new i sum If the converted voltage is less than the recorded value, the value recorded in the memory is updated to the new i sum The converted voltage and its corresponding emission vector S. By traversing all possible emission vectors, the minimum Euclidean distance and the corresponding emission vector x can be obtained. op The modules before the voltage comparator process analog signals. After completing the voltage comparison, the voltage comparator outputs high and low level signals (which can be regarded as digital signals). The voltage comparator not only realizes the output current comparison, but also plays the role of converting analog signals into digital signals in the circuit.

[0065] In an exemplary embodiment, the present application provides a signal detection device, specifically a MIMO communication system signal detection device, such as Figure 6 As shown, it includes: a signal receiving module, an intermediate frequency signal conversion module, a first analog-to-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-to-analog conversion circuit, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a second analog-to-digital conversion circuit and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit, the first output end of the first analog-to-digital conversion circuit and the first output end of the second oscillator are connected to the input end of the second mixer, and the first analog-to-digital conversion circuit is connected to the input end of the second mixer. The second output end of the circuit and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the input end of the digital-to-analog conversion circuit; the output end of the digital-to-analog conversion circuit is connected to the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the second analog-to-digital conversion circuit, and the output end of the second analog-to-digital conversion circuit is connected to the input end of the demapper.

[0066] In actual applications, the signal detection device also includes: a second controller, the output end of the channel estimation module is connected to the input end of the second controller, the output end of the second controller is connected to the memristor array module, and the second controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit according to the channel matrix estimated by the channel estimation module.

[0067] In practical applications, the signal receiving module is an antenna, and the intermediate frequency signal conversion module includes: a low noise amplifier, a radio frequency filter, a first mixer, a first intermediate frequency filter, an intermediate frequency amplifier and a second intermediate frequency filter connected in sequence, and a first oscillator connected to the first mixer.

[0068] The functions are as follows: The intermediate frequency signal conversion module and the first analog-to-digital conversion circuit are used to convert the radio frequency signal received by the antenna into an intermediate frequency signal in the form of a digital signal. The orthogonal signal generated by the second oscillator is used for IQ demodulation. The digital baseband signal is transmitted to the channel estimation module for calculating the channel matrix. The channel estimation module outputs the channel matrix and maps it to the signal detection circuit based on the memristor. The IQ demodulated signal is input to the signal detection circuit based on the memristor through the digital-to-analog conversion circuit. The signal detection circuit based on the memristor outputs an estimated signal, which is converted into a digital signal through the second analog-to-digital conversion circuit. The demapper converts the digital estimated signal into a bit stream.

[0069] In an exemplary embodiment, the present application provides a MIMO communication system signal detection device, such as Figure 7 As shown, it includes: a signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the first output end of the intermediate frequency signal conversion module and the first output end of the second oscillator are connected to the input end of the second mixer, the second output end of the intermediate frequency signal conversion module and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0070] In actual applications, the signal detection device also includes: a third controller, the output end of the channel estimation module is connected to the input end of the third controller, the output end of the third controller is connected to the memristor array module, and the third controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit according to the channel matrix estimated by the channel estimation module.

[0071] In practical applications, the MIMO communication system signal detection device provided in the present application also includes: a sampling and holding module, wherein the output ends of the first low-frequency filter and the second low-frequency filter are connected to the current source module of the signal detection circuit through the sampling and holding module; the output end of the first low-frequency filter and the output end of the second low-frequency filter are connected to the input end of the channel estimation module through the sampling and holding module.

[0072] In practical applications, the signal receiving module is an antenna, and the intermediate frequency signal conversion module includes: a low noise amplifier, a radio frequency filter, a first mixer, a first intermediate frequency filter, an intermediate frequency amplifier and a second intermediate frequency filter connected in sequence, and a first oscillator connected to the first mixer. The functions are as follows: The intermediate frequency signal conversion module is used to convert the radio frequency signal received by the antenna into an intermediate frequency signal in the form of an analog signal. The orthogonal signal generated by the second oscillator is used for IQ demodulation. The sampling and holding module is used to sample and hold the analog signal output by the IQ demodulation. The digital baseband signal is transmitted to the channel estimation module for calculating the channel matrix. The channel estimation module outputs the channel matrix and maps it to the signal detection circuit based on the memristor. The IQ demodulated signal is input into the signal detection circuit based on the memristor after digital-to-analog conversion. The signal detection circuit based on the memristor outputs an estimated signal. The voltage comparator can compare which of the current output estimated signal and the previous optimal estimated signal is more accurate, output high and low level information, and play a role in converting the analog signal into a digital signal. Finally, the demapper converts the digital estimated signal into a bit stream.

[0073] This application has the following effects:

[0074] (1) In the prior art, the signal processing module of the baseband has high requirements for the accuracy of the memristor element, and the signal detection bit error rate is high; this application designs a new signal detection circuit based on the memristor array, and realizes in-memory calculation in the analog domain by adding an input current source and an input voltage source to the memristor array. Specifically, the received signal and the transmitted vector to be verified are mapped in the circuit as inputs, and the channel matrix is ​​mapped in the memristor array to realize signal detection. This application can achieve a lower signal detection bit error rate on the basis of greatly reducing the calculation time and power consumption, while also reducing the requirements for the programmable bit accuracy of the memristor and increasing the allowable programming error range.

[0075] (2) In the prior art, the von Neumann architecture is relied upon, and the interaction logic between the digital computing unit and the analog storage unit is focused on, and there is an obvious storage wall problem; the present application focuses on the storage and computing processing logic inside the storage and computing unit. Specifically, the storage and computing unit obtains the received signal and the channel matrix, and maps the received signal and the channel matrix into the circuit. This step is actually the storage process. Next, all possible transmission signals are searched to find the transmission signal with the smallest output current. This step is the calculation process. Finally, the current minimum current and the transmission vector are recorded, which also corresponds to the storage process. It can be seen that storage and computing both occur in the circuit of the present application, and the storage and computing integrated architecture is applied to truly break the von Neumann result and realize the storage and computing integrated MIMO receiving technology. The use of this solution can eliminate the delay and energy consumption of information interaction between the memory and computing units, greatly improving energy efficiency and area efficiency.

[0076] (3) In the prior art, in order to adapt the memristor array to the receiver, before the signal enters the memristor array, it is necessary to use a DAC to convert the signal into an analog signal; after the signal exits the memristor array, it is necessary to use an ADC to convert the signal into a digital signal, and multiple conversions are required between analog / digital and digital / analog signals. The present application focuses on the receiver analog signal processing, digital signal processing and the connection between the two. Under the receiver architecture proposed in the present application, all parts from the antenna to the receiver process analog signals. The receiver's output and input voltage comparator converts the analog signal into a digital signal, and the subsequent parts starting from the demapper process the digital signal. It can be seen that the present application can realize the conversion between digital and analog signals using only a voltage comparator, which greatly reduces the number of ADCs and DACs used in the circuit, can reduce the energy consumption of the receiver, reduce the delay of signal processing, and improve area efficiency.

[0077] (4) Using the detection circuit proposed in this application can reduce the complexity of a calculation to O(1), greatly reducing the amount of calculation for detection.

[0078] (5) The first solution in the background technology has the following disadvantages:

[0079] 1. It is divided into two parts: digital precoding and hybrid precoding. The digital precoding part runs the ZF algorithm in the digital baseband chip to obtain the digital precoding matrix; the unsupervised neural network based on the attention mechanism is implemented in the memristor-based storage and computing unit architecture to obtain the analog precoding matrix. In the digital precoding part, the principle is to reduce the reception error by reversing the channel matrix in advance. However, the performance of this method is poor, the bit error rate at the receiving end is high, and it is significantly affected by the channel conditions.

[0080] 2. The digital precoding part is implemented by digital baseband chips. Completing large-scale MIMO digital precoding in digital baseband chips requires high-dimensional matrix multiplication, transposition and inversion operations, which will result in high processing delay and high processing power consumption. In addition, as Moore's Law gradually becomes invalid, the performance of digital baseband chips is difficult to improve, and it is difficult to cope with the high amount of computing in large-scale MIMO scenarios.

[0081] The second solution has the following disadvantages:

[0082] 1. The existing technical solutions rely on high-precision array programming. The actual conductivity value obtained by programming is normally distributed from the target value, and the results obtained by programming are random within a certain range. Therefore, high-precision programming relies on multiple programming and multiple verification (multiple reading and writing), which is time-consuming. If the number of programming and verification times is reduced, although the required programming time of the memristor array is reduced, the programming error of the memristor resistance / conductance value may be large, which has a significant impact on the precoding or detection performance.

[0083] 2. In addition, the existing technical solutions rely on multi-state memristor elements. The number of states of a memristor is the number of target conductance value intervals that can be achieved through programming, which can be expressed as bit precision. If the number of states of a memristor element is reduced, a significant loss of precision will occur when high-precision digital signals (single-precision floating point, double-precision floating point) are mapped into the memristor array, resulting in a significant decrease in the received signal detection performance.

[0084] 3. The circuit proposed in the existing solution is analog computing. If it is to be built into the existing digital baseband architecture, a large number of digital to analog converters (DAC) and analog to digital converters (ADC) are required. This will increase the delay of signal processing, increase the power and cost of the receiver, and is not conducive to the implementation of the project.

[0085] Compared with the first solution, the signal detection circuit based on the memristor array proposed in this application can replace the signal detection function of the digital baseband chip, and reduce the complexity and power consumption of signal processing on the basis of realizing in-memory calculation and analog calculation. Compared with the second technical solution, the signal detection circuit based on the memristor array proposed in this application is more tolerant of the programming error of the memristor array, and under the condition of the same memristor bit accuracy, it can achieve a lower symbol error rate / bit error rate than the second technical solution, and has better detection performance.

[0086] (6) The device provided in this application does not require or only requires a small amount of digital-to-analog conversion circuits and analog-to-digital conversion circuits, effectively reducing receiver power and delay.

[0087] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0088] This article uses specific examples to illustrate the principles and implementation methods of this application. The description of the above embodiments is only used to help understand the method and core ideas of this application. At the same time, for those skilled in the art, according to the ideas of this application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A signal detection circuit based on a memristor, characterized in that: The memristor-based signal detection circuit comprises: A memristor array module, a voltage source module, a current source module, an operational amplifier module, a multiplier module, a feedback resistor module, and a resistor module; The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the reverse input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the same-direction input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to a transmission vector set, and the transmission vector set includes transmission vectors corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

2. The memristor-based signal detection circuit according to claim 1, characterized in that: The memristor array module comprises: a memristor array; the memristor array comprises Nr current input terminals, Nt voltage input terminals and Nr current output terminals; Nr and Nt are both positive integers; the current source module comprises Nr current sources, the voltage source module comprises Nt voltage sources, the operational amplifier module comprises Nr operational amplifiers, the multiplier module comprises Nr multipliers, the feedback resistor module comprises Nr feedback resistors, and the resistor module comprises Nr resistors; The nRth current source is connected to the nRth current input terminal of the memristor array, 1≤nR≤Nr, the nTth voltage source is connected to the nTth voltage input terminal of the memristor array, 1≤nT≤Nt, the nRth current output terminal of the memristor array is respectively connected to the reverse input terminal of the nRth operational amplifier and one end of the nRth feedback resistor; the output terminal of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input terminal of the nRth multiplier, the output terminal of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input terminal of each operational amplifier and the other end of each resistor are grounded.

3. The memristor-based signal detection circuit according to claim 1, characterized in that: The memristor array module comprises: ψ memristor array units; ψ is a positive integer; Each memristor array cell consists of A reverse amplifier circuit module and memristor arrays, the voltage output end of the ωth memristor array is connected to the voltage input end of the ω+1th memristor array through the ωth reverse amplifier circuit module, and the voltage input end of the 1st memristor array is connected to the voltage source module; is a positive integer, The current source module is connected to the current input end of the first memristor array unit, the current output end of the ψth memristor array unit is respectively connected to the reverse input end of the operational amplifier module and one end of the feedback resistor module, and the The current output terminal of the first memristor array unit is connected to the The current input terminal of the memristor array unit is connected to the The current output terminal of the first memristor array unit is connected to the The current input terminal of each memristor array unit is connected; is an integer greater than 1 and less than ψ.

4. The memristor-based signal detection circuit according to claim 3, characterized in that: Each of the memristor arrays comprises Nr current input terminals, Nt voltage input terminals and Nr current output terminals; Nr and Nt are positive integers; The current source module includes Nr current sources, the voltage source module includes ψ voltage source units, each voltage source unit includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors; The nRth current source is connected to the nRth current input terminal of each memristor array in the first memristor array unit, 1≤nR≤Nr, the The ntth voltage source in the voltage source unit is connected to the ntth voltage source in the The ntth voltage input terminal of the memristor array is connected to, No. The nRth current output terminal of the first memristor array in the memristor array unit is connected to the nRth current output terminal of the first memristor array The nRth current input terminal of each memristor array in the memristor array unit is connected, and the nRth current input terminal of each memristor array in the memristor array unit is connected. The nRth current output terminal of each memristor array in the memristor array unit is connected to the nRth current output terminal of each memristor array in the memristor array unit. The nRth current input terminal of each memristor array in the memristor array units is connected; The nRth current output end of the first memristor array in the ψth memristor array unit is respectively connected to the reverse input end of the nRth operational amplifier and one end of the nRth feedback resistor; the output end of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input end of the nRth multiplier, the output end of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input end of each operational amplifier and the other end of each resistor are grounded.

5. The memristor-based signal detection circuit according to claim 4, characterized in that: The reverse amplifier circuit modules each include Nt reverse amplifier circuits; The nt-th voltage output terminal in the ω-th memristor array in the memristor array unit is connected to the nt-th voltage input terminal in the ω-th memristor array through the nt-th reverse amplifier circuit in the ω-th reverse amplifier circuit module.

6. A signal detection method based on a memristor, characterized in that: The memristor-based signal detection device applied to any one of claims 1 to 5, wherein the memristor-based signal detection method comprises: Setting the current of the current source module according to the radio frequency signal received by the radio frequency front end; Setting the conductance value of the memristor in the memristor array module according to the channel matrix estimated by the channel estimation module; Traversing the emission vector set, setting the voltage of the voltage source module according to each emission vector in the emission vector set, and obtaining the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened; Convert the current value output by the resistance module under each transmission vector into a voltage value to obtain the voltage value output by the resistance module under each transmission vector; The to-be-screened emission signal corresponding to the target emission vector is determined as the detection signal; the target emission vector is the emission vector corresponding to the minimum voltage value among the voltage values ​​output by the resistance module under each emission vector.

7. A receiver, characterized in that: include: Antenna, radio frequency front end, channel estimation module, memristor-based signal detection circuit, voltage comparator and demapper according to any one of claims 1 to 5; The output end of the antenna is connected to the input end of the RF front end, and the output end of the RF front end is respectively connected to the current source module of the signal detection circuit and the input end of the channel estimation module; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

8. The receiver according to claim 7, characterized in that The receiver further includes: a sampling and holding module; the output end of the RF front end is connected to the current source module of the signal detection circuit and the input end of the channel estimation module through the sampling and holding module.

9. A signal detection device, characterized in that: include: A signal receiving module, an intermediate frequency signal conversion module, a first analog-to-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-to-analog conversion circuit, a channel estimation module, a signal detection circuit based on a memristor according to any one of claims 1 to 5, a second analog-to-digital conversion circuit, and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit, the first output end of the first analog-to-digital conversion circuit and the first output end of the second oscillator are connected to the input end of the second mixer, the first analog-to-digital conversion circuit is connected to the input end of the intermediate frequency signal conversion module, and the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit. The second output end of the conversion circuit and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the input end of the digital-to-analog conversion circuit; the output end of the digital-to-analog conversion circuit is connected to the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the second analog-to-digital conversion circuit, and the output end of the second analog-to-digital conversion circuit is connected to the input end of the demapper.

10. A signal detection device, characterized in that: include: A signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, a memristor-based signal detection circuit, a voltage comparator, and a demapper according to any one of claims 1 to 5; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the first output end of the intermediate frequency signal conversion module and the first output end of the second oscillator are connected to the input end of the second mixer, the second output end of the intermediate frequency signal conversion module and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

Images