Radar signal time domain detection method and system based on FPGA

Abstract

The invention provides a radar signal time domain detection method and system based on an FPGA. The radar signal time domain detection method comprises the steps that S1, an ADC conducts sampling to obtain a radar signal and converts the radar signal into a digital signal; s2, the FPGA receives the digital signal sampled by the ADC and carries out time measurement, and the arrival time and the end time of the radar signal are measured; s3, receiving the digital signal sampled by the ADC by the FPGA, performing intra-pulse frequency measurement, and detecting a frequency value of the intra-pulse signal in a time domain; s4, receiving the digital signal sampled by the ADC by the FPGA, performing intra-pulse power measurement, and detecting a power value of the intra-pulse signal in a time domain; and S5, the FPGA generates corresponding pulse description words according to the measured related parameters. According to the method, partial parameters of the radar can be measured in real time, wherein the partial parameters comprise arrival time, intra-pulse power, intra-pulse frequency, pulse width and pulse period.

Description

Technical Field

[0001] The present invention relates to the field of radar detection, and in particular to a radar signal time domain detection method and system based on FPGA. Background Art

[0002] The existing pulse radar system transmits pulse periodic signals intermittently, receives the transmitted echo signals in the interval between transmissions, and determines the position, speed and other characteristics of the object by detecting the returned signals. The detection of the returned signals focuses on the parameters such as the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period of the returned signals.

[0003] At present, the common detection method is to collect data by analog-to-digital converter (ADC) and upload the data to the host computer for data processing, so as to detect the arrival time and other parameters of the return signal. The disadvantages of this method are slow response speed, small instantaneous bandwidth and low efficiency.

[0004] At present, the common detection methods are as follows: the receiving device receives the radar signal and converts the analog signal into a digital signal through the ADC; the converted digital signal is downsampled to a sampling rate that can be processed by the host computer through the signal preprocessing module; after receiving the downsampled signal, the host computer performs data processing on the signal and obtains parameters such as the pulse arrival time; the time domain detection is completed and the step is repeated to start the next detection.

[0005] In this detection method, the host computer software needs to continuously obtain the signal after ADC and continuously perform data analysis on the signal to obtain parameters such as pulse arrival time. The data processing of the host computer software consumes a lot of resources and time, which leads to the problems of slow response speed and low efficiency of this detection method. At the same time, the maximum signal bandwidth that can be processed is also limited by the maximum data processing capacity of the host computer processor, which is also limited. Summary of the invention

[0006] In view of the defects in the prior art, an object of the present invention is to provide a radar signal time domain detection method and system based on FPGA.

[0007] A radar signal time domain detection method based on FPGA provided by the present invention includes:

[0008] Step S1: ADC samples the radar signal and converts it into a digital signal;

[0009] Step S2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal;

[0010] Step S3: FPGA receives the digital signal sampled by ADC to perform intra-pulse frequency measurement, and detects the frequency value of the intra-pulse signal in the time domain;

[0011] Step S4: FPGA receives the digital signal sampled by the ADC and performs intra-pulse power measurement, detecting the power value of the intra-pulse signal in the time domain;

[0012] Step S5: FPGA generates a corresponding pulse description word according to the relevant parameters measured above.

[0013] Preferably, the advantage of FPGA parallel processing is utilized. When FPGA generates pulse description words, ADC samples signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and reacts quickly when the radar signal changes, and the parameters are updated in real time.

[0014] Preferably, in step S2:

[0015] A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

[0016] Preferably, in step S3:

[0017] The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is:

[0018]

[0019] in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point;

[0020] Phase difference:

[0021]

[0022] The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π:

[0023]

[0024] in, is the phase difference, which is the phase of the current point minus the phase of the previous point;

[0025] After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula:

[0026]

[0027] Among them, f f (n) is the instantaneous frequency of the current point, f s is the sampling rate of the current point;

[0028] After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

[0029] Preferably, in step S4:

[0030] According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA;

[0031] After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

[0032] A radar signal time domain detection system based on FPGA provided by the present invention includes:

[0033] Module M1: ADC samples the radar signal and converts it into a digital signal;

[0034] Module M2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal;

[0035] Module M3: FPGA receives the digital signal sampled by ADC to measure the frequency within the pulse and detects the frequency value of the signal within the pulse in the time domain;

[0036] Module M4: FPGA receives the digital signal sampled by ADC to measure the intra-pulse power and detects the power value of the intra-pulse signal in the time domain;

[0037] Module M5: FPGA generates the corresponding pulse description word according to the relevant parameters measured above.

[0038] Preferably, the advantage of FPGA parallel processing is utilized. When FPGA generates pulse description words, ADC samples signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and reacts quickly when the radar signal changes, and the parameters are updated in real time.

[0039] Preferably, in the module M2:

[0040] A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

[0041] Preferably, in the module M3:

[0042] The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is:

[0043]

[0044] in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point;

[0045] Phase difference:

[0046]

[0047] The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π:

[0048]

[0049] in, is the phase difference, which is the phase of the current point minus the phase of the previous point;

[0050] After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula:

[0051]

[0052] Among them, f f (n) is the instantaneous frequency of the current point, f sis the sampling rate of the current point;

[0053] After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

[0054] Preferably, in the module M4:

[0055] According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA;

[0056] After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

[0057] Compared with the prior art, the present invention has the following beneficial effects:

[0058] 1. This method can measure some parameters of the radar in real time, including arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period;

[0059] 2. The present invention consumes less resources. This method only consumes some common registers, lookup tables, multipliers and other resources in the FPGA to achieve real-time radar time domain detection;

[0060] 3. The present invention has a fast response, and by utilizing the advantages of FPGA real-time processing and the advantages of pipeline processing of the present method, when the radar signal parameters change, the present method can quickly measure the changes in the parameters;

[0061] 4. The radar pulse width and bandwidth supported by the present invention are wide in range. Due to the fully parallel processing mode of FPGA, parallel processing can be performed. The supported bandwidth depends on the maximum bandwidth of ADC.

[0062] 5. The present invention has high precision. The processing clock of FPGA can generally reach more than 100 MHz, and the highest measurement precision can reach more than 10 ns. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0064] Figure 1It is a schematic diagram of the time domain measurement process;

[0065] Figure 2 This is a schematic diagram of the average cumulative points;

[0066] Figure 3 It is a schematic diagram of double threshold;

[0067] Figure 4 It is a flow chart of time domain threshold detection;

[0068] Figure 5 This is the time domain frequency measurement flow chart. DETAILED DESCRIPTION

[0069] The present invention is described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those of ordinary skill in the art, several changes and improvements can also be made without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0070] Embodiment 1:

[0071] According to a radar signal time domain detection method based on FPGA provided by the present invention, Figure 1-Figure 5 As shown, including:

[0072] Step S1: ADC samples the radar signal and converts it into a digital signal;

[0073] Step S2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal;

[0074] Specifically, in step S2:

[0075] A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

[0076] Step S3: FPGA receives the digital signal sampled by ADC to perform intra-pulse frequency measurement, and detects the frequency value of the intra-pulse signal in the time domain;

[0077] Specifically, in step S3:

[0078] The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is:

[0079]

[0080] in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point;

[0081] Phase difference:

[0082]

[0083] The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π:

[0084]

[0085] in, is the phase difference, which is the phase of the current point minus the phase of the previous point;

[0086] After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula:

[0087]

[0088] Among them, f f (n) is the instantaneous frequency of the current point, f s is the sampling rate of the current point;

[0089] After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

[0090] Step S4: FPGA receives the digital signal sampled by the ADC and performs intra-pulse power measurement, detecting the power value of the intra-pulse signal in the time domain;

[0091] Specifically, in step S4:

[0092] According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA;

[0093] After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

[0094] Step S5: FPGA generates a corresponding pulse description word according to the relevant parameters measured above.

[0095] Specifically, by taking advantage of FPGA parallel processing, when FPGA is generating pulse description words, ADC is sampling signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and responds quickly when the radar signal changes, and the parameters are updated in real time.

[0096] Embodiment 2:

[0097] Embodiment 2 is a preferred example of Embodiment 1, and is used to illustrate the present invention in more detail.

[0098] The present invention also provides an FPGA-based radar signal time domain detection system. The FPGA-based radar signal time domain detection system can be implemented by executing the process steps of the FPGA-based radar signal time domain detection method, that is, those skilled in the art can understand the FPGA-based radar signal time domain detection method as a preferred implementation of the FPGA-based radar signal time domain detection system.

[0099] A radar signal time domain detection system based on FPGA provided by the present invention includes:

[0100] Module M1: ADC samples the radar signal and converts it into a digital signal;

[0101] Module M2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal;

[0102] Specifically, in the module M2:

[0103] A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

[0104] Module M3: FPGA receives the digital signal sampled by ADC to measure the frequency within the pulse and detects the frequency value of the signal within the pulse in the time domain;

[0105] Specifically, in the module M3:

[0106] The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is:

[0107]

[0108] in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point;

[0109] Phase difference:

[0110]

[0111] The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π:

[0112]

[0113] in, is the phase difference, which is the phase of the current point minus the phase of the previous point;

[0114] After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula:

[0115]

[0116] Among them, f f (n) is the instantaneous frequency of the current point, f s is the sampling rate of the current point;

[0117] After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

[0118] Module M4: FPGA receives the digital signal sampled by ADC to measure the intra-pulse power and detects the power value of the intra-pulse signal in the time domain;

[0119] Specifically, in the module M4:

[0120] According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA;

[0121] After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

[0122] Module M5: FPGA generates the corresponding pulse description word according to the relevant parameters measured above.

[0123] Specifically, by taking advantage of FPGA parallel processing, when FPGA is generating pulse description words, ADC is sampling signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and responds quickly when the radar signal changes, and the parameters are updated in real time.

[0124] Embodiment 3:

[0125] Embodiment 3 is a preferred example of Embodiment 1, and is used to illustrate the present invention in more detail.

[0126] A new radar signal time domain detection method based on FPGA is mainly divided into three parts: time measurement, intra-pulse frequency measurement, and intra-pulse power measurement. The main function of time measurement is to measure the arrival time and end time of the radar signal. In simple terms, the time point when the signal changes from small to large is the arrival time, and the time point when the signal changes from large to small is the end time. The main function of intra-pulse frequency measurement is to detect the frequency value of the intra-pulse signal in the time domain. The main function of intra-pulse power measurement is to detect the power value of the intra-pulse signal in the time domain.

[0127] The detailed workflow is as follows:

[0128] 1) ADC samples the radar signal and converts it into a digital signal;

[0129] 2) FPGA receives the digital signal sampled by ADC and performs time measurement;

[0130] 3) FPGA receives the digital signal sampled by ADC and performs intra-pulse frequency measurement;

[0131] 4) FPGA receives the digital signal sampled by ADC and performs intra-pulse power measurement;

[0132] 5) FPGA generates the corresponding pulse description word based on the relevant parameters measured above.

[0133] Here, the parallel processing advantage of FPGA is utilized. The above steps are all processed in parallel, that is, when FPGA generates pulse description words, ADC is also sampling signals, and time measurement, frequency measurement, and power measurement are also performed at the same time, thus forming a pipeline processing. The detected time domain information can be output continuously and can respond quickly when the radar signal changes, and the parameters are updated in real time. As can be seen from the above, the key to this method is how to detect time information, frequency information, and power information in real time in FPGA. The following is a detailed description:

[0134] 1. Time measurement

[0135] Double thresholds are used to measure the arrival time (TOA) and the end time (EOA). The so-called double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time (TOA). When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time (EOA). This method uses the 8-point accumulation and averaging method to reduce the interference caused by random noise when calculating the double threshold. It should be noted that the more points accumulated, the less interference caused by random noise can be caused, but it will also make the sensitivity of time measurement worse, and a good balance needs to be made during implementation.

[0136] 2. Intra-pulse frequency measurement

[0137] The phase difference method is used to measure the instantaneous frequency. First, the arctan value, that is, the phase difference, is calculated by the cordic algorithm.

[0138]

[0139] Since the range of arctan is [-π,π], when the obtained phase difference is not in this range, there will be a phase jump of 2π. Therefore, in order to obtain the correct phase difference, unwrapping is required, that is, when the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π, as shown below:

[0140]

[0141] After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula:

[0142]

[0143] After obtaining the instantaneous frequency, it is easy to get the maximum frequency, minimum frequency, and total frequency.

[0144] 3. Intra-pulse power measurement

[0145] According to the TOA and EOA measured above, the pulse width in the signal can be found accordingly. The I^2+Q^2 of each point in the pulse width is accumulated and the total number of points is counted. At EOA, the power accumulation value and the point accumulation value are reported to the main control.

[0146] After all the above parameters are measured, they are summarized in the pulse description word generation module to generate the arrival time, pulse power, pulse frequency, pulse width, and pulse period. That is, the arrival time is directly measured by the time measurement module, the pulse frequency is directly measured by the pulse frequency measurement module, the pulse power is directly measured by the pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

[0147] Those skilled in the art know that, in addition to realizing the system and its various devices, modules, and units provided by the present invention in a purely computer-readable program code, it is entirely possible to realize the same functions in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system and its various devices, modules, and units provided by the present invention can be considered as a hardware component, and the devices, modules, and units included therein for realizing various functions can also be regarded as structures within the hardware component; the devices, modules, and units for realizing various functions can also be regarded as both software modules for realizing the method and structures within the hardware component.

[0148] The above describes the specific embodiments of the present invention. It should be understood that the present invention is not limited to the above specific embodiments, and those skilled in the art can make various changes or modifications within the scope of the claims, which does not affect the essence of the present invention. In the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other arbitrarily.

Claims

1. A radar signal time domain detection method based on FPGA, characterized in that: include: Step S1: ADC samples the radar signal and converts it into a digital signal; Step S2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal; Step S3: FPGA receives the digital signal sampled by ADC to perform intra-pulse frequency measurement, and detects the frequency value of the intra-pulse signal in the time domain; Step S4: FPGA receives the digital signal sampled by the ADC and performs intra-pulse power measurement, detecting the power value of the intra-pulse signal in the time domain; Step S5: FPGA generates a corresponding pulse description word according to the relevant parameters measured above.

2. The radar signal time domain detection method based on FPGA according to claim 1, characterized in that: Taking advantage of FPGA parallel processing, when FPGA is generating pulse description words, ADC is sampling signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and responds quickly when the radar signal changes, and the parameters are updated in real time.

3. The radar signal time domain detection method based on FPGA according to claim 1, characterized in that: In step S2: A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

4. The radar signal time domain detection method based on FPGA according to claim 1, characterized in that: In step S3: The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is: in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point; Phase difference: The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π: in, is the phase difference, which is the phase of the current point minus the phase of the previous point; After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula: Among them, f f (n) is the instantaneous frequency of the current point, f s is the sampling rate of the current point; After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

5. The radar signal time domain detection method based on FPGA according to claim 1, characterized in that: In step S4: According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA; After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

6. A radar signal time domain detection system based on FPGA, characterized in that: include: Module M1: ADC samples the radar signal and converts it into a digital signal; Module M2: FPGA receives the digital signal sampled by ADC and performs time measurement to measure the arrival time and end time of the radar signal; Module M3: FPGA receives the digital signal sampled by ADC to measure the frequency within the pulse and detects the frequency value of the signal within the pulse in the time domain; Module M4: FPGA receives the digital signal sampled by ADC to measure the intra-pulse power and detects the power value of the intra-pulse signal in the time domain; Module M5: FPGA generates the corresponding pulse description word according to the relevant parameters measured above.

7. The FPGA-based radar signal time domain detection system according to claim 6, characterized in that: Taking advantage of FPGA parallel processing, when FPGA is generating pulse description words, ADC is sampling signals, and time measurement, frequency measurement, and power measurement are performed simultaneously. The detected time domain information is output and responds quickly when the radar signal changes, and the parameters are updated in real time.

8. The FPGA-based radar signal time domain detection system according to claim 6, characterized in that: In the module M2: A double threshold is used to measure the arrival time TOA and the end time EOA. The double threshold is an absolute threshold to determine whether there is a signal, and a ratio threshold to determine whether the signal has a sudden change. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is greater than the ratio threshold value 2, the time at this time is the arrival time TOA. When the signal size exceeds the absolute threshold value 1 and the ratio of the 8 points before and after the signal is less than the ratio threshold value 3, the time at this time is the end time EOA. When calculating the double threshold, the 8-point accumulation average method is used to reduce the interference caused by random noise.

9. The radar signal time domain detection system based on FPGA according to claim 6, characterized in that: In the module M3: The phase difference method is used to measure the instantaneous frequency. First, the arctan value is calculated by the cordic algorithm, that is, the phase at the current point is: in, is the phase of the current point, n is the current point, a is the real part of the current point, and b is the imaginary part of the current point; Phase difference: The range of arctan is [-π,π]. When the phase difference is not within this range, there will be a phase jump of 2π. When the arctan value is greater than π, subtract 2π, and when it is less than -π, add 2π: in, is the phase difference, which is the phase of the current point minus the phase of the previous point; After obtaining the phase after unwinding, the instantaneous frequency is calculated according to the following formula: Among them, f f (n) is the instantaneous frequency of the current point, f s is the sampling rate of the current point; After obtaining the instantaneous frequency, the maximum frequency, the minimum frequency, and the total frequency are obtained. The maximum and minimum values ​​of the instantaneous frequency are calculated to obtain the maximum and minimum frequencies. The instantaneous frequencies are accumulated to obtain the total frequency in the pulse.

10. The FPGA-based radar signal time domain detection system according to claim 6, characterized in that: In the module M4: According to the measured TOA and EOA, the pulse width in the signal is found accordingly, the I^2+Q^2 of each point is accumulated within the pulse width and the total number of points is counted, and the power accumulation value and the point accumulation value are reported to the main control at EOA; After the parameter measurement is completed, it is summarized into the pulse description word generation module to generate the arrival time, intra-pulse power, intra-pulse frequency, pulse width, and pulse period: the arrival time is directly measured by the time measurement module, the intra-pulse frequency is directly measured by the intra-pulse frequency measurement module, the intra-pulse power is directly measured by the intra-pulse power measurement module, the pulse width is the end time in the time measurement module minus the arrival time, and the pulse period is the difference between the arrival times of the two measurements.

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