Temperature compensation for current sensing circuit

Abstract

Examples of the invention relate to temperature compensation for a current sense circuit. An integrated circuit includes a current sense circuit (110) having an input, an output, and a corrective current input terminal between the input and the output. The first transistor (MN1) has a first control input and a first terminal. The first terminal is coupled to the input of the current sense circuit (110). A second transistor (MN4, MN5, MN6) has a second control input and a second terminal. The second control input is coupled to the first control input, and the second terminal is coupled to the correction current input terminal.

Description

Technical Field

[0001] The present application relates generally to circuits, and more particularly to temperature compensation for current sensing circuits. Background Art

[0002] The current sensing circuit may generate an output signal (e.g., a voltage) that is proportional to the current through a transistor (sometimes referred to as a main transistor) coupled to an input of the current sensing circuit. The transistor whose current is sensed by the current sensing circuit may have a different temperature coefficient than a smaller sensing transistor included within the current sensing circuit. Due to the different temperature coefficients of the main transistor and the sensing transistor, the magnitude of the output signal from the current sensing circuit may have an error. The magnitude of the error may be a function of the magnitude of the current through the main transistor—larger main transistor currents may result in larger errors in the output signal from the current sensing circuit. Summary of the invention

[0003] In an example, an integrated circuit includes a current sensing circuit having an input, an output, and a correction current input terminal between the input and the output. A first transistor has a first control input and a first terminal. The first terminal is coupled to the input of the current sensing circuit. A second transistor has a second control input and a second terminal. The second control input is coupled to the first control input, and the second terminal is coupled to the correction current input terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 is a block schematic diagram of an exemplary system including a current sensing circuit and a corrector circuit.

[0005] Figure 2 It is shown Figure 1 A schematic diagram of an example of a current sensing circuit.

[0006] Figure 3 yes Figure 1 A schematic diagram of an example of a corrector circuit.

[0007] Figure 4 yes Figure 1 A schematic diagram of another example of a corrector circuit. DETAILED DESCRIPTION

[0008] The same reference numbers or other reference designators are used in the drawings to indicate the same or similar features (functionally and / or structurally).

[0009] Figure 1 is a block diagram of system 100, which includes controller 130, transistors MN1 and MN2, current sensing circuit 110, corrector circuit 120, and load 140. In one example, Figure 1 The components shown in are manufactured on a common semiconductor die (integrated circuit IC). In other examples, Figure 1 Two or more of the components may be fabricated on different ICs.

[0010] As shown, transistors MN1 and MN2 are coupled between a supply voltage terminal 105 and a supply voltage reference terminal 107. Supply voltage terminal 105 provides a first supply voltage (not shown), for example, from a voltage source. Supply voltage terminal 107 provides a second supply voltage (e.g., electrically grounded). For example, the first supply voltage is greater than the second supply voltage. In this example, transistors MN1 and MN2 are n-channel field effect transistors (NFETs). In other examples, MN1 and MN2 may be implemented as different types of transistors. The source of transistor MN2 is coupled to the drain of transistor MN1 at switch terminal 109. Controller 130 has control outputs 131 and 132. Control output 131 is coupled to the gate of transistor MN1 and provides a voltage VGATE1 to the gate of transistor MN1. Control output 132 is coupled to the gate of transistor MN2 and provides a voltage VGATE2 at the gate of transistor MN2. Controller 130 may include a gate driver for each of transistors MN1 and MN2, or a gate driver may be included between control outputs 131 / 132 and the gates of transistors MN1 / MN2.

[0011] Load 140 is coupled to switch terminal 109. Load 140 may be any type of load powered by system 100. In one example, load 140 includes a motor. In the example of a motor, the motor may be a three-phase motor, and the series combination of transistors MN1 and MN2 is a single phase of a three-phase inverter-the other two phases may be similarly constructed. In another example, load 140 is an audio device (e.g., a speaker), and system 100 is an audio amplifier. In still other examples, system 100 may be a power converter (e.g., a switching voltage converter, such as a buck converter, a boost converter, a buck-boost converter, etc.). In the example of a power converter, load 140 may include one or more of an inductor, a capacitor, a circuit, etc. powered by a voltage provided by system 100.

[0012] The current sensing circuit 110 has an input 111, an output 112, and a correction current input terminal 113. As shown, the correction current input terminal 113 is coupled to the output 122 of the corrector circuit 120. The input 111 of the current sensing circuit 110 is coupled to the switch terminal 109, and thereby to the source of the transistor MN2 and to the drain of the transistor MN1. The output 112 of the current sensing circuit 110 is coupled to the sense (SNS) input 133 of the controller 130. The corrector circuit 120 includes an input 121 and an output 122. The input 121 of the corrector circuit 120 is coupled to the switch terminal 109. As described above, the output 122 of the corrector circuit 120 is coupled to the correction current input terminal 113.

[0013] Controller 130 may turn each of transistors MN1 and MN2 on and off. In response to controller 130 turning on transistor MN2, the voltage (V_SW) on switch terminal 109 is pulled up to the voltage on supply voltage terminal 105, and current I_MN2 flows through transistor MN2. In response to controller 130 turning on transistor MN1, voltage V_SW is pulled down to the voltage on supply voltage reference terminal 107, and current I_MN1 flows through transistor MN1. Controller 130 does not turn on both transistors MN1 and MN2 at the same time. Therefore, voltage V_SW on switch terminal 109 may be a square wave with a duty cycle implemented by controller 130.

[0014] Some applications benefit from sensing the magnitude of the current through either or both of transistors MN1 and MN2. The examples described herein involve sensing the current I_MN1 through transistor MN1, but can be extended to sensing the current I_MN2 through transistor MN2. When transistor MN1 is turned on, the drain-to-source voltage (Vds) of transistor MN1 is equal to the product of the current I_MN1 and the on-resistance (Rdson) of transistor MN1, that is, Vds=I MN1 *Rdson. Therefore, assuming Rdson is a constant value, the Vds of transistor MN1 is proportional to the drain current I_MN1 of the transistor. Using input 111, current sensing circuit 110 senses the Vds of transistor MN1, which is proportional to current I_MN1. At output 112, current sensing circuit 110 generates an output voltage V_SENSE, which is proportional to the Vds of transistor MN1 and therefore proportional to current I_MN1.

[0015] The current sensing circuit 110 determines the current I_MN1 through the transistor MN1 by measuring the Vds of the transistor. As described above, as long as Rdson is constant, the Vds of the transistor is proportional to the current I_MN1. However, the Rdson of the transistor is a function of temperature. For example, the Rdson of the transistor MN1 has a positive temperature coefficient. As the temperature of the transistor increases, the Rdson of the transistor also increases. Therefore, the Vds of the transistor MN1 is a function of both the current I_MN1 and the Rdson. Therefore, when the measurement of Vds is used to sense the current I_MN1, the temperature coefficient of Rdson introduces an error.

[0016] The power dissipated by transistor MN1 is related to (I MN1 2 *Rdson*θj), where θj is the package thermal coefficient (in units of, for example, degrees / watt). Over a relatively narrow range of current I_MN1, the error introduced by temperature variations in Rdson may be small enough to be unimportant for some applications. However, for some applications (e.g., a motor controller or an audio amplifier), current I_MN1 may vary over a wide range, and the error caused by the temperature dependence of Rdson may significantly affect the accuracy of current sensing of transistor MN1 and the performance of the system. Corrector circuit 120 generates a correction current I_CORR at its output 122. Correction current I_CORR is supplied to current sensing circuit 110 to modify the magnitude of its output voltage V_SENSE to reduce the error otherwise introduced into V_SENSE due to the temperature dependence of Rdson of transistor MN1.

[0017] Figure 2An example of a current sensing circuit 110 and a circuit schematic thereof coupled to a corrector circuit 120 is shown. In this example, the current sensing circuit 110 includes a sensing transistor circuit 230, an operational amplifier (OP AMP) 235, a transistor MN3, and a current to voltage (I2V) stage (or circuit) 245. An input 111 of the current sensing circuit 110 is coupled to the positive (+) input of the OP AMP 235. The sensing transistor circuit 230 includes transistors MN4, MN5, and MN6 coupled in series between the negative (-) input of the OP AMP 235 and the supply voltage reference terminal 107. In this example, transistors MN4 to MN6 are NFETs, but may be transistors other than NFETs in other examples. In addition, the number of transistors of the sensing transistor circuit 230 may be a number other than three (e.g., 1, 2, 4, etc.). The gates of transistors MN4 to MN6 are coupled together and coupled to the gate of transistor MN1. The size of each of transistors MN4 to MN6 (eg, the ratio of channel width (W) to channel length (L)) is smaller than that of transistor MN1. In one example, the size of each of transistors MN4 to MN6 is 5000 times smaller than that of transistor MN1.

[0018] exist Figure 2 In the example of , transistor MN3 is an NFET, but may be a transistor other than an NFET in other examples. The output 236 of OP AMP 235 is coupled to the gate of transistor MN3. I2V stage 245 includes OP AMP 250, reference voltage source VREF, and resistor R1. Resistor R1 is coupled between the output 252 of OP AMP 250 and the negative input of OP AMP 250. That is, the first terminal of resistor R1 is coupled to the output 252 of OP AMP 250, and the second terminal of resistor R1 is coupled to the negative input of OP AMP 250. The output 252 of OP AMP 250 is coupled to the output 112 of current sensing circuit 110. The reference voltage source VREF is coupled to the positive input of OP AMP 250 and to the supply voltage reference terminal 107. One terminal (eg, drain) of transistor MN3 is coupled to resistor R1 and to the negative input of OP AMP 250 , and the other terminal (eg, source) of transistor MN3 is coupled to sense transistor circuit 230 .

[0019] Assuming that the temperature dependence of the Rdson of transistor MN1 does not introduce errors, the current sensing circuit 110 operates as follows. The gate voltage VGATE1 provided to the gate of transistor MN1 is also provided to the gates of transistors MN4, MN5, and MN6. The drain current through the field effect transistor is, among other things, a function of the gate-to-source voltage (Vgs) of the transistor. Therefore, the current through the stack of series-connected transistors MN4 to MN6 is a function of the Vgs of transistor MN1. The current through the stack of series-connected transistors MN4 to MN6 is the current through transistor MN3, and in Figure 2 235 is marked as current I_MN3. In steady state, the voltages at the inputs of the OPAMPs are approximately equal. Therefore, the voltage V_SW provided to the positive input of OP AMP 235 is approximately equal to the voltage at the negative input of OP AMP 235. Therefore, the voltage provided across the stack of series-connected transistors MN4 to MN6 is approximately equal to the Vds of transistor MN1.

[0020] Because transistors MN4 to MN6 are smaller than transistor MN1, the Rdson of each of transistors MN4 to MN6 is proportionally greater than the Rdson of transistor MN1. Also, because transistors MN4 to MN6 have larger Rdsons, and because the voltage between the drain of transistor MN4 and the supply voltage reference terminal 107 is the same as the Vds of transistor MN1, current I_MN3 is proportional to current I_MN1 through transistor MN1, but substantially less than current I_MN1. The magnitude of current I_MN3 may be a scaled-down version of current I_MN1. For example, the reduction is achieved by the relative size difference between the size of MN1 and transistors MN4 to MN6. For example, if transistors MN4 to MN6 are 5000 times smaller than transistor MN1, then current I_MN3 is 5000 times smaller than current I_MN1.

[0021] The current through resistor R1 from output 252 of OP AMP 250 is labeled as current I_R1. Ignoring the functionality of corrector circuit 120 and the correction current I_CORR it provides, current I_R1 is equal to current I_MN3. Therefore, current I_R1 flows from output 252 of OP AMP 250, through resistor R1, transistor MN3 (labeled as current I_MN3), and through sensing transistor circuit 230 to supply voltage reference terminal 107. Because the current through sensing transistor circuit 230 is proportional to the sensed current I_MN1, the current through resistor R1 is also proportional to current I_MN1. A reference voltage source VREF ('VREF' refers to both the circuit that generates the reference voltage and the reference voltage itself) provided to the positive input of OP AMP 252 is also provided at the negative input of OP AMP 250. Therefore, the voltage at the output 252 of the OP AMP 250 (which is also the output 112 of the current sensing circuit 110) is given by: V_SENSE=VREF+(I_R1*R1). Therefore, V_SENSE is proportional to the current I_R1. Since, as described above, the current I_R1 is a function of the current I_MN1, V_SENSE is proportional to the sensed current I_MN1.

[0022] However, as described above, the Rdson of transistor MN1 is a function of the temperature of transistor MN1. The current I_MN1 passing through transistor MN1 causes the transistor to self-heat, thereby causing the Rdson of the transistor to increase as the current I_MN1 increases. Transistors MN4 to MN6 may be far enough away from transistor MN1 that the temperature of transistors MN4 to MN6 is not greatly affected by the self-heating experienced by transistor MN1. Therefore, the Rdson of transistors MN4 to MN6 may not vary as much as the Rdson of transistor MN1. Since temperature affects the Rdson of transistor MN1 differently than that of transistors MN4 to MN6, the current I_MN3 passing through the sense transistor circuit 230 may not only be proportional to the current I_MN1, but may also be a function of I_MN1. 2 , and possibly higher order current terms.

[0023] The correction current input terminal 113 is coupled to the resistor R1, the negative input of the OP AMP 250, and the drain of the transistor MN3. The output 122 of the corrector circuit 120 is coupled to the correction current input terminal 113. The corrector circuit 120 receives the voltage V_SW at its input 121. The voltage V_SW is the same voltage that the current sensing circuit 110 receives as an input for sensing the current I_MN1, as described above. The corrector circuit 120 generates the correction current I_CORR and provides the correction current I_CORR at its output 122. In one example, the corrector circuit 120 generates I_CORR based on the square of the voltage V_SW. The current I_MN3 is the sum of the currents I_CORR and I_R1. Therefore,

[0024] I_MN3=I_CORR+I_R1 (Equation 1)

[0025] Depending on the direction of I_MN1 through transistor MN1, current I_CORR may be bidirectional. The magnitude of current I_MN3 is set by sense transistor circuit 230 based on Vgs and Vds of transistor MN1, as described above. The magnitude of current I CORR is set by corrector circuit 120 based on the magnitude of voltage V_SW (e.g., I_CORR∝V_SW 2 ). With currents I_MN3 and I_CORR set by their respective circuits, the current I_R1 through resistor R1 is forced to be the difference between I_MN3 and I_CORR. The correction current I_CORR injected into the correction current input terminal 113 affects the magnitude of the current I_R1 through the I2V stage 245 of the current sensing circuit 110. A larger value of the correction current I_CORR causes a decrease in the current I_R1 through resistor R1, and thus causes a smaller magnitude decrease in the voltage V_SENSE generated by the current sensing circuit 110.

[0026] In the absence of the corrector circuit 120, as the Vgs of transistor MN1 increases to produce a larger level of current I_MN1, the temperature of transistor MN1 rises. As the temperature of transistor MN1 rises, the value of Rdson of transistor MN1 also rises. The voltage V_SW is proportional to the product of current I_MN1 and Rdson. Therefore, the increase in voltage V_SW can be partially attributed to the self-heating of transistor MN1. The current sensing circuit 110 uses the voltage V_SW as a proxy for the current I_MN1. The current I_MN3 is a function of the voltage V_SW, which can be partially attributed to the self-heating of transistor MN1. The increase in current I_MN3 caused by the self-heating of transistor MN1 therefore increases the voltage drop across resistor R1 and therefore the voltage V_SENSE also increases.

[0027] However, the corrector circuit 120 corrects the magnitude of the voltage V_SENSE based on the square of the voltage V_SW. For example, the current I_CORR from the corrector circuit 120 reduces the current I_R1 through the resistor R1, thereby reducing the voltage V_SENSE to a level with substantially less error than in the absence of the corrector circuit 120.

[0028] Figure 3 is a schematic diagram of an exemplary corrector circuit 120. In this example, the corrector circuit 120 includes an OPAMP 310, transistors MN7 and MN8, and a current source 312. The positive input of the OP AMP 310 is coupled to the input 121 of the corrector circuit 120, and thus receives the voltage V_SW. In this example, transistors MN7 and MN8 are NFETs, but in other examples may be transistors other than NFETs (e.g., p-channel field effect transistors PFETs). In one example, transistors MN7 and MN8 are configured so that their threshold voltages (Vt) are approximately equal. The output 312 of the OP AMP 310 is coupled to the gates of transistors MN7 and MN8. The source of transistor MN7 is coupled to the negative input of the OP AMP 310. The current source 312 is coupled between the source of transistor MN7 and the supply voltage reference terminal 107. That is, the first terminal of the current source 312 is coupled to the source of transistor MN7, and the second terminal of the current source 312 is coupled to the supply voltage reference terminal 107. The source of transistor MN8 is coupled to supply voltage reference terminal 107. The drain of transistor MN8 is coupled to output 122 of corrector circuit 120. The current through transistor MN8 is current I_CORR, as described above.

[0029] The negative input of OP AMP 310 is approximately equal to voltage V_SW, and therefore the source of transistor MN7 is approximately equal to voltage V_SW. Current source 312 provides a bias current through transistor MN7 for proper operation of transistor MN7. OP AMP 310 controls the voltage on the gate of transistor MN7, and therefore sets the gate-to-source voltage of transistor MN7 to accommodate the magnitude of the current generated by current source 312. The voltage on the gate of transistor MN7 is the threshold voltage (Vt) of transistor MN7, which is higher than its source voltage. Therefore, the gate voltage of transistor MN7 is (V_SW+Vt). Because the gates of transistors MN7 and MN8 are coupled together, the voltage on the gate of transistor MN8 is also (V_SW+Vt). The equation for the drain current (Id) of the field effect transistor is:

[0030] Id=K(Vgs-Vt) 2 (Equation 2)

[0031] Where K contains a constant related to transistor MN1. In one example, K = (k' / 2)*W / L*(1+λ Vds ), where k' is the charge carrier effective mobility (μ0) and the gate oxide capacitance per unit area (C ox ), and λ Vds is the channel length modulation parameter.

[0032] Equation (2) shows that the drain current through the field effect transistor is proportional to the square of the difference between the Vgs and Vt voltages of the transistor. The Vgs of transistor MN8 is (V_SW+Vt). The difference between the Vgs of transistor MN8 and its threshold voltage Vt is (V_SW+Vt)-Vt, which is equal to V_SW. Therefore, the current I_CORR is proportional to the square of the voltage V_SW.

[0033] Figure 4 1 is a schematic diagram of another example including a transistor MN1, a current sensing circuit 110 and a corrector circuit 120. Figure 4 In the example of , the corrector circuit 120 includes OP AMP 310, transistors MN7 and MN8, and current source 312, as described above. Figure 4 The corrector circuit 120 in FIG. 1 also includes a current mirror 420 and a trimming circuit 430. The current mirror 420 includes PFETs MP1 and MP2 whose gates are coupled together and whose sources are coupled together and coupled to the supply voltage terminal 105 or to an intermediate voltage terminal (a voltage less than the voltage on the supply voltage terminal 105). The current mirror 420 has a current mirror input 411 and a current mirror output 412. The drains of transistors MP1 and MP2 are coupled to the current mirror input 411 and the current mirror output 412, respectively. The current mirror input 411 is coupled to the drain of transistor MN8. The current mirror output 412 is coupled to the correction current input terminal 113. As described above, the current through transistor MN8 is proportional to V_SW. 2 The current is mirrored by the current mirror into the correction current input terminal 113 as the correction current I_CORR.

[0034] exist Figure 4 In the example of , trimming circuit 430 includes one or more series combinations of transistors and switches. Each series combination of transistors and switches is coupled in parallel with transistor MN8 between current mirror input 411 (which is also coupled to gate transistors MP1 and MP2) and supply voltage reference terminal 107. Figure 4In the example of , the trimming circuit 430 includes transistors MN9 and MN10 (e.g., NFETs) whose gates are coupled to the gate of transistor MN8 and whose sources are coupled to the source of transistor MN8. A separate switch (e.g., transistor) is coupled to each of transistors MN9 and MN10. Switch SW1 is coupled to transistor MN9, and switch SW2 is coupled to transistor MN10. Each switch can enable or disable the flow of current through the corresponding transistor. When switch SW1 is closed, current can flow through transistor MN9, and when switch SW2 is closed, current can flow through transistor MN10. Each switch SW1, SW2 can be controlled by a trim control signal (Trim<1:0>). The trim control value can be stored in a register, memory, etc., such as in an IC in which the corrector circuit 120 is included. One bit of the trim control value Trim<1:0> opens or closes switch SW1, and another bit opens or closes switch SW2. Although in Figure 4 The trimming circuit 430 in FIG. 4 shows two transistors MN9 and MN10, but may include any suitable number of transistors and corresponding switches. For example, the trimming circuit 430 may be used to account for differences in different IC packages and processes.

[0035] In this specification, the term "coupled" may encompass connections, communications, or signal paths that enable a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first instance, device A is coupled to device B through a direct connection; or (b) in a second instance, device A is coupled to device B through an intermediate component C, provided that the intermediate component C does not change the functional relationship between device A and device B so that device B is controlled by device A via the control signal generated by device A.

[0036] Also, in this specification, the statement “based on” means “based at least in part on.” Thus, if X is based on Y, then X may depend on Y and any number of other factors.

[0037] A device "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) to perform the function when manufactured by a manufacturer, and / or may be configured (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. The configuration may be performed through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnects, or a combination thereof.

[0038] As used herein, the terms "terminal", "node", "interconnect", "pin" and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to the interconnections between device elements, circuit elements, integrated circuits, devices or other electronic devices or semiconductor components or their ends.

[0039] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) may actually include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources to form the described structure at the time of manufacture or after manufacture, for example, by an end user and / or a third party.

[0040] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead, where appropriate, with little change to the rest of the circuitry. For example, field effect transistors ("FETs") (e.g., n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs—such as NPN transistors or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in conjunction with the devices described herein. The transistors may be depletion mode devices, drain extension devices, enhancement mode devices, native transistors, or other types of device structure transistors. Furthermore, the devices may be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0041] Reference may be made in the claims to the control input of a transistor (also referred to as control terminal) and to its current terminals (also referred to as terminals). In the case of a FET, the control input is the gate, and the current terminals are the drain and the source. In the case of a BJT, the control input is the base, and the current terminals are the collector and the emitter.

[0042] Reference herein to a FET being "on" or "enabled" means that there is a conductive channel of the FET and drain current can flow through the FET. Reference herein to a FET being "off" or "disabled" means that there is no conductive channel, so drain current does not flow through the FET. However, an "off" FET can have current flowing through the body diode of the transistor.

[0043] The circuits described herein may be reconfigured to include additional or different components to provide functionality at least partially similar to functionality available before component replacement. Unless otherwise specified, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may alternatively be a plurality of resistors or capacitors coupled in parallel between the same nodes, respectively. For example, a resistor or capacitor shown and described herein as a single component may actually be a plurality of resistors or capacitors coupled in series between the same two nodes as a single resistor or capacitor, respectively.

[0044] Although certain elements of the described examples are included in the integrated circuit and other elements are external to the integrated circuit, in other exemplary embodiments, additional or fewer features may be incorporated into the integrated circuit. In addition, some or all of the features shown as external to the integrated circuit may be included in the integrated circuit, and / or some features shown as internal to the integrated circuit may be incorporated external to the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that: (i) are incorporated in / on a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated in the same module; and / or (iv) are incorporated in / on the same printed circuit board.

[0045] The use of the phrase "ground" in the foregoing description includes chassis ground, ground wire ground, floating ground, virtual ground, digital ground, universal ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise specified, "about", "substantially" or "substantially" preceding a parameter means within + / -10% or + / -5% or + / -1% of the parameter, or if the parameter is zero, then it means within a reasonable value range of about zero.

[0046] Modifications in the described embodiments are possible within the scope of the claims, and other embodiments are possible.

Claims

1. An integrated circuit IC, comprising: a current sensing circuit having input, output and correction current input terminals; as well as a first transistor having a first control input and a first terminal, the first terminal coupled to the input of the current sensing circuit; as well as A second transistor has a second control input coupled to the first control input and a second terminal coupled to the correction current input terminal. 2 . The IC of claim 1 , further comprising an operational amplifier coupled between the input of the current sensing circuit and the first terminal.

3. The IC of claim 2 , wherein the operational amplifier comprises a first input, a second input, an operational amplifier output, the first input being coupled to the input of the current sensing circuit, the second input being coupled to the first terminal, and the operational amplifier output being coupled to the first control input and the second control input.

4. The IC of claim 1, further comprising a current mirror coupled between the second terminal and the correction current input terminal.

5. The IC of claim 4, wherein the current mirror has a current mirror input and a current mirror output, the current mirror input being coupled to the second terminal and the current mirror output being coupled to the correction current input terminal.

6. The IC of claim 1, further comprising a trimming circuit coupled to the second transistor.

7. The IC of claim 6, wherein the second transistor includes a third terminal, and the trimming circuit includes a series combination of a third transistor and a switch, the series combination coupled to the second terminal and the third terminal.

8. The IC of claim 1 , wherein the current sensing circuit comprises: an operational amplifier having a first operational amplifier input, a second operational amplifier input, and an operational amplifier output, the first operational amplifier input being coupled to the correction current input terminal; and A resistor is coupled between the operational amplifier output and the first operational amplifier input.

9. The IC of claim 1, wherein the first transistor and the second transistor are field effect transistors.

10. A circuit comprising: a first transistor having a first terminal; a current sensing circuit having an input, an output, and a correction current input terminal, the input of the current sensing circuit being coupled to the first terminal; as well as an operational amplifier having a first operational amplifier input and a second operational amplifier input and an operational amplifier output, the first operational amplifier input being coupled to the first terminal; a second transistor having a first control input coupled to the operational amplifier output and a second terminal coupled to the second operational amplifier input; as well as A third transistor has a third control input and a third terminal, the third control input being coupled to the first control input and the third terminal being coupled to the correction current input terminal.

11. The circuit of claim 10, further comprising a current mirror coupled between the third terminal and the correction current input terminal.

12. The circuit of claim 11, wherein the current mirror has a current mirror input and a current mirror output, the current mirror input being coupled to the third terminal and the current mirror output being coupled to the correction current input terminal.

13. The circuit of claim 10, further comprising a trimming circuit coupled to the third transistor.

14. The circuit of claim 13, wherein the third transistor comprises a fourth terminal, and the trimming circuit comprises a series combination of a fourth transistor and a switch, the series combination coupled to the third terminal and the fourth terminal.

15. The circuit of claim 10, wherein the operational amplifier is a first operational amplifier, the operational amplifier output is a first operational amplifier output, and the current sensing circuit comprises: a second operational amplifier having third and fourth operational amplifier inputs and a second operational amplifier output, the second operational amplifier input being coupled to the correction current input terminal; and A resistor is coupled between the second operational amplifier output and the third operational amplifier input.

16. The circuit of claim 10, wherein the second transistor and the third transistor are field effect transistors.

17. An integrated circuit IC, comprising: a current sensing circuit having an input and an output, the current sensing circuit being configured to produce a voltage at the output that is proportional to the voltage at the input; as well as A corrector circuit having a corrector input and a corrector output, wherein the corrector input is coupled to the input of the current sensing circuit and the corrector output is coupled to the current sensing circuit, and the corrector circuit is configured to provide a current at the corrector output that is proportional to the square of the voltage at the input of the current sensing circuit.

18. The IC of claim 17, further comprising a transistor coupled to the input of the current sensing circuit, wherein the voltage at the input of the current sensing circuit is proportional to a current through the transistor.

19. The IC of claim 17, wherein the corrector circuit comprises: an operational amplifier having a first input and a second input and a first output, the first input being coupled to the input of the current sensing circuit; a first transistor having a first control input and a first terminal, the first terminal being coupled to the second input, and the first control input being coupled to the first output; as well as A second transistor has a second control input coupled to the first output and a second terminal coupled to the corrector output.

20. The IC of claim 19, further comprising a current mirror having a mirror input and a mirror output, the mirror input coupled to the second terminal and the mirror output coupled to the corrector output.

21. The IC of claim 20, wherein the operational amplifier is a first operational amplifier, and the current sensing circuit comprises: a second operational amplifier having third and fourth inputs and a second output, the third input being coupled to the mirror output; a resistor coupled between the second output and the third input; as well as A third transistor is coupled between the third input and a power supply terminal.

22. The IC of claim 20, further comprising a trimming circuit coupled to the second transistor, the trimming circuit having a trimming control input.

23. The IC of claim 19, wherein the first transistor and the second transistor are field effect transistors.

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