A TSV automatic insertion method for 3D integrated circuits

Abstract

The present invention relates to a TSV automatic insertion method for a 3D integrated circuit, belonging to the technical field of semiconductor devices, and comprising the following steps: step 1): establishing each integrated circuit chip model, and opening a drill hole on each integrated circuit chip model; step 2): detecting the number of drill holes on each integrated circuit chip model, and detecting the drill hole position on each integrated circuit chip model; step 3): automatically inserting a plurality of pipes into the respective drill holes on each integrated circuit chip model, generating an entire 3D integrated circuit chip model, and detecting whether the stacking of the entire 3D integrated circuit chip model is offset; step 4): adopting an evaluation or budgeting of the height of the entire 3D integrated circuit chip model; step 5): making an actual entire 3D integrated circuit chip; the beneficial effects of the present invention are as follows: the pipes inserted into the drill holes are straight, the stacking of the entire 3D integrated circuit chip model does not deviate, and the height displacement does not change, and the entire 3D integrated circuit chip is stacked as a whole.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a TSV automatic insertion method for a 3D integrated circuit. Background Art

[0002] ‌TSV technology‌ (Through-Silicon Via) is an advanced packaging technology that achieves vertical interconnection between chips by drilling holes in each chip and filling them with conductive materials. Specifically, TSV technology is to drill small holes in each chip, and then fill these holes with conductive materials such as copper, tungsten, and polysilicon to achieve vertical electrical interconnection between chips. TSV technology allows chips with different functions to be stacked together, thereby improving chip integration, reducing power consumption, and reducing the packaging volume of stacked chips.

[0003] TSV technology is mainly used in the chip field, including microprocessors and integrated circuit chips. It is crucial for the stacking of the entire 3D integrated circuit chip. For the stacked packaging (WSP) application of the entire 3D integrated circuit chip, it can achieve high-density stacking of multiple chips.

[0004] At present, in the stacking process of the entire 3D integrated circuit chip, since the through holes on each integrated circuit chip are not on the same axis when the conductive material is filled in the through holes, the stacking of the entire 3D integrated circuit chip will be offset. In addition, the through holes of each integrated circuit chip are not on the same axis, and the conductive material filled in the through holes of each integrated circuit chip expands and contracts due to heat, which will also cause the stacking of the entire 3D integrated circuit chip to be offset. In this way, the integrated connection of the entire 3D integrated circuit chip has an imprecise stacking, which affects the subsequent packaging of the entire 3D integrated circuit chip. Summary of the invention

[0005] The present invention mainly solves the technical problem of how to make various integrated circuit chips stacked together into a whole 3D integrated circuit chip. The present invention provides a TSV automatic insertion method for a 3D integrated circuit, so that the drilling positions on various integrated circuit chip models are the same, the pipes inserted into the drill holes are straight, the stacking of the entire 3D integrated circuit chip model does not shift, and the height displacement of the entire 3D integrated circuit chip model does not change, thereby achieving the goal of stacking various integrated circuit chips together into a whole 3D integrated circuit chip.

[0006] In order to achieve the above object, the present invention is implemented by the following technical solutions:

[0007] A TSV automatic insertion method for a 3D integrated circuit comprises the following steps:

[0008] Step 1): establishing each integrated circuit chip model, and opening a drill hole on each integrated circuit chip model;

[0009] Step 2): Detect the number of drill holes on each integrated circuit chip model, and use the coordinate point vector method to detect the drill hole position on each integrated circuit chip model;

[0010] Step 3): Determine the number of tubes according to the number of drilled holes on each integrated circuit chip model, automatically insert multiple tubes into the respective drilled holes on each integrated circuit chip model by using a straightness analysis method, generate the entire 3D integrated circuit chip model, and detect whether the stacking of the entire 3D integrated circuit chip model is offset;

[0011] Step 4): using a height displacement vector method to estimate or estimate the height of the entire 3D integrated circuit chip model;

[0012] Step 5): According to the generated entire 3D integrated circuit chip model, drilling holes are opened on each actual integrated circuit chip, and multiple actual pipes are inserted into each integrated circuit chip to manufacture the actual entire 3D integrated circuit chip.

[0013] Optionally, in step 1), the length, width and height of each integrated circuit chip model are set to be equal, and a blind hole is opened on each integrated circuit chip model, and the length, width and height of each blind hole are equal.

[0014] Optionally, in step 2), a coordinate system of a certain integrated circuit chip model is set, and a coordinate point vector method is used to detect the drilling position on the certain integrated circuit chip model. The coordinate point vector method is the following formula (1):

[0015] (1);

[0016] in, and Mark the coordinates of the holes to be drilled. or , To detect the coordinate mark positions of the drill holes in sequence, To determine the coordinates of the drill hole, mark the location;

[0017] For the Drill holes, , and Respectively The height, length and width of each borehole; For parameter analysis operations, For the Height, length and width analysis of each borehole; To determine the The shape of the first drill hole and the analysis of the The height, length and width of the drilled holes, To determine the drilling shape operation, To determine the operation of a specific drilling hole;

[0018] For the record arrive of each drill hole.

[0019] Optionally, in step 3), the straightness analysis method is the following formula (2):

[0020] (2);

[0021] in, For a pipe part, For a pipe part, For a pipe Section, take the first part, For pipe The cross-sectional area of ​​the segment, For pipe The degree of curvature of the segment axis, For pipe The temperature of the segment, Indicates the pipe The temperature of the segment is When the pipe The curvature of the segment axis is ; It is a combination of the cross-sectional area parameter of the pipe and the axial bending degree parameter of the pipe;

[0022] For pipe The cross-sectional area of ​​the segment and the degree of axial curvature; It is the combination of parameters of each section of a pipe; To combine the parameters of each section of a pipe from one end to the other; The straightness of a pipe.

[0023] Optionally, after the tube is automatically inserted into the drilled hole on the integrated circuit chip model, a surface parallel bonding method is used to detect whether each surface of the tube is in contact with each surface in the drilled hole. The surface parallel bonding method is the following formula (3):

[0024] (3);

[0025] in, It is the degree of integration between each surface of the pipe and each surface in the drill hole. To calculate the The degree of integration of the various surfaces of the root canal with the various surfaces in the drill hole, For the The temperature of each surface of the root canal, For the The average temperature of each surface of the root canal, It is the combination of the parameters of surface bonding degree and surface average temperature;

[0026] For the Average temperature of each surface of the root canal Next, The degree of integration of the various surfaces of the root canal with the various surfaces in the drill hole, For the All sides of the root canal; For the The fit of the various surfaces of the root canal with the various surfaces in the drill hole.

[0027] Optionally, the following steps are used to detect whether the stacking of the entire 3D integrated circuit chip model is offset:

[0028] Step A): determining whether the stacking of the entire 3D integrated circuit chip model is offset in its height direction;

[0029] Step B): Analyze the stacking offset of the entire 3D integrated circuit chip model; if the stacking of the entire 3D integrated circuit chip model is offset in its height direction, the stacking of the 3D integrated circuit chip model is unqualified; if the stacking of the entire 3D integrated circuit chip model is not offset in its height direction, the stacking of the 3D integrated circuit chip model is qualified.

[0030] Optionally, in step 4), the height displacement vector method is the following formula (4)-formula (5):

[0031] (4);

[0032] (5);

[0033] In formula (4), It is the standard height of the entire 3D integrated circuit chip model. The height at which the entire 3D integrated circuit chip model is displaced; The height is the sum of the standard height of the entire 3D integrated circuit chip model and the displacement height of the entire 3D integrated circuit chip model;

[0034] In formula (5), is the displacement height value of the entire 3D integrated circuit chip model, The displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving toward each other, or the displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving away from each other; The displacement height value of the entire 3D integrated circuit chip model in unit time is the displacement height value of moving toward or away from each other.

[0035] Optionally, when the stack of the entire 3D integrated circuit chip model is not offset in its height direction, evaluating or estimating whether the height of the entire 3D integrated circuit chip model moves toward each other, moves away from each other, or does not move;

[0036] If the height of the entire 3D integrated circuit chip model is moved toward each other, the height of the entire 3D integrated circuit chip model is reduced;

[0037] If the height of the entire 3D integrated circuit chip model moves in the backward direction, the height of the entire 3D integrated circuit chip model increases;

[0038] If the height of the entire 3D integrated circuit chip model does not move, the height of the entire 3D integrated circuit chip model remains unchanged.

[0039] Optionally, in step 5), the drilled holes actually opened on each integrated circuit chip are blind holes, and the length, width and height of each blind hole are equal.

[0040] Optionally, the actual straightness of each tube is kept consistent, and the actual tubes are inserted into each integrated circuit chip to produce the actual entire 3D integrated circuit chip.

[0041] Beneficial effects of the present invention:

[0042] The present invention opens a drill hole on each integrated circuit chip model, detects the number of drill holes on each integrated circuit chip model, and uses a coordinate point vector method to detect the drill hole position on each integrated circuit chip model; determines the number of pipes according to the number of drill holes on each integrated circuit chip model, automatically inserts multiple pipes into the respective drill holes on each integrated circuit chip model using a straightness analysis method, generates an entire 3D integrated circuit chip model, detects whether the stacking of the entire 3D integrated circuit chip model is offset, and uses a height displacement vector method to evaluate or estimate the height of the entire 3D integrated circuit chip model. Therefore, the present invention makes the drill hole positions on each integrated circuit chip model the same, the pipes inserted into the drill holes are straight, the stacking of the entire 3D integrated circuit chip model is not offset, and the height displacement of the entire 3D integrated circuit chip model does not change, thereby achieving the stacking of each integrated circuit chip into the entire 3D integrated circuit chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 It is a three-dimensional structural schematic diagram of the entire 3D integrated circuit chip model of the present invention;

[0045] Figure 2 A top view of the integrated circuit chip model of the present invention;

[0046] Figure 3 is a system structure diagram of the present invention;

[0047] Figure 4 It is the work flow chart of the present invention.

[0048] Icons: 1-IC chip model, 2-tube, 3-drilling. DETAILED DESCRIPTION

[0049] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0050] In the description of the present application, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0051] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0052] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be welding, bolt connection, or riveting; it can be fixed connection, detachable connection, or integral connection; it can be mechanical connection or electrical connection; it can be directly connected or indirectly connected through an intermediate medium, or it can be internal communication between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0053] Embodiment 1;

[0054] like Figure 3 As shown, this embodiment provides a TSV automatic insertion system for a 3D integrated circuit, including: a model building module, a point position detection module, an axis straightness detection module and a height evaluation module;

[0055] The model building module is used to establish the entire 3D integrated circuit chip model; the point position detection module is used to detect the position of the drilling hole 3 on each integrated circuit chip model 1; the axis straightness detection module is used to detect whether the stacking of the entire 3D integrated circuit chip model is offset; the height assessment module is used to assess or estimate the height of the entire 3D integrated circuit chip model 1.

[0056] From the model building module through the point position detection module, the axis straightness detection module to the height evaluation module, each module is circuit-connected.

[0057] Embodiment 2;

[0058] Based on Example 1, Figure 4 As shown, this embodiment provides a TSV automatic insertion method for a 3D integrated circuit, comprising the following steps:

[0059] Step 1): Figure 2 As shown, each integrated circuit chip model 1 is established, and a drilling hole 3 is opened on each integrated circuit chip model 1;

[0060] Step 2): Detect the number of the three drill holes on each integrated circuit chip model 1, and use the coordinate point vector method to detect the position of the drill holes 3 on each integrated circuit chip model 1;

[0061] Step 3): Determine the number of tubes 2 according to the number of holes 3 on each integrated circuit chip model 1, and automatically insert the plurality of tubes 2 into the respective holes 3 on each integrated circuit chip model 1 by using a straightness analysis method to generate Figure 1 The entire 3D integrated circuit chip model shown is used to detect whether the stacking of the entire 3D integrated circuit chip model is offset;

[0062] Step 4): using a height displacement vector method to estimate or estimate the height of the entire 3D integrated circuit chip model 1;

[0063] Step 5): According to the generated entire 3D integrated circuit chip model, drilling holes 3 are opened on each actual integrated circuit chip, and multiple actual pipes 2 are inserted into each integrated circuit chip to manufacture the actual entire 3D integrated circuit chip.

[0064] Specifically, in step 1), the length, width and height of each integrated circuit chip model 1 are set to be equal, and a blind hole 3 is opened on each integrated circuit chip model 1, and the length, width and height of each blind hole 3 are equal.

[0065] In step 2), a coordinate system of a certain integrated circuit chip model is set, and a coordinate point vector method is used to detect the drilling position on the certain integrated circuit chip model. The coordinate point vector method is the following formula (1):

[0066] (1);

[0067] in, and Mark the coordinates of the holes to be drilled. or , To detect the coordinate mark positions of the drill holes in sequence, To determine the coordinates of the drill hole, mark the location;

[0068] For the Drill holes, , and Respectively The height, length and width of each borehole; For parameter analysis operations, For the Height, length and width analysis of each borehole; To determine the The shape of the first drill hole and the analysis of the The height, length and width of the drilled holes, To determine the drilling shape operation, To determine the operation of a specific drilling hole;

[0069] For the record arrive of each drill hole.

[0070] In step 3), a pipe 2 is selected and the straightness analysis method is adopted, which is the following formula (2):

[0071] (2);

[0072] Among them, take one or some pipe 2, For the first part, For the first part, For the first Section, with the first The following paragraphs are provided to explain: For pipe 2 The cross-sectional area of ​​the segment, For pipe 2 The degree of curvature of the segment axis, For pipe 2 The temperature of the segment, Indicates pipe 2 The temperature of the segment is When the pipe 2 The curvature of the segment axis is ; It is a combination of the cross-sectional area parameter of the pipe 2 and the axis bending degree parameter of the pipe 2;

[0073] For pipe 2 The cross-sectional area of ​​the segment and the degree of axial curvature; It is the combination of parameters of each section of a pipe 2; To combine the parameters of each section of a pipe 2 from one end to the other; is the straightness of a pipe 2.

[0074] Formula (2) mainly selects a pipe 2 and divides it into The length of each segment is equal and can be within 10 cm. arrive The temperature of the tube 2 is equal, so that the cross-sectional area of ​​the entire tube 2 and the degree of bending of the axis of the tube 2 are the same, and the straightness of the tube 2 is maintained as a straight line.

[0075] Select the first one among multiple pipes 2 After the tube 2 is automatically inserted into the drill hole 3 on the integrated circuit chip model 1, the surface parallel bonding method is used to detect whether each surface of the tube 2 is in contact with each surface in the drill hole 3. The surface parallel bonding method is specifically as follows: Formula (3):

[0076] (3);

[0077] in, is the degree of bonding between each surface of the pipe 2 and each surface of the bore 3 (i.e., except for the concave portion of the outer surface of the pipe 2, the rest of the outer surface of the pipe 2 fits with the inner wall and bottom of the bore 3), To calculate the The degree of integration of the various surfaces of the root tube 2 with the various surfaces in the drill hole 3, For the The temperature of each surface of the root tube 2, For the The average temperature of each surface of the root canal 2, It is the combination of the parameters of surface bonding degree and surface average temperature;

[0078] For the Average temperature of each surface of the root canal 2 Next, The degree of integration of the various surfaces of the root tube 2 with the various surfaces in the drill hole 3, For the All sides of the root tube 2; For the The fit between the various surfaces of the root tube 2 and the various surfaces in the drilled hole 3.

[0079] In formula (3), the average temperature of each surface of the entire pipe 2 is Under the condition of , the bonding degree between each surface of the whole pipe 2 and each surface in the drilled hole 3 is tested.

[0080] In addition, the following steps are used to detect whether the stacking of the entire 3D integrated circuit chip model 1 is offset:

[0081] Step A): determining whether the stacking of the entire 3D integrated circuit chip model 1 is offset in its height direction;

[0082] Step B): Analyze the stacking offset of the entire 3D integrated circuit chip model 1; if the stacking of the entire 3D integrated circuit chip model is offset in its height direction, the stacking of the 3D integrated circuit chip model is unqualified; if the stacking of the entire 3D integrated circuit chip model is not offset in its height direction, the stacking of the 3D integrated circuit chip model is qualified.

[0083] That is to say, once the tube 2 is bent, the stacking of the entire 3D integrated circuit chip model will be offset.

[0084] In step 4), the height displacement vector method is as follows: Formula (4) - Formula (5):

[0085] (4);

[0086] (5);

[0087] In formula (4), is the standard height of the entire 3D integrated circuit chip model (i.e., the height of the entire 3D integrated circuit chip model remains unchanged), The height at which the entire 3D integrated circuit chip model is displaced; The height is the sum of the standard height of the entire 3D integrated circuit chip model and the displacement height of the entire 3D integrated circuit chip model;

[0088] In formula (5), is the displacement height value of the entire 3D integrated circuit chip model, The displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving toward each other, or the displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving away from each other; The displacement height value of the entire 3D integrated circuit chip model in unit time is the displacement height value of moving toward or away from each other.

[0089] When the stack of the entire 3D integrated circuit chip model is not offset in the height direction, evaluating or estimating whether the height of the entire 3D integrated circuit chip model moves toward each other, moves away from each other, or does not move;

[0090] If the height of the entire 3D integrated circuit chip model is moved toward each other, the height of the entire 3D integrated circuit chip model is reduced;

[0091] If the height of the entire 3D integrated circuit chip model moves in the backward direction, the height of the entire 3D integrated circuit chip model increases;

[0092] If the height of the entire 3D integrated circuit chip model does not move, the height of the entire 3D integrated circuit chip model remains unchanged (i.e. ).

[0093] In step 5), the drilled holes opened on each actual integrated circuit chip are blind holes, and the length, width and height of each blind hole are equal. The actual straightness of each tube is kept consistent, and the actual tubes are inserted into each integrated circuit chip to produce the actual entire 3D integrated circuit chip.

[0094] Embodiment 3;

[0095] Based on Example 2, in formula (1) In accordance with Figure 2 The coordinate mark positions of drilling hole 3 are detected in the order of the dotted arrows.

[0096] for example: for Figure 2 The coordinates of the drill hole 3 in the upper left corner, for Figure 2 The coordinates of the drill hole 3 in the upper right corner, for Figure 2 The coordinates of the drill hole 3 in the lower right corner, for Figure 2 Coordinates of drill hole 3 in the lower left corner.

[0097] in addition, for Figure 2 Coordinates of the upper left hole 3 , for Figure 2 Coordinates of drill hole 3 in the lower right corner , for Figure 2 Coordinates of drill hole 3 in the lower left corner .

[0098] Embodiment 4;

[0099] Based on Example 2, by Figure 1 Combined with formula (5), the displacement height value of the entire 3D integrated circuit chip model is the case of moving towards each other, moving away from each other, or not moving;

[0100] Among them, the integrated circuit chip model 1 at the top of the entire 3D integrated circuit chip model and the integrated circuit chip model 1 at the bottom of the entire 3D integrated circuit chip model are close to each other, and the integrated circuit chip model 1 in the middle position of the entire 3D integrated circuit chip model does not undergo height displacement, then the height displacement of the entire 3D integrated circuit chip model is moving toward each other; the integrated circuit chip model 1 at the top of the entire 3D integrated circuit chip model and the integrated circuit chip model 1 at the bottom of the entire 3D integrated circuit chip model depart from each other, and the integrated circuit chip model 1 in the middle position of the entire 3D integrated circuit chip model does not undergo height displacement, then the height displacement of the entire 3D integrated circuit chip model is departing movement; each integrated circuit chip model 1 of the entire 3D integrated circuit chip model does not undergo height displacement, then the height displacement of the entire 3D integrated circuit chip model is not moving.

[0101] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope of the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A TSV automatic insertion method for a 3D integrated circuit, characterized in that: The steps include: Step 1): establishing each integrated circuit chip model, and opening a drill hole on each integrated circuit chip model; Step 2): Detect the number of drill holes on each integrated circuit chip model, and use the coordinate point vector method to detect the drill hole position on each integrated circuit chip model; In the step 2), a coordinate system of a certain integrated circuit chip model is set, and the coordinate point vector method is used to detect the drilling position on the certain integrated circuit chip model. The coordinate point vector method is the following formula (1): (1)； in, and Mark the coordinates of the holes to be drilled. or , To detect the coordinate mark positions of the drill holes in sequence, To determine the coordinates of the drill hole, mark the location; For the Drill holes, , and Respectively The height, length and width of each borehole; For parameter analysis operations, For the Height, length and width analysis of each borehole; To determine the The shape of the first drill hole and the analysis of the The height, length and width of the drilled holes, To determine the drilling shape operation, To determine the operation of a specific drilling; For the record arrive Each drill hole; Step 3): Determine the number of tubes according to the number of drilled holes on each integrated circuit chip model, automatically insert multiple tubes into the respective drilled holes on each integrated circuit chip model by using a straightness analysis method, generate the entire 3D integrated circuit chip model, and detect whether the stacking of the entire 3D integrated circuit chip model is offset; In the step 3), the straightness analysis method is the following formula (2): (2)； in, For a pipe part, For a pipe part, For a pipe part, For a pipe The cross-sectional area of ​​the segment, For a pipe The degree of curvature of the segment axis, For a pipe The temperature of the segment, Indicates the pipe The temperature of the segment is When the pipe The curvature of the segment axis is ; It is a combination of the cross-sectional area parameter of the pipe and the axial bending degree parameter of the pipe; For pipe The cross-sectional area of ​​the segment and the degree of axial curvature; It is the combination of parameters of each section of a pipe; To combine the parameters of each section of a pipe from one end to the other; is the straightness of a pipe; Step 4): using a height displacement vector method to estimate or estimate the height of the entire 3D integrated circuit chip model; In step 4), the height displacement vector method is the following formula (4)-formula (5): (4)； (5)； In formula (4), is the standard height of the entire 3D integrated circuit chip model, The height at which the entire 3D integrated circuit chip model is displaced; The height is the sum of the standard height of the entire 3D integrated circuit chip model and the displacement height of the entire 3D integrated circuit chip model; In formula (5), is the displacement height value of the entire 3D integrated circuit chip model, The displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving toward each other, or the displacement height change of the entire 3D integrated circuit chip model is a displacement height value of moving away from each other; is the displacement height value of the entire 3D integrated circuit chip model moving toward or away from each other within a unit time; Step 5): According to the generated entire 3D integrated circuit chip model, drilling holes are opened on each actual integrated circuit chip, and multiple actual pipes are inserted into each integrated circuit chip to manufacture the actual entire 3D integrated circuit chip.

2. The TSV automatic insertion method of a 3D integrated circuit according to claim 1, characterized in that: In the step 1), the length, width and height of each integrated circuit chip model are set to be equal, and a blind hole is opened on each integrated circuit chip model, and the length, width and height of each blind hole are equal.

3. The TSV automatic insertion method of a 3D integrated circuit according to claim 1, characterized in that: After the tube is automatically inserted into the drilled hole on the integrated circuit chip model, a surface parallel bonding method is used to detect whether each surface of the tube is in contact with each surface in the drilled hole. The surface parallel bonding method is the following formula (3): (3)； in, It is the degree of integration between each surface of the pipe and each surface in the drill hole. To calculate the The degree of integration of the various surfaces of the root canal with the various surfaces in the drill hole, For the The temperature of each surface of the root canal, For the The average temperature of each surface of the root canal, It is the combination of the parameters of surface bonding degree and surface average temperature; For the Average temperature of each surface of the root canal Next, The degree of integration of the various surfaces of the root canal with the various surfaces in the drill hole, For the All sides of the root canal; For the The fit of the various surfaces of the root canal with the various surfaces in the drill hole.

4. The TSV automatic insertion method of a 3D integrated circuit according to claim 1, characterized in that: Detecting whether the stacking of the entire 3D integrated circuit chip model is offset, using the following steps: Step A): determining whether the stacking of the entire 3D integrated circuit chip model is offset in its height direction; Step B): Analyze the stacking offset of the entire 3D integrated circuit chip model; if the stacking of the entire 3D integrated circuit chip model is offset in its height direction, the stacking of the 3D integrated circuit chip model is unqualified; if the stacking of the entire 3D integrated circuit chip model is not offset in its height direction, the stacking of the 3D integrated circuit chip model is qualified.

5. The TSV automatic insertion method of a 3D integrated circuit according to claim 1, characterized in that: When the stack of the entire 3D integrated circuit chip model is not offset in the height direction, evaluating or estimating whether the height of the entire 3D integrated circuit chip model moves toward each other, moves away from each other, or does not move; If the height of the entire 3D integrated circuit chip model is moved toward each other, the height of the entire 3D integrated circuit chip model is reduced; If the height of the entire 3D integrated circuit chip model moves in the backward direction, the height of the entire 3D integrated circuit chip model increases; If the height of the entire 3D integrated circuit chip model does not move, the height of the entire 3D integrated circuit chip model remains unchanged.

6. The TSV automatic insertion method of a 3D integrated circuit according to claim 1, characterized in that: In the step 5), the drilled holes actually opened on each of the integrated circuit chips are blind holes, and the length, width and height of each of the blind holes are equal.

7. The TSV automatic insertion method of a 3D integrated circuit according to claim 6, characterized in that: The actual straightness of each of the tubes is kept consistent, and the actual tubes are inserted into each of the integrated circuit chips to produce the actual entire 3D integrated circuit chip.

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