Split-phase power control method and system suitable for three-phase four-wire system converter

Abstract

The invention relates to a split-phase power control method and system suitable for a three-phase four-wire system converter, and belongs to the field of power grid balance control. Subtracting a converter DC side voltage sampling value from a converter DC side neutral-point voltage target value which is set to be 0, and superposing with output of zero-sequence current control after passing through a neutral-point potential controller to obtain a zero-axis voltage control value; the zero-axis voltage control value, a d-axis voltage control value obtained according to the d-axis current instruction value and a q-axis voltage control value obtained according to the q-axis current instruction value are subjected to Park inverse transformation to obtain a three-phase voltage control value, and PWM waves used for controlling a converter switching tube are output according to the three-phase voltage control value; the zero-sequence current control comprises the steps of subtracting a zero-sequence current component sampling value from a zero-sequence current instruction value and then outputting the result through a zero-sequence current loop controller. According to the control values of the zero-axis voltage, the d-axis voltage and the q-axis voltage, the PWM waves used for controlling the switching tubes are obtained, and the load balancing capacity of the transformer area converter is remarkably improved.

Description

Technical Field

[0001] The invention relates to a phase-splitting power control method and system suitable for a three-phase four-wire converter, and belongs to the field of power grid balance control. Background Art

[0002] In the grid-connected operation of wind power generation, photovoltaic power generation and other systems, the inverter that converts DC power into AC power is a key component of the power flow in the power system. The unbalanced grid voltage caused by unfavorable factors such as faults or bypassing is the biggest obstacle to the normal operation of the grid-connected inverter.

[0003] In the field of substation energy storage, it is usually necessary to manage the unbalanced load of the substation inverter based on the substation load information sent by the upper-level fusion terminal. The three-phase four-wire energy storage inverter in the substation needs to have the ability to independently control the active power and reactive power of the three phases A, B, and C.

[0004] When the active power and reactive power of the three phases A, B, and C are controlled independently, the current flowing through the N line will theoretically reach three times the single-phase rated current. Therefore, the number of supporting capacitors required on the DC side is three times the single-phase rated current flowing through the N line, resulting in increased costs. Therefore, in order to control costs, when the three-phase active power and reactive power are controlled independently, the N phase current also needs to be limited to ensure that it does not exceed the single-phase rated current. While limiting the N phase current, ensure that the phases of other phase currents are not affected. Summary of the invention

[0005] The purpose of the present invention is to provide a phase-splitting power control method and system suitable for a three-phase four-wire converter, so as to solve the problem of N-line current surge when performing phase-splitting power control on the three-phase four-wire converter.

[0006] To achieve the above object, the solution of the present invention includes:

[0007] The invention discloses a phase-splitting power control method for a three-phase four-wire converter. The method comprises the following steps: subtracting a DC side midpoint voltage target value of the converter set to 0 from a DC side voltage sampling value of the converter, and then superimposing the result with the output of the zero-sequence current control after passing through a midpoint potential controller; subjecting the zero-axis voltage control value, a d-axis voltage control value obtained according to a d-axis current command value, and a q-axis voltage control value obtained according to a q-axis current command value to a three-phase voltage control value after passing through a Park inverse transformation; and outputting a PWM wave for controlling a converter switch tube according to the three-phase voltage control value; and the zero-sequence current control comprises the following steps: subtracting a zero-sequence current command value from a zero-sequence current component sampling value, and then outputting the result through a zero-sequence current loop controller.

[0008] Furthermore, the zero-sequence current loop controller includes a primary PR controller and a tertiary PR controller, and the difference between the zero-sequence current command value and the zero-sequence current component sampling value is respectively passed through the primary PR controller and the tertiary PR controller and then superimposed as the output of the zero-sequence current loop controller.

[0009] Furthermore, the midpoint potential controller is a PI controller.

[0010] Further, the three-phase active power command values ​​are divided by the voltage amplitude of the corresponding phase on the grid side to obtain the three-phase active current command amplitude; the instantaneous value of the three-phase voltage on the grid side is divided by the voltage amplitude of the corresponding phase on the grid side and then multiplied by the three-phase active current command amplitude to obtain the three-phase active current command value; the three-phase reactive power command values ​​are divided by the voltage amplitude of the corresponding phase on the grid side to obtain the three-phase reactive current command amplitude; the instantaneous value of the three-phase voltage on the grid side is divided by the voltage amplitude of the corresponding phase on the grid side, and then multiplied by the three-phase reactive current command amplitude after being processed by an all-pass filter to obtain the three-phase reactive current command value; the three-phase reactive current command value and the three-phase active current command value are superimposed to obtain the three-phase current command value, and the three-phase current command value is subjected to Park transformation to obtain the zero-sequence current command value, the d-axis current command value and the q-axis current command value.

[0011] Furthermore, the instantaneous values ​​of the three-phase voltage on the grid side are processed by an all-pass filter respectively to obtain processed results; the processed results are squared and superimposed on the square of the instantaneous value of the three-phase voltage on the grid side, and the square root of the superimposed result is used as the voltage amplitude of the corresponding phase on the grid side.

[0012] Furthermore, before the three-phase active current command amplitudes and the three-phase reactive current command amplitudes are multiplied respectively, the three-phase active current command amplitudes and the three-phase reactive current command amplitudes are vector limited.

[0013] Furthermore, when the amplitude of the zero-sequence current command value is greater than 1pu, the zero-sequence current command value, the d-axis current command value and the q-axis current command value are also divided by the zero-sequence current command amplitude as new zero-sequence current command value, d-axis current command value and q-axis current command value; the zero-sequence current command amplitude is obtained by taking the root mean square of the result after the zero-sequence current reference value and the zero-sequence current reference value are processed by a full-pass filter.

[0014] Furthermore, the vector limit amplitude is such that the root mean square of the active current command amplitude and the reactive current command amplitude of each phase does not exceed 1.

[0015] Furthermore, the d-axis current command value is subtracted from the d-axis sampling value of the inductor current, and the corresponding results are obtained by passing through a PI controller once and a PR controller twice. The corresponding results are superimposed, and the result after multiplying the q-axis sampling value of the inductor current by the inductor impedance and the positive-sequence d-axis component of the grid-side voltage are superimposed together to obtain the d-axis voltage control value; the q-axis current command value is subtracted from the q-axis sampling value of the inductor current, and the corresponding results are obtained by passing through a PI controller once and a PR controller twice. The corresponding results are superimposed, and the result after multiplying the d-axis sampling value of the inductor current by the inductor impedance and the positive-sequence q-axis component of the grid-side voltage are superimposed together to obtain the q-axis voltage control value.

[0016] A phase-splitting power control system applicable to a three-phase four-wire converter of the present invention comprises a processor, and the processor is used to execute a computer program to implement the steps of a phase-splitting power control method applicable to a three-phase four-wire converter.

[0017] The beneficial effects of the present invention are as follows: the present invention is a pioneering invention, which subtracts the target value of the DC side voltage of the converter set to 0 from the DC side voltage sampling value of the converter, and then passes through the midpoint potential controller and is superimposed with the output of the zero-sequence current control to obtain the zero-axis voltage control value; the zero-axis voltage control value, the d-axis voltage control value obtained according to the d-axis current command value, and the q-axis voltage control value obtained according to the q-axis current command value are subjected to the Park inverse transformation to obtain the three-phase voltage control value, and the PWM wave for controlling the converter switch tube is output according to the three-phase voltage control value; the zero-sequence current control includes subtracting the zero-sequence current command value from the zero-sequence current component sampling value and outputting it through the zero-sequence current loop controller. The present invention obtains the PWM wave for controlling the switch tube according to the zero-axis voltage control value, the d-axis voltage control value, and the q-axis voltage control value, which significantly improves the load balancing capability of the transformer in the substation area. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of a circuit topology used in the present invention;

[0019] Figure 2 It is a schematic diagram of generating d-axis, q-axis and zero-sequence current according to active power and reactive power of the present invention;

[0020] Figure 3 It is a schematic diagram of generating a three-phase voltage of a converter according to a d-axis, a q-axis and a zero-sequence current of the present invention;

[0021] Figure 4 It is a schematic diagram of the change of the three-phase voltage of the power grid and the three-phase current connected to the grid with time when simulating the present invention;

[0022] Figure 5 is a schematic diagram of the change of active power and reactive power of phase A over time when simulating the present invention;

[0023] Figure 6 is a schematic diagram of the change of active power and reactive power of phase B over time when simulating the present invention;

[0024] Figure 7 It is a schematic diagram of the change of active power and reactive power of phase C over time when simulating the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0026] The idea of ​​the present invention is to obtain a zero-axis voltage control value by superimposing the zero-sequence current command value with the result after midpoint potential control after zero-sequence current control, and to obtain a three-phase voltage control value by combining the d-axis voltage control value and the q-axis voltage control value, and then control the switch tube in the converter according to the three-phase voltage control value.

[0027] Method Example:

[0028] This embodiment provides a phase-splitting power control method applicable to a three-phase four-wire converter. The main circuit topology diagram of the system for converting DC power on the DC side into AC power on the grid side is shown in FIG. Figure 1 As shown in the figure, L1 is the filter inductor on the inverter side, L2 is the filter inductor on the grid side, and C f is the filter capacitor group, Z g is the equivalent impedance of the power grid, S ai , S bi , S ci is the switch tube, i La 、i Lb 、i Lc is the inductor current, i a 、i b 、i c are the three-phase grid-connected current, u ga 、u gb 、u gc is the phase voltage of the three-phase power grid. In order to facilitate control and improve control accuracy, a dq axis current inner loop controller based on PI regulator and PR regulator control and a zero sequence current loop controller based on PR and PR are designed. At the same time, in order to ensure the midpoint balance of the DC side, a midpoint controller based on PI regulator is designed.

[0029] When the active power and reactive power of phases A, B, and C need to be adjusted, the active power command values ​​P corresponding to phases A, B, and C are sent to the converter. a_ref , P b_ref , P b_ref and reactive power command value Qa_ref , Q b_ref , Q c_ref Then, the three-phase active power command values ​​and reactive power command values ​​are processed accordingly, and the d-axis current command value, the q-axis current command value and the zero-sequence current command value are obtained accordingly.

[0030] Specifically, Figure 2 As shown in the figure, P abc_ref They represent the active power command values ​​of phases A, B, and C respectively, Q abc_ref It represents the reactive power command value of phases A, B, and C, v mabc It represents the voltage amplitude of phases A, B, and C on the grid side, v abc It represents the instantaneous voltage value of phases A, B, and C on the grid side. mabc_p_ref It represents the active current command amplitude of phases A, B, and C, i Ld_ref 、i Lq_ref 、i Lz_ref It represents the corresponding d-axis current command value, q-axis current command value and zero-sequence current command value. Among them, v mabc Yes abc After APF (All-Pass Filter) processing, the processed result is squared and the squared result is added to v abc The result is squared and then the square root of the sum is taken.

[0031] The three-phase P abc_ref The active power command value is divided by the corresponding A, B, and C phase voltage amplitude v on the grid side. ma 、v mb 、v mc , corresponding to the active current command amplitude i of each phase ma_p_ref 、i mb_p_ref 、i mc_p_ref , as shown in formula (1):

[0032]

[0033] Then the voltage amplitude v of each phase on the grid side is abc The result of dividing by the instantaneous value of the voltage of each phase on the grid side is multiplied by the active current command amplitude of the corresponding phase, thereby obtaining the active current command values ​​i of the three phases A, B, and C. abc_p_ref , as shown in formula (2):

[0034]

[0035] Then the three-phase Q abc_ref The reactive power command value is divided by the corresponding A, B, and C phase voltage amplitude v on the grid side. ma、v mb 、v mc , get the reactive current command amplitude i of each phase ma_q_ref 、i mb_q_ref 、i mc_q_ref , as shown in formula (3):

[0036]

[0037] Then the instantaneous voltage value v of each phase on the grid side is abc The result after dividing by the voltage amplitude of each phase on the grid side is input into the APF for phase shift processing of 90 degrees, and the result processed by the APF is multiplied by the reactive current command amplitude of the corresponding phase to obtain the reactive current command value i of the three phases A, B, and C. abc_q_ref , as shown in formula (4):

[0038]

[0039] in, It represents a full-pass filter, ω0 is the power frequency angular frequency, and s is the differential operator.

[0040] Then the obtained three-phase active current command value and three-phase reactive current command value are superimposed to obtain the three-phase current command value i abc_ref .

[0041] Then the obtained three-phase current command value i abc_ref Perform abc / dq0 (Park transformation) to obtain the d-axis current command value, the q-axis current command value, and the zero-sequence current command value.

[0042] Then the obtained d-axis current command value, q-axis current command value and zero-sequence current command value are processed accordingly to obtain the corresponding d-axis voltage control value U d , q-axis voltage control value U q And the zero-sequence voltage control value U0.

[0043] Specifically, Figure 3 As shown, the positive and negative sequence current loop, i.e., the dq axis current inner loop controller, adopts a composite control method of the current inner loop of the first PI regulator and the second PR regulator. The PI regulator is used to control the DC positive sequence component obtained after the abc / dq0 transformation in the inductor current, and the second PR regulator is used to control the double frequency AC negative sequence component obtained after the abc / dq0 transformation in the inductor current. The zero sequence component adopts the zero sequence current loop control of the first PR regulator and the third PR regulator, wherein the first PR regulator is used to track the fundamental component, and the third PR regulator is used to eliminate the third component in the zero sequence current under the unbalanced grid voltage; the DC side midpoint potential control adopts the first PI controller, and the DC side upper and lower bus voltage difference Δu dcAfter the first PI regulator control, the zero-sequence control quantity is obtained, which is superimposed on the zero axis and connected in parallel with the zero-sequence current loop to jointly achieve the goal of zero-sequence current and midpoint potential control.

[0044] The positive and negative sequence current loop receives the d-axis current command value and the inductor current d-axis sampling value i Ld The difference is controlled, that is, the difference result is superimposed after passing through the PI regulator once and the PR regulator twice to obtain the corresponding voltage; the positive sequence d-axis component u dp And the q-axis current sampling value i of the inductor current Lq The result after ωL processing is superimposed on the voltage obtained by the PI regulator once and the PR regulator twice to obtain the d-axis voltage control value U d .

[0045] The positive and negative sequence current loop receives the q-axis current reference value instruction and the inductor current q-axis sampling value i Lq The difference is controlled, that is, the difference result is superimposed after passing through the PI regulator once and the PR regulator twice to obtain the corresponding voltage; the positive sequence q-axis component u qp And the d-axis sampling value of the inductor current i Ld The result after ωL processing is superimposed on the voltage obtained after superposition of the PI regulator once and the PR regulator twice, and the q-axis voltage control value U is obtained. q .

[0046] The zero-sequence current loop controller receives the zero-sequence current command value and the zero-sequence current component sampling value i Lz The difference is controlled by adding the difference results after the first PR regulator and the third PR regulator to obtain the corresponding voltage; 0 is used as the voltage target value of the midpoint potential control and the voltage difference Δu between the upper and lower busbars on the DC side dc The difference is made, and the result of the difference is superimposed on the voltage obtained after the superposition of the PI regulator and the PR regulator for three times, and the zero-axis voltage control value U0 is obtained. Among them, 0 is used as the voltage target value of the midpoint potential control in order to better control the zero-axis voltage. In practice, a small range around 0 can also be selected.

[0047] The obtained d-axis voltage control value U d , q-axis voltage control value U q And the zero-sequence voltage control value U0 is transformed by abc / dq0 (Park inverse transformation) to obtain the A, B, C three-phase voltage control value U abcThe carrier stacked SPWM (Sinusoidal Pulse Width Modulation) outputs a PWM (Pulse Width Modulation) wave according to the three-phase voltage control value, thereby controlling the opening and closing of the switch tube in the converter, thereby achieving the purpose of controlling the three-phase active power and reactive power of the converter, and at the same time stably controlling the N-line current.

[0048] As another embodiment, the active current command amplitude i of each phase is obtained. ma_p_ref 、i mb_p_ref 、i mc_p_ref and the reactive current command amplitude i of each phase ma_q_ref 、i mb_q_ref 、i mc_q_ref Vector limiting amplitude is performed, that is, the root mean square of the active current command amplitude and the reactive current command amplitude of each phase does not exceed 1.

[0049] The zero-sequence current command value i Lz_ref The zero-sequence current command value is processed by APF to obtain the zero-sequence current command after phase shift of 90 degrees. The root mean square of the two is taken to obtain the zero-sequence current command amplitude i Lz_ref_m , when the amplitude of the zero-sequence current command value is greater than 1pu, the current zero-sequence current command value i Lz_ref Divided by the zero-sequence current command amplitude i Lz_ref_m , get the zero-sequence current command limit value i Lz_ref_limit , and the zero-sequence current command limit value is used as the new zero-sequence current command value, thereby limiting the zero-sequence current to 1pu; when the amplitude of the zero-sequence current command value is less than or equal to 1pu, the current zero-sequence current command value is taken as the zero-sequence current command limit value, as shown in formula (5):

[0050]

[0051] At the same time, when the zero-sequence current command value is greater than 1pu, the current d-axis current command value and q-axis current command value i Ldq_ref Divided by the zero-sequence current command amplitude i Lz_ref_m , respectively corresponding to the d-axis current command limit value and the q-axis current command limit value i Ldq_ref_limit , and use the d-axis current command limit value and the q-axis current command limit value as the new d-axis current command value and the q-axis current command value, thereby reducing the d-axis current command value and the q-axis current command value in proportion, thereby ensuring that the output N-line current does not exceed 1pu, and also ensuring that the amplitude of the ABC three-phase current is proportionally reduced according to the N-line current limit; when the zero-sequence current command value is less than or equal to 1pu, remove the current d-axis current command value and the q-axis current command value as the d-axis current command limit value and the q-axis current command limit value, as shown in formula (6):

[0052]

[0053] In order to verify the beneficial effects of the present invention, a simulation verification of the present invention was carried out. Figure 4 The corresponding relationship diagram of the three-phase voltage of the power grid and the three-phase current of the grid-connected power grid over time, in which u abc It represents the three-phase voltage of the power grid, i abc It represents the three-phase current of the grid, i z It represents the grid-connected zero-sequence current; Figure 5 The corresponding relationship diagram of the active power and reactive power of phase A of the converter changing with time, in which P represents the active power of phase A and Q represents the reactive power of phase A; Figure 6 The corresponding relationship diagram of the active power and reactive power of phase B of the converter changing with time, in which P represents the active power of phase B and Q represents the reactive power of phase B; Figure 7 It is the corresponding relationship diagram of the active power and reactive power of phase C of the converter changing with time, in which P represents the active power of phase C, and Q represents the reactive power of phase C.

[0054] As can be seen from the figure, Phase A: 0-0.5s stage, 8.3kW active power, 0 reactive power, 0.5-1s stage, 10kW active power, 0 reactive power; Phase B: 0-0.5s stage, 8.3kW active power, 0 reactive power, 0.5-1s stage, -10kW active power, 0 reactive power; Phase C: 0-0.5s stage, 0 active power, 0 reactive power, 0.5-1s stage, 0 active power, 0 reactive power.

[0055] System Example:

[0056] This embodiment provides a phase-splitting power control system suitable for a three-phase four-wire converter. When controlling the N-line current of the three-phase four-wire converter, the system adopts the method introduced in the method embodiment. Since the introduction of the method is clear enough, it will not be repeated here.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A phase-splitting power control method applicable to a three-phase four-wire converter, characterized in that: The target value of the DC side midpoint voltage of the converter set to 0 is subtracted from the DC side voltage sampling value of the converter, and then the zero-axis voltage control value is obtained after being superimposed with the output of the zero-sequence current control after passing through the midpoint potential controller; the zero-axis voltage control value, the d-axis voltage control value obtained according to the d-axis current command value, and the q-axis voltage control value obtained according to the q-axis current command value are subjected to Park inverse transformation to obtain a three-phase voltage control value, and a PWM wave for controlling the converter switch tube is output according to the three-phase voltage control value; the zero-sequence current control includes subtracting the zero-sequence current command value from the zero-sequence current component sampling value and outputting it through a zero-sequence current loop controller.

2. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 1, characterized in that: The zero-sequence current loop controller includes a primary PR controller and a tertiary PR controller. The difference between the zero-sequence current command value and the zero-sequence current component sampling value is respectively passed through the primary PR controller and the tertiary PR controller and then superimposed as the output of the zero-sequence current loop controller.

3. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 1, characterized in that: The midpoint potential controller is a PI controller.

4. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 1, characterized in that: The three-phase active power command values ​​corresponding to the three phases are divided by the voltage amplitude of the corresponding phase on the grid side to obtain the three-phase active current command amplitude; the instantaneous value of the three-phase voltage on the grid side is divided by the voltage amplitude of the corresponding phase on the grid side and then multiplied by the three-phase active current command amplitude to obtain the three-phase active current command value; The three-phase reactive power command values ​​corresponding to the three phases are divided by the voltage amplitude of the corresponding phases on the grid side to obtain the three-phase reactive current command amplitude; the instantaneous value of the three-phase voltage on the grid side is divided by the voltage amplitude of the corresponding phase on the grid side, and then multiplied by the three-phase reactive current command amplitude after being processed by an all-pass filter to obtain the three-phase reactive current command value; the three-phase reactive current command value and the three-phase active current command value are superimposed to obtain the three-phase current command value, and the three-phase current command value is subjected to Park transformation to obtain the zero-sequence current command value, the d-axis current command value and the q-axis current command value.

5. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 4, characterized in that: The instantaneous values ​​of the three-phase voltage on the grid side are processed by all-pass filters to obtain processed results; the processed results are squared and superimposed on the square of the instantaneous value of the three-phase voltage on the grid side, and the square root of the superimposed result is used as the voltage amplitude of the corresponding phase on the grid side.

6. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 4, characterized in that: Before the three-phase active current command amplitudes and the three-phase reactive current command amplitudes are multiplied respectively, the three-phase active current command amplitudes and the three-phase reactive current command amplitudes are vector limited.

7. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 4, characterized in that: When the amplitude of the zero-sequence current command value is greater than 1pu, the zero-sequence current command value, d-axis current command value and q-axis current command value are also divided by the zero-sequence current command amplitude as the new zero-sequence current command value, d-axis current command value and q-axis current command value; the zero-sequence current command amplitude is obtained by taking the root mean square of the result after the zero-sequence current reference value and the zero-sequence current reference value are processed by a full-pass filter.

8. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 6, characterized in that: The vector limit amplitude is that the root mean square of the active current command amplitude and the reactive current command amplitude of each phase does not exceed 1.

9. The phase-splitting power control method applicable to a three-phase four-wire converter according to claim 1, characterized in that: The d-axis current command value is subtracted from the d-axis sampling value of the inductor current, and the corresponding results are obtained by passing through a PI controller once and a PR controller twice. The corresponding results are superimposed, and the result after multiplying the q-axis sampling value of the inductor current by the inductor impedance and the positive-sequence d-axis component of the grid-side voltage are superimposed together to obtain the d-axis voltage control value; the q-axis current command value is subtracted from the q-axis sampling value of the inductor current, and the corresponding results are obtained by passing through a PI controller once and a PR controller twice. The corresponding results are superimposed, and the result after multiplying the d-axis sampling value of the inductor current by the inductor impedance and the positive-sequence q-axis component of the grid-side voltage are superimposed together to obtain the q-axis voltage control value.

10. A phase-splitting power control system suitable for a three-phase four-wire converter, comprising a processor, characterized in that: The processor is used to execute a computer program to implement the steps of the phase-splitting power control method applicable to a three-phase four-wire converter as described in any one of claims 1 to 9.

Images