Wide-range high-sensitivity passive rectifier

Abstract

The invention provides a wide-range high-sensitivity passive rectifier. The wide-range high-sensitivity passive rectifier comprises a differential signal input end; the rectification circuit comprises a plurality of rectification NMOS tubes and a plurality of rectification PMOS tubes; substrates of the plurality of rectification PMOS tubes are connected with an output positive electrode of the rectifier, and substrates of the plurality of rectification NMOS tubes are connected with an output negative electrode of the rectifier; the feedback biasing circuit comprises a plurality of feedback PMOS (P-channel Metal Oxide Semiconductor) tubes and is used for adaptively controlling the highest grid voltage of the plurality of rectification NMOS (N-channel Metal Oxide Semiconductor) tubes; and the number of the plurality of rectification NMOS tubes is the same as that of the plurality of rectification PMOS tubes. The rectifier is based on the feedback bias circuit, the grid voltage of the rectification NMOS tube can be increased under low input power, forward current is expanded, and therefore sensitivity is improved; and meanwhile, the bias voltage is adaptively reduced under high input power, the grid voltage of the NMOS tube is clamped and rectified, the reverse current is effectively inhibited, and the wide dynamic range of the rectifier is expanded.

Description

Technical Field

[0001] The invention relates to the field of rectifier circuits, and in particular to a wide-range high-sensitivity passive rectifier. Background Art

[0002] Wireless energy transmission or energy harvesting has a wide range of power supply application scenarios in medical electronic equipment, photothermal equipment, or solar equipment. How to design a wide-range, high-sensitivity, and high-efficiency rectifier is a key issue.

[0003] In recent years, a cross-coupling architecture based on auxiliary circuits has been proposed, which has been proven to effectively expand the dynamic range (DR).

[0004] In the related art, there are two main types of auxiliary circuits: one is based on a resistor feedback circuit, which connects the gate of the rectifier PMOS tube to the positive electrode of the rectifier output. A large resistor is connected between the two terminals to add additional DC output voltage to the gate of the rectifier PMOS tube; the other is a diode-based bilateral feedback circuit, which connects a diode-connected PMOS tube between the gate of the rectifier PMOS (NMOS) tube and the positive (negative) output of the rectifier to act as a controllable resistor and achieve bilateral dynamic DC voltage bias.

[0005] For the first method mentioned above, since the gate of the rectifier PMOS tube is always Static DC bias, to some extent, reduces (gate-source voltage); at low input power, the dominant forward conduction current is suppressed, resulting in reduced rectification efficiency; and as the input power continues to increase, the reverse leakage current increases significantly, The reverse leakage current suppression effect is Limitation, the rectification efficiency decreases, and the dynamic energy input range is low; for the second method mentioned above: under low input power, even if the feedback PMOS tube based on the diode connection has a higher resistance, adding the feedback loop to the bilateral rectifier tube will suppress the gate voltage of the rectifier tube too much, resulting in a lower forward conduction current and reduced sensitivity; as the input power increases further, the effect of the feedback loop on the rectifier PMOS tube side in suppressing the reverse leakage current weakens, which is obviously not as good as the effect of the feedback loop on the rectifier NMOS tube side.

[0006] In general, the above methods improve the rectifier efficiency at high input power, but the expanded dynamic range is limited; in addition, the rectification efficiency at low input power is suppressed, reducing the sensitivity of the rectifier. Summary of the invention

[0007] The present invention provides a wide-range high-sensitivity passive rectifier, which is used to solve the defects of low rectification efficiency and low dynamic energy input range of the rectifier designed based on a resistor feedback circuit in the prior art, and low sensitivity when the rectifier is designed based on a diode bilateral feedback circuit, thereby improving the rectification efficiency, sensitivity and dynamic energy input range of the rectifier.

[0008] The present invention provides a wide-range high-sensitivity passive rectifier, comprising: A differential signal input terminal, wherein two electrodes of the differential signal input terminal are connected to at least one capacitor to filter out an AC voltage signal from the differential signal output from the differential signal input terminal; A rectifier circuit, the rectifier circuit comprising a plurality of rectifier NMOS tubes and a plurality of rectifier PMOS tubes; the substrates of the plurality of rectifier PMOS tubes are connected to the positive electrode of the rectifier output, and the substrates of the plurality of rectifier NMOS tubes are connected to the negative electrode of the rectifier output; the two poles of the differential signal input end are respectively connected to the gate of the corresponding NMOS tube through the at least one capacitor; the rectifier circuit is used to realize the conversion from AC voltage input to DC voltage output; wherein the number of the plurality of rectifier NMOS tubes is the same as the number of the plurality of rectifier PMOS tubes; A feedback bias circuit, the feedback bias circuit comprising a feedback PMOS tube, the gate and drain of the feedback PMOS tube are respectively connected to the gates of the multiple rectifying NMOS tubes, and the substrate and source of the feedback PMOS tube are both connected to a target end; the feedback PMOS tube is used to clamp the highest gate voltage of the multiple rectifying NMOS tubes within a target voltage range; wherein the target end comprises a bias voltage output end or a negative electrode output by the rectifier; the target voltage range is adjusted by the substrate voltage and PN junction conduction voltage of the feedback PMOS tube.

[0009] According to the present invention, a wide-range high-sensitivity passive rectifier is provided, wherein the plurality of rectifying NMOS tubes include a first rectifying NMOS tube and a second rectifying NMOS tube; the plurality of rectifying PMOS tubes include a first rectifying PMOS tube and a second rectifying PMOS tube; The positive electrode of the differential signal input terminal is connected to the gate of the first rectifying NMOS tube through at least one capacitor; the negative electrode of the differential signal input terminal is connected to the gate of the second rectifying NMOS tube through at least one capacitor; The gate of the first rectifying NMOS tube and the gate of the second rectifying NMOS tube are both connected to the drain and gate of the feedback PMOS tube; The drain of the first rectifying NMOS tube is connected to the drain of the first rectifying PMOS tube; the drain of the second rectifying NMOS tube is connected to the drain of the second rectifying PMOS tube.

[0010] According to the present invention, there is provided a wide range high sensitivity passive rectifier, wherein the at least one capacitor comprises a first capacitor and a second capacitor; The input end of the first capacitor is connected to the differential signal input end, the output end of the first capacitor is respectively connected to the input end of the second capacitor and the drain of the corresponding rectifier PMOS tube; the output end of the second capacitor is connected to the gate of the corresponding rectifier NMOS tube.

[0011] According to the present invention, a wide-range high-sensitivity passive rectifier is provided, wherein the first capacitor includes a first sub-capacitor and a second sub-capacitor, and the second capacitor includes a third sub-capacitor and a fourth capacitor; the first sub-capacitor is the same as the second sub-capacitor, and the third sub-capacitor is the same as the fourth capacitor; The input end of the first sub-capacitor is connected to the positive electrode of the differential signal input end, the output end of the first sub-capacitor is connected to the input end of the third sub-capacitor and the drain of the first rectifier PMOS tube respectively; the output end of the third sub-capacitor is connected to the gate of the first rectifier NMOS tube; The input end of the second sub-capacitor is connected to the negative electrode of the differential signal input end, and the output end of the second sub-capacitor is respectively connected to the input end of the fourth sub-capacitor and the drain of the second rectifier PMOS tube; the output end of the fourth sub-capacitor is connected to the gate of the second rectifier NMOS tube.

[0012] According to the present invention, a wide-range high-sensitivity passive rectifier is provided, wherein the target end is a bias voltage output end; The feedback bias circuit further includes: A bias voltage generating module, wherein the input end of the bias voltage generating module is connected to the positive output electrode of the rectifier, and the output end is connected to the bias voltage output end; the bias voltage generating module is used to control the substrate voltage of the feedback PMOS tube to increase by increasing the bias voltage when the input power of the rectifier circuit is lower than the power threshold, so as to increase the gate voltage of the multiple rectifier NMOS tubes; when the input power of the rectifier circuit is higher than the power threshold, control the substrate voltage of the feedback PMOS tube to decrease by reducing the bias voltage, so as to clamp the highest gate voltage of the multiple rectifier NMOS tubes to a low voltage level.

[0013] The wide-range high-sensitivity passive rectifier provided by the present invention is based on a fully differential rectification architecture and is added with an adaptive feedback bias circuit; a feedback PMOS tube is arranged on the side of the rectification NMOS tube to control the maximum gate voltage of the rectification NMOS tube; a feedback bias circuit is arranged to adaptively generate a voltage that decreases as the input power increases to bias the substrate voltage of the feedback PMOS tube, thereby increasing the maximum gate voltage of the rectification NMOS tube under low input power, enhancing the forward current, and improving the sensitivity of the rectifier; and as the input power increases, the maximum gate voltage of the rectification NMOS tube is clamped to a low voltage level, which can effectively suppress the reverse leakage current and expand the dynamic range of the rectifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 This is one of the structural schematic diagrams of the wide-range high-sensitivity passive rectifier provided by the present invention.

[0016] Figure 2 This is the second structural schematic diagram of the wide-range high-sensitivity passive rectifier provided by the present invention.

[0017] Reference numerals: 110: differential signal input terminal; 120: rectifier circuit; 130: feedback bias circuit; 131: Feedback PMOS tube; 132: Bias voltage generation module. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] Combine the following Figure 1-Figure 2 The wide range high sensitivity passive rectifier of the present invention is described.

[0020] Figure 1It is one of the structural schematic diagrams of the wide-range high-sensitivity passive rectifier provided by the present invention. The wide-range high-sensitivity passive rectifier can be a rectifier unit built into the photothermal device, including: a differential signal input terminal 110, a rectifier circuit 120 and a feedback bias circuit 130.

[0021] Two electrodes of the differential signal input terminal 110 are connected to at least one capacitor to filter out an AC voltage signal from the differential signal output from the differential signal input terminal 110 .

[0022] In this embodiment, the positive electrode of the differential signal input terminal 110 may be connected to one or more capacitors, and the negative electrode of the differential signal input terminal 110 may be connected to one or more capacitors.

[0023] In this embodiment, when the differential signal input terminal 110 is connected to multiple capacitors, the input capacitors at the positive and negative electrodes are used to extract the AC voltage signal from the input differential signal, and the other capacitors are used to achieve independent adjustment of the gate of the rectifier NMOS tube while reducing the impact on the rectifier input impedance.

[0024] In this embodiment, the number and specification parameters of the capacitors connected to the two electrodes of the differential signal input terminal 110 can be designed symmetrically. For example, the positive electrode of the differential signal input terminal 110 is connected to two identical or different capacitors A and B, and the negative electrode of the differential signal input terminal 110 is connected to capacitors A and B.

[0025] The rectifier circuit 120 includes a plurality of rectifier NMOS tubes and a plurality of rectifier PMOS tubes; the number of the plurality of rectifier NMOS tubes is the same as the number of the plurality of rectifier PMOS tubes. The substrates of the plurality of rectifier PMOS tubes are connected to the positive electrode of the rectifier output, and the substrates between the plurality of rectifier NMOS tubes are connected to the negative electrode of the rectifier output; the two poles of the differential signal input terminal 110 are respectively connected to the gate of the corresponding rectifier NMOS tube through at least one capacitor; the rectifier circuit is used to realize the conversion from AC voltage input to DC voltage output.

[0026] In this embodiment, the rectifier circuit 120 is used for full differential rectification to reduce the effective threshold voltage of the rectifier circuit.

[0027] In this embodiment, the substrates of the plurality of rectifying PMOS tubes include branches connected to the sources of the rectifying PMOS tubes, and the substrates of the plurality of rectifying NMOS tubes include branches connected to the sources of the rectifying NMOS tubes.

[0028] In this embodiment, the AC voltage signal is input to the gate of the rectifier NMOS tube through an independent capacitor, providing an independent AC branch for the rectifier NMOS tube.

[0029] The feedback bias circuit 130 includes a feedback PMOS tube 131, wherein the gate and drain of the feedback PMOS tube 131 are respectively connected to the gates of multiple rectifying NMOS tubes, and the substrate and source of the feedback PMOS tube 131 are both connected to the target end; the feedback PMOS tube 131 is used to control the highest gate voltage of the multiple rectifying NMOS tubes; wherein the target end includes a bias voltage output end or a negative electrode of a rectifier output; and the target voltage range is adjusted by the substrate voltage and the PN junction conduction voltage of the feedback PMOS tube.

[0030] In this embodiment, the substrate and source of the feedback PMOS tube 131 are connected to the feedback loop side, and the drain and gate are connected to the gate of the rectifying NMOS tube for voltage control.

[0031] In this embodiment, a feedback loop may be designed using a PMOS tube in a diode connection form to adjust the gate of the rectifier NMOS tube.

[0032] In this embodiment, the number of rectifying NMOS tubes is the same as the number of feedback PMOS tubes, that is, the drains and gates of different feedback PMOS tubes 131 are connected to the gates of different rectifying NMOS tubes, and the sources of all feedback PMOS tubes 131 are connected to the target end.

[0033] In this embodiment, the source of the feedback PMOS tube 131 can be directly connected to the bias voltage output terminal, or can be connected to the negative electrode of the rectifier output; for example, the substrate of the feedback PMOS tube is directly connected to the low potential of the negative electrode of the rectifier output, which can ensure that the highest gate voltage on the rectifier NMOS tube side is always at a lower potential. For high load impedance, it can suppress reverse current starting from a relatively low input power.

[0034] In this embodiment, at the gate node of the rectifier NMOS tube, there are three current loops, namely, the feedback loop, the AC loop and the gate current loop of the rectifier NMOS tube itself; according to Kirchhoff's current law, in a steady-state cycle, since the DC component of the AC loop is zero, the feedback loop current is directly determined by the gate current of the rectifier NMOS tube; since the magnitude of the gate current of the rectifier NMOS tube is very small, Level, and in the feedback loop, when the drain voltage of the feedback PMOS tube 131 is higher than the substrate voltage, the tube is equivalent to a PN junction and is in a reverse bias state. Once it is fully turned on, the exponentially increasing current magnitude is very large. Therefore, the limited gate current capacity will limit the gate voltage of the rectifier NMOS tube. At high input power, the maximum gate voltage of the rectifier NMOS tube is will be clamped at Nearby, among them, To feed back the substrate voltage of the PMOS tube 131, To feedback the PN junction conduction voltage of the PMOS tube 131; therefore, as the input power increases, the gate voltage of the rectifying NMOS tube will not increase accordingly, but will be clamped at a low voltage value; and at low input power, the maximum gate voltage of the rectifying NMOS tube can increase with the increase of input power, thereby reducing the equivalent threshold voltage of the rectifying NMOS tube; at high input power, the rectifying architecture based on the unilateral feedback loop of the rectifying NMOS tube can effectively suppress the reverse leakage current, thereby expanding the dynamic range; at low input power, the rectifying architecture based on the unilateral feedback loop of the rectifying NMOS tube can maintain the forward current, thereby improving the sensitivity.

[0035] In this embodiment, the rectifier architecture adopted in this embodiment is a passive rectifier, which does not require complex structures such as comparators. In addition, the number of MOS tubes set in the rectifier is small, and the tube parameter optimization is simple.

[0036] The wide-range high-sensitivity passive rectifier provided by the embodiment of the present invention is based on a fully differential rectification architecture and is added with an adaptive feedback bias circuit; a feedback PMOS tube is set on the side of the rectifier NMOS tube to control the maximum gate voltage of the rectifier NMOS tube; a feedback bias circuit is set to adaptively generate a voltage that decreases as the input power increases to bias the substrate voltage of the feedback PMOS tube, thereby increasing the maximum gate voltage of the rectifier NMOS tube under low input power, enhancing the forward current, and improving the sensitivity of the rectifier; and as the input power increases, the maximum gate voltage of the rectifier NMOS tube is clamped to a low voltage level, which can effectively suppress the reverse leakage current and expand the dynamic range of the rectifier.

[0037] Furthermore, the multiple rectifying NMOS tubes include a first rectifying NMOS tube and a second rectifying NMOS tube; the multiple rectifying PMOS tubes include a first rectifying PMOS tube and a second rectifying PMOS tube; the positive electrode of the differential signal input terminal 110 is connected to the gate of the first rectifying NMOS tube through at least one capacitor; the negative electrode of the differential signal input terminal 110 is connected to the gate of the second rectifying NMOS tube through at least one capacitor; the gate of the first rectifying NMOS tube and the gate of the second rectifying NMOS tube are both connected to the drain and gate of the feedback PMOS tube 131; the drain of the first rectifying NMOS tube is connected to the drain of the first rectifying PMOS tube; the drain of the second rectifying NMOS tube is connected to the drain of the second rectifying PMOS tube.

[0038] Figure 2 This is the second structural diagram of the wide range high sensitivity passive rectifier provided by the present invention. Figure 2 In the embodiment shown, the first rectifying NMOS tube is M N1 The second rectifier NMOS tube is M N2 The first rectifier PMOS tube is M P1The second rectifier PMOS tube is M P2 , the feedback PMOS tube is connected in the form of a diode, including D P1 and D P2 ; The positive pole of the differential signal input terminal is V RF+ , the negative pole is V RF- ; V RF+ Through the capacitor With M N1 The gate connection, V RF- Through the capacitor With M N2 Gate connection; D P1 The gate and drain of M N1 The gate connection, D P2 The gate and drain of M N2 Gate connection; M N1 The drain and M P1 The drain of the rectifier is connected to the positive output of the rectifier, M N2 The drain and M P2 The drain of the rectifier is connected to the negative output of the rectifier, and a filter capacitor is set between the positive and negative output of the rectifier. .

[0039] The wide range high sensitivity passive rectifier provided by the embodiment of the present invention is composed of M N1 、M N2 , D P1 and D P2 The circuit is based on the NMOS side feedback circuit and is used to clamp the gate voltage of the rectifier NMOS tube so that it does not increase with the increase of input power. It can effectively suppress the reverse leakage current to expand the dynamic range.

[0040] In some embodiments, at least one capacitor includes a first capacitor and a second capacitor; the input end of the first capacitor is connected to the differential signal input end 110, and the output end of the first capacitor is respectively connected to the input end of the second capacitor and the drain of the corresponding rectifier PMOS tube; the output end of the second capacitor is connected to the gate of the corresponding rectifier NMOS tube.

[0041] In this embodiment, in the traditional architecture, the coupling capacitor of the independent gate branch and the main coupling capacitor are directly connected to the input voltage; this embodiment optimizes the input coupling capacitor configuration and places the coupling capacitor of the independent gate branch after the main coupling capacitor, thereby reducing the impact on the rectifier input impedance while ensuring an independent regulation effect, thereby increasing the main input current with a smaller main coupling capacitor, thereby improving the rectification efficiency; in addition, the smaller main coupling capacitor greatly reduces the overall chip area.

[0042] Specifically, the first capacitor includes a first sub-capacitor and a second sub-capacitor, and the second capacitor includes a third sub-capacitor and a fourth capacitor; the first sub-capacitor is the same as the second sub-capacitor, and the third sub-capacitor is the same as the fourth capacitor; the input end of the first sub-capacitor is connected to the positive electrode of the differential signal input end 110, and the output end of the first sub-capacitor is respectively connected to the input end of the third sub-capacitor and the drain of the first rectifier PMOS tube; the output end of the third sub-capacitor is connected to the gate of the first rectifier NMOS tube; the input end of the second sub-capacitor is connected to the negative electrode of the differential signal input end 110, and the output end of the second sub-capacitor is respectively connected to the input end of the fourth sub-capacitor and the drain of the second rectifier PMOS tube; the output end of the fourth sub-capacitor is connected to the gate of the second rectifier NMOS tube.

[0043] exist Figure 2 In the embodiment shown, the first sub-capacitor is , the second sub-capacitor is , the third sub-capacitor is , the fourth sub-capacitor is ; V RF+ The output differential signal is After isolating the DC and passing the AC, we get the AC voltage signal. Input to M N1 The gate of the gate can realize independent regulation of the gate voltage. Similarly, V RF- The output differential signal is After isolating the DC and passing the AC, we get the AC voltage signal. Input to M N2 The gate of M N2 Independent regulation of gate pair voltage; in addition, as Figure 2 shown and The capacitor configuration position (realizing small area capacitor) can reduce the impact on the rectifier input impedance, thereby achieving high rectification efficiency with smaller capacitors and smaller chip area.

[0044] The wide-range high-sensitivity passive rectifier provided by the embodiment of the present invention can achieve high rectification efficiency and reduce chip occupation area by optimizing coupling capacitor configuration.

[0045] Furthermore, the target end is a bias voltage output end; the feedback bias circuit 130 also includes: a bias voltage generating module 132, the input end of the bias voltage generating module 132 is connected to the positive electrode of the rectifier output, and the output end is connected to the bias voltage output end; the bias voltage generating module 132 is used to control the substrate voltage of the feedback PMOS tube to increase by increasing the bias voltage when the input power of the rectifier circuit 120 is lower than the power threshold, so as to increase the gate voltage of multiple rectifier NMOS tubes; when the input power of the rectifier circuit 120 is higher than the power threshold, the substrate voltage of the feedback PMOS tube is controlled to decrease by reducing the bias voltage, so as to clamp the highest gate voltage of multiple rectifier NMOS tubes to a low voltage level.

[0046] In this embodiment, the input power of the rectifier circuit 120 is the product of the input voltage and the current; the power threshold can be set according to user requirements.

[0047] exist Figure 2 In the embodiment shown, the bias voltage generation module provides a variable substrate voltage for the feedback PMOS tube, and the input of the bias voltage generation module is the positive voltage of the rectifier output. ; (rectifier output negative voltage is expressed as ) The bias voltage generation module implements a voltage division mechanism based on MOS tubes and can output a bias voltage that decreases with the input power. ; The bias voltage output terminal is connected to the feedback PMOS tube substrate, so at low input power, Increase, enhance the rectifier NMOS tube gate voltage, thereby increasing the forward conduction current and rectification efficiency, and as the input power increases, The adaptive reduction and reverse leakage current are effectively suppressed, ensuring high rectification efficiency; therefore, the design of the dynamic bias voltage generation module can significantly improve the sensitivity while ensuring the rectification efficiency under high input power.

[0048] In this embodiment, the circuit that performs the rectification function is (NMOS tube) and (PMOS tube), the substrate ends are connected and ; Introduce an additional feedback bias circuit 130 on the rectifier NMOS tube side to limit Maximum gate voltage.

[0049] The wide-range high-sensitivity passive rectifier provided in the embodiment of the present invention can generate an additional negative voltage as the input of the bias voltage module by setting the bias voltage generating module 132, thereby adaptively generating a negative bias voltage, achieving a lower gate voltage, effectively suppressing reverse leakage current, and expanding the wide dynamic range under high impedance.

[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A wide range high sensitivity passive rectifier, characterized in that: include: A differential signal input terminal, wherein two electrodes of the differential signal input terminal are connected to at least one capacitor to obtain an AC voltage signal from the differential signal input to the differential signal input terminal; A rectifier circuit, the rectifier circuit comprising a plurality of rectifier NMOS tubes and a plurality of rectifier PMOS tubes; the substrates of the plurality of rectifier PMOS tubes are connected to the positive output electrode of the rectifier, and the substrates of the plurality of rectifier NMOS tubes are connected to the negative output electrode of the rectifier; the two poles of the differential signal input end are respectively connected to the gate of the corresponding rectifier NMOS tube through the at least one capacitor; the rectifier circuit is used to realize the conversion from AC voltage input to DC voltage output; wherein the number of the plurality of rectifier NMOS tubes is the same as the number of the plurality of rectifier PMOS tubes; A feedback bias circuit, the feedback bias circuit includes a feedback PMOS tube, the gate and drain of the feedback PMOS tube are respectively connected to the gates of the multiple rectifying NMOS tubes, and the substrate and source of the feedback PMOS tube are both connected to the target end; the feedback PMOS tube is used to control the highest gate voltage of the multiple rectifying NMOS tubes within a target voltage range; wherein the target end includes a bias voltage output end or a negative output electrode of the rectifier; the target voltage range is adjusted by the substrate voltage and PN junction conduction voltage of the feedback PMOS tube.

2. The wide range high sensitivity passive rectifier according to claim 1, characterized in that: The plurality of rectifying NMOS tubes include a first rectifying NMOS tube and a second rectifying NMOS tube; the plurality of rectifying PMOS tubes include a first rectifying PMOS tube and a second rectifying PMOS tube; The positive electrode of the differential signal input terminal is connected to the gate of the first rectifying NMOS tube through at least one capacitor; the negative electrode of the differential signal input terminal is connected to the gate of the second rectifying NMOS tube through at least one capacitor; The gate of the first rectifying NMOS tube and the gate of the second rectifying NMOS tube are both connected to the drain and gate of the feedback PMOS tube; The drain of the first rectifying NMOS tube is connected to the drain of the first rectifying PMOS tube; the drain of the second rectifying NMOS tube is connected to the drain of the second rectifying PMOS tube.

3. The wide range high sensitivity passive rectifier according to claim 1, characterized in that: The at least one capacitor includes a first capacitor and a second capacitor; The input end of the first capacitor is connected to the differential signal input end, the output end of the first capacitor is respectively connected to the input end of the second capacitor and the drain of the corresponding rectifier PMOS tube; the output end of the second capacitor is connected to the gate of the corresponding rectifier NMOS tube.

4. The wide range high sensitivity passive rectifier according to claim 3, characterized in that: The first capacitor includes a first sub-capacitor and a second sub-capacitor, and the second capacitor includes a third sub-capacitor and a fourth capacitor; the first sub-capacitor is the same as the second sub-capacitor, and the third sub-capacitor is the same as the fourth capacitor; The input end of the first sub-capacitor is connected to the positive electrode of the differential signal input end, the output end of the first sub-capacitor is connected to the input end of the third sub-capacitor and the drain of the first rectifier PMOS tube respectively; the output end of the third sub-capacitor is connected to the gate of the first rectifier NMOS tube; The input end of the second sub-capacitor is connected to the negative electrode of the differential signal input end, and the output end of the second sub-capacitor is respectively connected to the input end of the fourth sub-capacitor and the drain of the second rectifier PMOS tube; the output end of the fourth sub-capacitor is connected to the gate of the second rectifier NMOS tube.

5. The wide range high sensitivity passive rectifier according to claim 1, characterized in that: The target end is a bias voltage output end; The feedback bias circuit further includes: A bias voltage generating module, wherein the input end of the bias voltage generating module is connected to the positive output electrode of the rectifier, and the output end of the bias voltage generating module is connected to the bias voltage output end; The bias voltage generating module is used to control the substrate voltage of the feedback PMOS tube to increase by increasing the bias voltage when the input power of the rectifier circuit is lower than the power threshold, so as to increase the gate voltage of the multiple rectifier NMOS tubes; and to control the substrate voltage of the feedback PMOS tube to decrease by reducing the bias voltage when the input power of the rectifier circuit is higher than the power threshold, so as to clamp the highest gate voltage of the multiple rectifier NMOS tubes to a low voltage level.

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