Negative pressure source switching circuit and radio frequency switch chip

Abstract

The present invention relates to a negative voltage source switching circuit, including an enabling circuit, receiving an external positive power supply voltage VDD and a negative power supply voltage EXVSS, generating an enabling signal based on the negative power supply voltage EXVSS, when the negative power supply voltage EXVSS is invalid, the enabling signal is valid; when the negative power supply voltage EXVSS is valid, the enabling signal is invalid; a charge pump, based on a valid enabling signal, provides an internal negative voltage INVSS; a first transistor MS1 and a second transistor MS2, both including a control end, a first end and a second end; the first end of the first transistor MS1 is connected to the control end of the second transistor, and is used to receive the negative power supply voltage EXVSS; the first end of the second transistor is connected to the control end of the first transistor, and is used to receive the internal negative voltage INVSS; the second end of the first transistor is connected to the second end of the second transistor, and is used to output a negative working voltage VSS. The present invention also relates to a radio frequency switch chip.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency chips, and in particular to a negative pressure source switching circuit and a radio frequency switch chip. Background Art

[0002] In existing integrated circuit designs, some chips need to provide negative voltage power supply in addition to conventional positive voltage power supply. Taking RF switches as an example, their performance and linearity will be improved by negative voltage power supply. In order to simplify the application design of the chip, reduce the complexity of the peripheral circuit and the number of chip pads, it is usually chosen to generate negative voltage inside the chip.

[0003] However, the generation of negative voltage on chip usually relies on charge pump technology, but the driving capability of the charge pump is limited and it is difficult to meet the current demand of the circuit during fast switching. One of the problems is that when powered by the internal charge pump, the negative voltage jitter generated each time the RF switch is switched is large, and it takes a long time to return to a steady state. Therefore, the rapid switching of the RF switch will cause the internal charge pump to generate negative voltage ripple. To solve this problem, a common practice is to connect the negative voltage output port of the negative voltage power supply to the external pin of the chip and add a large capacitor to the pin. The capacitor is used for energy storage and filtering to reduce the negative voltage ripple caused by the pulse current during the switching process. However, this solution still has limitations in dealing with continuous fast switching, that is, as the switching frequency increases, the charge in the capacitor may be gradually discharged due to untimely replenishment, resulting in a decrease in the absolute value of the negative voltage.

[0004] It can be seen that the negative voltage power supply inside the chip cannot meet the driving requirements of the circuit when the RF switch is switched quickly, so it is necessary to switch to an external negative voltage power supply. The negative voltage provided by the outside can ensure sufficient driving capability. Therefore, the negative voltage power supply module needs to support two modes at the same time: one is to generate negative voltage through the internal charge pump, which is suitable for general application scenarios; the other is to use external negative voltage power supply to meet the needs of higher driving capability in special application scenarios.

[0005] However, the negative voltage power supply design in the prior art does not support such a flexible working mode. Summary of the invention

[0006] The purpose of the present invention is to provide a negative pressure source switching circuit and a radio frequency switch chip to solve the technical problem in the prior art that it is not convenient to realize the switching between internal negative pressure and external negative pressure inside the chip.

[0007] The first embodiment of the present invention discloses a negative pressure source switching circuit, comprising:

[0008] An enabling circuit, used for receiving an external positive power supply voltage and a negative power supply voltage, generating an enabling signal based on the negative power supply voltage, wherein when the negative power supply voltage is invalid, the enabling signal is valid; when the negative power supply voltage is valid, the enabling signal is invalid;

[0009] A charge pump, for providing an internal negative voltage based on the valid enable signal;

[0010] The first transistor and the second transistor each include a control end, a first end, and a second end; the first end of the first transistor is connected to the control end of the second transistor and is used to receive a negative power supply voltage; the first end of the second transistor is connected to the control end of the first transistor and is used to receive the internal negative voltage; the second end of the first transistor and the second end of the second transistor are connected to output a negative operating voltage.

[0011] According to the first embodiment of the present invention, the negative voltage source switching circuit also includes: a first switch connected between the output end of the charge pump and the ground; when the negative power supply voltage is invalid, the first switch is disconnected; when the negative power supply voltage is valid, the first switch pulls the output end of the charge pump to the ground.

[0012] According to the negative voltage source switching circuit of the first embodiment of the present invention, the first switch includes a third transistor, the third transistor includes a control end, a first end, and a second end, the control end of the third transistor is connected to the negative power supply voltage, the first end of the third transistor is grounded, and the second end of the third transistor is connected to the output end of the charge pump; the third transistor is a PMOS tube.

[0013] According to the negative pressure source switching circuit of the first embodiment of the present invention, the enabling circuit includes:

[0014] A first resistor and a second resistor are connected in series between the positive power supply voltage and the negative power supply voltage;

[0015] A signal shaper, wherein the input end of the signal shaper is connected to the node between the first resistor and the second resistor, the output end of the signal shaper is connected to the enable end of the charge pump, and the signal shaper converts the voltage of the node between the first resistor and the second resistor into a digital enable signal.

[0016] According to the negative voltage source switching circuit of the first embodiment of the present invention, the signal shaper is a buffer, an inverter or a Schmitt trigger.

[0017] According to the negative voltage source switching circuit of the first embodiment of the present invention, R1 / (R1+R2)*VDD+ R2 / (R1+R2)*EXVSS>0, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, VDD is the voltage value of the positive power supply voltage, and EXVSS is the voltage value of the negative power supply voltage.

[0018] According to the negative pressure source switching circuit of the first embodiment of the present invention, R1>R2.

[0019] According to the negative voltage source switching circuit of the first embodiment of the present invention, the enabling circuit is a first level conversion circuit.

[0020] According to the negative voltage source switching circuit of the first embodiment of the present invention, the first transistor and the second transistor are both NMOS transistors.

[0021] A second embodiment of the present invention discloses a radio frequency switch chip, comprising:

[0022] The negative voltage source switching circuit according to the first embodiment of the present invention provides the negative working voltage;

[0023] A second level conversion circuit receives the negative operating voltage and the first control signal, and outputs a second control signal;

[0024] The radio frequency switch receives the second control signal to control the opening and closing of the radio frequency switch.

[0025] Compared with the prior art, the main differences and effects of the embodiments of the present invention are:

[0026] The negative voltage source switching circuit of the present solution includes an enabling circuit, a charge pump, a first cross-coupled transistor and a second transistor. The enabling circuit is used to receive an external positive power supply voltage VDD and a negative power supply voltage EXVSS, and generate an enabling signal based on the negative power supply voltage.

[0027] When the negative power supply voltage is invalid, that is, when there is no external negative voltage, the negative power supply voltage is 0, and the enable signal output by the enable circuit is valid. The valid enable signal enables the charge pump, and the output end of the charge pump provides an internal negative voltage INVSS (the internal negative voltage INVSS is not 0). The negative power supply voltage and the internal negative voltage INVSS control the first transistor to turn off and the second transistor to turn on, so the internal negative voltage INVSS provided by the charge pump is used as the output negative working voltage VSS. At this time, the negative voltage source switching circuit is in the internal negative voltage working mode.

[0028] When the negative power supply voltage is valid, that is, when it is an external negative voltage, the negative power supply voltage is not 0, and the enable signal output by the enable circuit is invalid. The invalid enable signal will not enable the charge pump, and the charge pump does not provide the internal negative voltage INVSS (the internal negative voltage INVSS is 0). The negative power supply voltage and the internal negative voltage INVSS control the first transistor to turn on and the second transistor to turn off, so the external negative power supply voltage is used as the output negative working voltage VSS. At this time, the negative voltage source switching circuit is in the external negative voltage working mode.

[0029] The negative voltage source switching circuit may also include: a first switch MS3, connected between the output end of the charge pump and the ground GND; when the negative power supply voltage EXVSS is invalid, the first switch MS3 is disconnected; when the negative power supply voltage EXVSS is valid, the first switch MS3 will be connected to the output end of the charge pump and pulled to the ground GND, which can prevent the output from being suspended after the charge pump is turned off, avoid incomplete shutdown of the second transistor due to uncertain level of the internal negative voltage INVSS, isolate internal and external negative pressures, ensure that only one path of internal and external negative pressures can be selected, and prevent the external negative power supply voltage EXVSS from flowing back into the charge pump.

[0030] In the present invention, the positive power supply voltage VDD and the negative power supply voltage EXVSS received by the negative voltage source switching circuit not only provide the power supply voltage, but also can be used as the control signal of the first switch, the first transistor and the second transistor to control the closing and shutting down of the three to switch the working mode of internal negative voltage or external negative voltage. There is no need to set a special control signal to switch the working mode. The circuit is simple, low-cost, and saves chip ports, and the negative working voltage VSS does not need to be connected to the external pins of the chip.

[0031] In the internal negative voltage working mode, the cross-coupled first transistor is turned off, which can effectively prevent the negative power supply voltage EXVSS from leaking to the negative working voltage VSS; in the external negative voltage working mode, the cross-coupled second transistor is disconnected, which can effectively prevent the internal negative voltage INVSS from leaking to the negative working voltage VSS.

[0032] In the external negative voltage working mode, the charge pump is not enabled, which saves power consumption and avoids the ripple introduced into the power supply when the charge pump is working. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A circuit diagram of a negative pressure source switching circuit according to an embodiment of the present application is shown.

[0034] Figure 2 A circuit diagram of a negative pressure source switching circuit according to another embodiment of the present application is shown.

[0035] Figure 3A circuit diagram of a negative pressure source switching circuit according to yet another embodiment of the present application is shown.

[0036] Figure 4 A circuit diagram of a radio frequency switch chip according to an embodiment of the present application is shown.

[0037] Figure 5 A simulation effect diagram of a radio frequency switch chip according to an embodiment of the present application is shown.

[0038] Fig. 6A Show Figure 5 A partial enlarged view of .

[0039] Figure 6B Show Figure 5 Another partial enlargement of . DETAILED DESCRIPTION

[0040] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0041] Considering the technical problem that the prior art cannot conveniently implement the switching between internal negative pressure and external negative pressure inside the chip, the embodiment of the present invention discloses a negative pressure source switching circuit, which is located inside the chip and is used to provide a negative working voltage VSS to the device inside the chip (such as a radio frequency switch). Figure 1 As shown, the negative pressure source switching circuit includes:

[0042] The enabling circuit 101 is used to receive the positive power supply voltage VDD outside the chip and the external negative power supply voltage EXVSS, and generate an enabling signal based on the negative power supply voltage EXVSS. When the negative power supply voltage EXVSS is invalid, the enabling signal is valid; when the negative power supply voltage EXVSS is valid, the enabling signal is invalid; wherein the enabling circuit 101 is connected to the input port P1, and is used to receive the negative power supply voltage EXVSS outside the chip;

[0043] The charge pump 102 is used to provide an internal negative voltage INVSS based on a valid enable signal; when the enable signal is invalid, the charge pump 102 does not provide the negative voltage INVSS; wherein the voltage values ​​of the negative power supply voltage EXVSS and the internal negative voltage INVSS can be equal, and whether the negative power supply voltage EXVSS is used for power supply or the internal negative voltage INVSS is used, the voltage value of the negative working voltage VSS provided by the negative voltage source switching circuit is equal;

[0044] The latch includes a first transistor MS1 and a second transistor MS2, wherein the first transistor MS1 includes a control terminal p11, a first terminal p12, and a second terminal p13; the second transistor MS2 includes a control terminal p21, a first terminal p22, and a second terminal p23; the first terminal p12 of the first transistor MS1 is connected to the control terminal p21 of the second transistor, and is connected to the input port P1, for receiving a negative power supply voltage EXVSS; the first terminal p22 of the second transistor is connected to the control terminal p11 of the first transistor, and is connected to the output terminal of the charge pump 102, for receiving an internal negative voltage INVSS; the second terminal p13 of the first transistor is connected to the second terminal p23 of the second transistor, and is used to output a negative operating voltage VSS. The second terminal p13 of the first transistor and the second terminal p23 of the second transistor are respectively connected to the output terminal P2, and the output terminal P2 outputs a negative operating voltage VSS.

[0045] Among them, the negative power supply voltage EXVSS is invalid, which means that the input port P1 of the external negative voltage is grounded, and the voltage value of the negative power supply voltage EXVSS is 0; the negative power supply voltage EXVSS is valid, which means that the input port P1 of the external negative voltage has an external negative voltage as EXVSS input, and the voltage of the input port P1 is negative voltage; in some embodiments, the negative power supply voltage EXVSS can be controlled by an external control module. When the negative power supply voltage EXVSS is required as the negative working voltage VSS, the external control module controls the input port P1 to input the negative power supply voltage EXVSS; when the output of the internal charge pump is required as the negative working voltage VSS, the external control module controls the input port P1 to be grounded. The enable signal is valid, which means that the enable signal can enable the charge pump 102; the enable signal is invalid, which means that the enable signal cannot enable the charge pump 102.

[0046] In this embodiment, when the negative power supply voltage EXVSS is invalid, that is, the input port of the external negative voltage is grounded, at this time, the voltage of EXVSS is 0, and it cannot be used as the negative working voltage VSS output by the negative voltage source switching circuit, then the enabling circuit 101 generates a valid enabling signal. After receiving the valid enabling signal, the charge pump 102 is enabled and works normally to generate an internal negative voltage INVSS. At this time, EXVSS=GND=0, VGS=-INVSS (positive) between the control terminal p21 and the first terminal p22 of the second transistor MS2, and the second transistor MS2 is turned on; VGS=INVSS (negative) between the control terminal p11 and the first terminal p12 of the first transistor MS1, and the first transistor MS1 is turned off. Therefore, the internal negative voltage INVSS passes from the first terminal p22 of the second transistor MS2 to the second terminal p23, and the output negative working voltage VSS, that is, for example, the VSS input to the internal circuit of the RF switch chip comes from the internal negative voltage INVSS.

[0047] When the negative power supply voltage EXVSS is valid, that is, the voltage of the input port of the external negative voltage is negative, the external negative voltage is input as EXVSS, that is, the enable signal of the enable circuit 101 is invalid. The enable signal invalid here includes not generating any signal, or the generated signal is an invalid enable signal. The charge pump 102 does not work when it does not receive a signal, or receives an invalid enable signal, and does not generate an internal negative voltage INVSS. The voltage at the output end of the charge pump 102 is 0. VGS=-EXVSS (positive) between the control terminal p11 and the first terminal p12 of the first transistor MS1, and the first transistor MS1 is turned on; VGS=EXVSS (negative) between the control terminal p21 and the first terminal p22 of the second transistor MS2, and the second transistor MS2 is turned off. Therefore, the negative power supply voltage EXVSS passes from the first terminal p12 of the first transistor MS1 to the second terminal p13, and the output negative working voltage VSS, that is, for example, the VSS input to the internal circuit of the RF switch chip comes from the negative power supply voltage EXVSS.

[0048] In some embodiments, after the charge pump 102 is turned off, its output terminal may be suspended, which may cause the INVSS level to be uncertain and the second transistor cannot be completely turned off. To solve this problem, a first switch MS3 may be provided, and the first switch MS3 is connected between the output terminal of the charge pump 102 and the ground GND, and is used to pull the output terminal of the charge pump 102 to the 0 level after the charge pump 102 is turned off. When the negative power supply voltage EXVSS is valid, the first switch MS3 is turned on, and the output end of the charge pump 102 is pulled to the ground GND, so that the output end of the charge pump 102 obtains a certain 0 level, preventing the output of the charge pump 102 from being suspended after the charge pump 102 is turned off, and avoiding the incomplete shutdown of the second transistor due to the uncertainty of the internal negative voltage INVSS level. The internal and external negative voltages can be isolated to ensure that only one path of the internal and external negative voltages can be selected, and the external negative power supply voltage EXVSS is prevented from flowing back into the charge pump; when the negative power supply voltage EXVSS is invalid, the first switch MS3 is not turned on, and the first switch MS3 disconnects the output end of the charge pump 102 from the ground GND. At this time, the internal negative voltage INVSS will not be pulled to the ground GND, and the internal negative voltage INVSS output by the charge pump 102 passes from the first end p22 of the second transistor MS2 to the second end p23, thereby the negative working voltage VSS output by the output end P2.

[0049] According to the negative voltage source switching circuit of the embodiment of the present application, the first transistor MS1 and the second transistor MS2 can both be NMOS transistors. The control terminal p11 of the first transistor MS1 is a gate; the control terminal p21 of the second transistor MS2 is a gate. Figure 1In the figure, the first transistor and the second transistor are both illustrated by taking one NMOS tube as an example. In other embodiments, the first transistor and the second transistor can also be array transistors. For example, the first transistor includes a plurality of transistors connected with sources and drains, and the gates of the plurality of transistors are all connected to the output end of the charge pump; the second transistor includes a plurality of transistors connected with sources and drains, and the gates of the plurality of transistors are all connected to the negative power supply voltage EXVSS.

[0050] In the present application, both the first transistor and the second transistor are turned on when a positive voltage is formed between the control terminal and the first terminal.

[0051] According to the negative voltage source switching circuit of the embodiment of the present application, the first switch includes a third transistor MS3, the third transistor MS3 includes a control terminal p31, a first terminal p32 and a second terminal p33, the control terminal p31 of the third transistor MS3 is connected to the negative power supply voltage, the first terminal p32 of the third transistor MS3 is grounded, and the second terminal p33 of the third transistor MS3 is connected to the output terminal of the charge pump 102. When the control terminal p31 inputs a valid negative power supply voltage EXVSS, VGS=EXVSS is formed between the control terminal p31 and the first terminal p32, and the third transistor MS3 is turned on, that is, it is turned on between the internal negative voltage INVSS of its second terminal p33 and the ground GND of the first terminal p32, and the internal negative voltage INVSS is pulled to the ground GND. When the control terminal p31 does not input a valid negative power supply voltage EXVSS, that is, EXVSS=GND=0, the third transistor MS3 is turned off, and the internal negative voltage INVSS will not be grounded GND. In some embodiments, the third transistor MS3 can be a PMOS tube, which is turned on when a negative voltage is formed between the control terminal and the first terminal. Those skilled in the art can understand that the first switch tube is not limited to a transistor, but may also be any other switch structure capable of implementing its function, such as a MEMS (Micro-Electro-Mechanical System) switch.

[0052] In the present invention, the positive power supply voltage VDD and the negative power supply voltage EXVSS received by the negative voltage source switching circuit not only provide the power supply voltage, but also can be used as the control signal of the first switch, the first transistor and the second transistor, for controlling the closing and shutting down of the three to switch the working mode of internal negative voltage or external negative voltage. There is no need to set a special control signal to switch the working mode. Only the input port P1 of the negative power supply voltage EXVSS needs to be added, and there is no need to add the control port of the control signal. The input port P1 is used for negative voltage power supply and internal and external negative pressure selection at the same time. The circuit is simple, low cost, and saves chip ports, and the negative working voltage VSS does not need to be connected to the external pins of the chip.

[0053] According to the negative voltage source switching circuit of the embodiment of the present application, the enabling circuit includes a voltage dividing resistor and a signal shaper. Figure 2 As shown, the enabling circuit includes:

[0054] The first resistor R1 and the second resistor R2 are connected in series between the positive power supply voltage VDD and the negative power supply voltage EXVSS for voltage division. The voltage at the connection node between the first resistor R1 and the second resistor R2 is the divided voltage VS. The divided voltage VS can reflect whether the negative power supply voltage EXVSS is valid. The divided voltage VS is used to generate an enable signal.

[0055] The signal shaper 201 has an input terminal IN connected to a node between the first resistor R1 and the second resistor R2, where the voltage is VS. The output terminal OUT of the signal shaper 201 is connected to an enable terminal EN of the charge pump 102. The divided voltage at the node between the first resistor R1 and the second resistor R2 is an analog signal. The signal shaper 201 converts the analog signal into a digital enable signal to enable the charge pump 102.

[0056] In this embodiment, the external negative voltage, that is, the negative power supply voltage EXVSS and the positive voltage VDD are divided by the first resistor R1 and the second resistor R2 to form a voltage VS between the negative power supply voltage EXVSS and the positive voltage VDD. By configuring the appropriate resistance values ​​of R1 and R2, VS can be controlled to be a positive voltage, that is, VS=R1 / (R1+R2)*VDD+ R2 / (R1+R2)*EXVSS>0, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, VDD is the voltage value of the positive power supply voltage, and EXVSS is the voltage value of the negative power supply voltage. It can be achieved that when the negative power supply voltage EXVSS is invalid, VS is a high-level positive voltage, and when the negative power supply voltage EXVSS is valid, VS is a low-level positive voltage.

[0057] For example, the resistance ratio of R1 and R2 is R1:R2=1:1, VDD=2.5V, then when the voltage value of the external negative power supply voltage EXVSS=0V, the VS voltage is relatively high, i.e., 1.25V. Thus, the signal shaper 201 converts the input high level VS into a valid enable signal, and outputs it to the enable terminal EN of the charge pump 102, thereby controlling the charge pump 102 to work normally and provide the internal negative voltage INVSS. When the voltage value of the external negative power supply voltage EXVSS is a negative voltage, such as EXVSS=-2.5V, the VS voltage is relatively low, i.e., 0V. The signal shaper 201 converts the input low level VS into an invalid enable signal, and outputs it to the enable terminal EN of the charge pump 102, thereby controlling the charge pump 102 to shut down and not provide the internal negative voltage INVSS.

[0058] In this embodiment, a voltage divider resistor and a signal shaper are combined to generate a valid enable signal when the negative power supply voltage EXVSS is invalid, so as to control the normal operation of the internal charge pump. The circuit structure is simple, the reliability is higher, and no additional control signal and additional negative voltage need to be set.

[0059] In the embodiment of the present application, a valid enable signal is a standard digital quantity at a high level, and an invalid enable signal is a standard digital quantity at a low level. A standard digital quantity refers to a standard logic level that a target device or system can recognize, such as logic 0 and logic 1.

[0060] According to the negative voltage source switching circuit of the embodiment of the present application, the signal shaper 201 can be a buffer, a Schmitt trigger, or an inverter, and the buffer, the Schmitt trigger, and the inverter can convert the analog signal into a standard digital signal. Among them, the hysteresis characteristic of the Schmitt trigger can also prevent the external negative power supply voltage EXVSS from causing repeated jumps of the enable signal due to interference.

[0061] According to the negative voltage source switching circuit of the embodiment of the present application, the enabling circuit may further include a first level conversion circuit for realizing conversion between different levels. Figure 3 As shown, the enabling circuit 301 is a first level shift circuit (LevelShift), including four MOS tubes: MS4, MS5, MS6, MS7, and an inverter PA1. MS4, MS5, MS6 and MS7 are connected in series through two ends in sequence to form a loop. MS4, MS5, MS6 and MS7 all include a control end, a first end and a second end, and the control end of MS5 is connected to the second end of MS4 and the first end of MS7, the control end of MS4 is connected to the second end of MS5 and the first end of MS6, the first ends of MS4 and MS5 are connected to the positive voltage VDD, and the second ends of MS6 and MS7 are connected to the external constant negative voltage VSS'. The input end of PA1 is connected to the control end of MS6, and the output end of PA1 is connected to the control end of MS7; the ground and the external constant negative voltage VSS' form the power supply voltage of PA1. After PA1 is connected to the control end of MS6, it is connected to the external negative power supply voltage EXVSS. After the second end of MS4 is connected to the first end of MS7, the output end Out of the first level shift circuit is led out. L In some embodiments, the enabling circuit 301 may further include inverters PA2 and PA3, and further include inverters PA2 and PA3 at the output terminal Out of the first level conversion circuit. L Two inverters PA2 and PA3 connected in series are arranged between the charge pump 102 .

[0062] The first level conversion circuit converts the negative voltage of the negative power supply voltage EXVSS into a level signal between the external constant negative voltage VSS' and the positive voltage VDD. The positive voltage signal is then output through the output terminal Out of the first level conversion circuit.L Output, the positive voltage signal changes with the negative power supply voltage EXVSS, when the negative power supply voltage EXVSS is valid, the level signal is a first voltage value, when the negative power supply voltage EXVSS is invalid, the level signal is a second voltage value, in some embodiments, one of the first voltage value or the second voltage value may be VSS'. In order to facilitate enabling the charge pump 102, the level signal may also be converted by inverters PA2 and PA3 into an enable signal with a voltage between 0V and VDD to obtain a standard digital signal for enabling the charge pump 102. When the enabling circuit 301 is a first level conversion circuit, the extra power consumption caused by the resistor voltage divider structure may be avoided.

[0063] The embodiment of the present application also discloses a radio frequency switch chip, such as Figure 4 As shown, including:

[0064] According to the negative voltage source switching circuit 401 of the embodiment of the present application, a negative working voltage VSS is provided, and the negative working voltage VSS is used to provide a negative voltage to the RF switch 402;

[0065] The second level conversion circuit 403 is used to realize conversion between different levels, is connected to the output end of the negative voltage source switching circuit 401, receives the negative working voltage VSS and the first control signal, and outputs the second control signal, wherein the first control signal is used to control whether the second control signal outputs a positive voltage or a negative voltage; in some embodiments, the second level conversion circuit 403 also receives a positive voltage VDD (positive power supply voltage), the voltage range of the first control signal may be 0V~2.5V, and the voltage range of the second control signal may be -2.5V~2.5V;

[0066] The RF switch 402 is connected to the output end of the second level conversion circuit 403 and receives the second control signal to control the opening and closing of the RF switch. Figure 4 In the description, the MOS transistor MS8 is taken as an example, and the gate of the RF switch 402 can receive the second control signal.

[0067] In the present invention, the negative pressure source switching circuit can quickly switch the working mode of internal negative pressure or external negative pressure, and provide a negative working voltage VSS to the radio frequency switch, without setting a special control signal to switch the working mode, the circuit is simple, the cost is low, and the chip port is saved, and the negative working voltage VSS does not need to be connected to the external pin of the chip. In other embodiments, the negative pressure source switching circuit can also provide internal negative pressure or external negative pressure to other circuits.

[0068] In the internal negative voltage working mode, the cross-coupled first transistor is turned off, which can effectively prevent the negative power supply voltage EXVSS from leaking to the negative working voltage VSS; in the external negative voltage working mode, the cross-coupled second transistor is disconnected, which can effectively prevent the internal negative voltage INVSS from leaking to the negative working voltage VSS.

[0069] In the external negative voltage working mode, the charge pump is not enabled, which saves power consumption and avoids the ripple introduced into the power supply when the charge pump is working.

[0070] Figure 5 A simulation effect diagram of a radio frequency switch chip according to an embodiment of the present application is shown. Figure 5 The horizontal axis in the middle represents time (ms), and the vertical axis represents voltage V (volts). This simulation simulates the process of the RF switch receiving the negative working voltage VSS and switching the negative voltage source using the negative voltage source switching circuit during the disconnection process. The solid line above represents the voltage value of the negative working voltage VSS during this period, and the dotted line below represents the voltage value of the negative power supply voltage EXVSS during this period. Figure 5 It is shown in the figure that during the period of 0.0 to 1.6ms, the voltage value of the negative power supply voltage EXVSS is 0, that is, there is no negative voltage outside, and the internal negative voltage is used. In other words, Figure 1 The negative working voltage VSS in the circuit uses the voltage output by the charge pump; during this period, the negative voltage jitter generated by the negative working voltage VSS is large each time the RF switch is switched, and it takes a long time to return to a steady state. For example, in Figure 5 The circle a shows the negative voltage jitter generated by the negative working voltage VSS when the RF switch is switched. Fig. 6A An enlarged view of the negative voltage jitter is shown. When the RF switch does not require fast switching, the internal negative voltage can be used to save power consumption.

[0071] like Figure 5 As shown, then at 1.6ms, the negative voltage source switching circuit switches the negative voltage source. During 1.6-2.8ms, an external negative voltage is used, that is, Figure 1 The negative working voltage VSS in the circuit adopts the external negative power supply voltage EXVSS, and the voltage value of the negative power supply voltage EXVSS is -2.5V. When the internal negative voltage is turned off, the voltage fluctuation amplitude caused by each switch switching is significantly reduced, and due to the strong external negative voltage driving ability, its recovery speed is also faster. For example, in Figure 5 The circle b shows the negative voltage jitter generated by the negative working voltage VSS when the RF switch is switched. Figure 6B An enlarged view of the negative pressure vibration is shown.

[0072] Therefore, the mode can be selected according to the switching speed requirement of the RF switch. When the RF switch needs to switch quickly, an effective external negative power supply voltage can be connected. When the switching speed requirement of the RF switch is not high, or the external negative power supply voltage is not available, the internal negative charge pump is switched to use.

[0073] It is to be understood that the specific embodiments described herein are only for explaining the present application, rather than limiting the present application. In addition, for ease of description, only some but not all structures or processes related to the present application are shown in the accompanying drawings. It should be noted that in this specification, similar reference numerals and letters represent similar items in the accompanying drawings.

[0074] It should be understood that although the terms "first", "second", etc. may be used herein to describe various features, these features should not be limited by these terms. These terms are used only to distinguish and should not be understood as indicating or implying relative importance. For example, a first feature may be referred to as a second feature, and similarly a second feature may be referred to as a first feature without departing from the scope of the exemplary embodiments.

[0075] In the description of this application, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this embodiment can be understood according to specific circumstances.

[0076] Illustrative embodiments of the present application include, but are not limited to, a negative pressure source switching circuit and a radio frequency switch chip.

[0077] The various aspects of the illustrative embodiments will be described using terms commonly used by those skilled in the art to convey the essence of their work to other persons skilled in the art. However, it is apparent to those skilled in the art that some alternative embodiments may be implemented using the features described in part. For purposes of explanation, specific numbers and configurations are set forth to provide a more thorough understanding of the illustrative embodiments. However, it is apparent to those skilled in the art that alternative embodiments may be implemented without the specific details. In some other cases, some well-known features are omitted or simplified herein to avoid obscuring the illustrative embodiments of the present application.

[0078] In addition, various operations will be described as multiple separate operations in a manner that is most helpful for understanding the illustrative embodiments; however, the order of description should not be interpreted as implying that these operations must rely on the order of description, and many of the operations can be implemented in parallel, concurrently, or simultaneously. In addition, the order of the operations can also be rearranged. When the described operations are completed, the process can be terminated, but can also have additional steps not included in the drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0079] References in the specification to "one embodiment," "an embodiment," "an illustrative embodiment," etc., indicate that the described embodiment may include a particular feature, structure, or property, but each embodiment may or may not necessarily include the particular feature, structure, or property. Moreover, these phrases are not necessarily referring to the same embodiment. In addition, when particular features are described in conjunction with a specific embodiment, the knowledge of those skilled in the art can affect the combination of these features with other embodiments, whether or not these embodiments are explicitly described.

[0080] Unless the context dictates otherwise, the terms "comprising," "having," and "including" are synonymous. The phrase "A and / or B" means "(A), (B), or (A and B)."

[0081] As used herein, the term "module" may refer to, be a part of, or include: a memory (shared, dedicated, or group) for running one or more software or firmware programs, an application-specific integrated circuit (ASIC), an electronic circuit and / or processor (shared, dedicated, or group), a combinational logic circuit, and / or other suitable components that provide the described functionality.

[0082] In the accompanying drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order is not necessary. Instead, in some embodiments, these features may be described in a manner and / or order different from that shown in the illustrative drawings. In addition, the structural or method features included in a specific figure do not mean that all embodiments need to include such features. In some embodiments, these features may not be included or may be combined with other features.

[0083] In some cases, the disclosed embodiments may be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments may also be implemented in the form of instructions or programs carried or stored on one or more transient or non-transient machine-readable (e.g., computer-readable) storage media, which may be read and executed by one or more processors, etc. When the instructions or programs are executed by a machine, the machine may perform the various methods described above. For example, the instructions may be distributed via a network or other computer-readable medium. Therefore, machine-readable media may include, but are not limited to, any mechanism for storing or transmitting information in a machine (e.g., computer) readable form, such as floppy disks, optical disks, compact disk read-only memories (CD-ROMs), magneto-optical disks, read-only memories (ROMs), random access memories (RAMs), erasable programmable read-only memories (EPROMs), electronically erasable programmable read-only memories (EEPROMs), magnetic or optical cards, or flash memory or tangible machine-readable memories for transmitting network information via electrical, optical, acoustic, or other forms of signals (e.g., carrier waves, infrared signals, digital signals, etc.). Therefore, machine-readable media include any form of machine-readable media suitable for storing or transmitting electronic instructions or machine (e.g., computer) readable information.

[0084] The embodiments of the present application are described in detail above in conjunction with the accompanying drawings, but the use of the technical solution of the present application is not limited to the various applications mentioned in the embodiments of the present application. Various structures and modifications can be easily implemented with reference to the technical solution of the present application to achieve the various beneficial effects mentioned herein. Various changes made within the knowledge of ordinary technicians in the field without departing from the purpose of the present application should all fall within the scope of the patent coverage of the present application.

Claims

1. A negative pressure source switching circuit, characterized in that: include: An enabling circuit, configured to receive an external positive power supply voltage and a negative power supply voltage, and to generate an enabling signal based on the negative power supply voltage, wherein the enabling signal is valid when the negative power supply voltage is invalid; When the negative power supply voltage is valid, the enable signal is invalid; A charge pump for providing an internal negative voltage based on the valid enable signal; The first transistor and the second transistor each include a control terminal, a first terminal, and a second terminal; the first terminal of the first transistor is connected to the control terminal of the second transistor and is used to receive a negative power supply voltage; the first terminal of the second transistor is connected to the control terminal of the first transistor and is used to receive the internal negative voltage; the second terminal of the first transistor is connected to the second terminal of the second transistor and is used to output a negative working voltage; A first switch connected between an output terminal of the charge pump and ground; When the negative power supply voltage is invalid, the first switch is disconnected; The first switch pulls the output of the charge pump to ground when the negative supply voltage is active.

2. The negative pressure source switching circuit according to claim 1, characterized in that: The first switch includes a third transistor, which includes a control end, a first end, and a second end. The control end of the third transistor is connected to the negative power supply voltage, the first end of the third transistor is grounded, and the second end of the third transistor is connected to the output end of the charge pump; the third transistor is a PMOS tube.

3. The negative pressure source switching circuit according to claim 1, characterized in that: The enabling circuit comprises: A first resistor and a second resistor are connected in series between the positive power supply voltage and the negative power supply voltage; A signal shaper, wherein the input end of the signal shaper is connected to the node between the first resistor and the second resistor, the output end of the signal shaper is connected to the enable end of the charge pump, and the signal shaper converts the voltage of the node between the first resistor and the second resistor into a digital enable signal.

4. The negative pressure source switching circuit according to claim 3, characterized in that: The signal shaper is a buffer, an inverter or a Schmitt trigger.

5. The negative pressure source switching circuit according to claim 4, characterized in that: R1 / (R1+R2)*VDD+ R2 / (R1+R2)*EXVSS>0, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, VDD is the voltage value of the positive power supply voltage, and EXVSS is the voltage value of the negative power supply voltage.

6. The negative pressure source switching circuit according to claim 5, characterized in that: R1>R2.

7. The negative pressure source switching circuit according to claim 1, characterized in that: The enabling circuit is a first level conversion circuit.

8. The negative pressure source switching circuit according to claim 1, characterized in that: The first transistor and the second transistor are both NMOS transistors.

9. A radio frequency switch chip, characterized in that: include: The negative pressure source switching circuit according to any one of claims 1 to 8, providing the negative operating voltage; A second level conversion circuit receives the negative operating voltage and the first control signal, and outputs a second control signal; The radio frequency switch receives the second control signal to control the opening and closing of the radio frequency switch.

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