Sawtooth wave generator for voltage mode DC-DC

Abstract

The invention relates to the technical field of integrated circuits, and discloses a sawtooth wave generator for voltage mode DC-DC, which comprises a current mirror, the input end of the current mirror is connected with a reference current generation module, the output end of the current mirror is connected with one end of an energy storage capacitor C4 through a controllable switch, and the other end of the energy storage capacitor C4 is grounded. The controllable end of the controllable switch is connected with the pulse generator, the reference current generation module generates a reference current source by using a switched capacitor technology, 1: M-time copying is performed on the reference current source through a current mirror, the output current is used for charging the energy storage capacitor C4, and under the control of the pulse generator, the controllable switch is repeatedly switched on and off according to a set frequency, so that the pulse generator is switched off. And the energy storage capacitor C4 is controlled to be repeatedly charged to a set voltage and then rapidly discharged to zero, so that sawtooth waves are generated.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, in particular to a sawtooth wave generator for voltage-mode DC-DC. Background Art

[0002] DC / DC switching power supply is a DC to DC converter. It uses modern electronic technology to control the on and off time ratio of the switch tube to maintain the output voltage of the power supply. Its technical core is composed of pulse width modulation (PWM) module and MOSFET. It has the characteristics of small size, high conversion efficiency and light weight. It is widely used in almost all electronic equipment such as electronics, communications, electrical, energy, aerospace, and household appliances. It is an indispensable power supply method for the rapid development of today's electronics industry.

[0003] The core of the PWM module in the DC / DC switching power supply is the sawtooth oscillator. Its performance affects the characteristics of the switching power supply. Therefore, the requirements for the sawtooth oscillator are relatively high. It is necessary to generate a stable output signal when the power supply voltage, temperature, etc. change or drift.

[0004] The existing sawtooth wave generator technology has the following problems:

[0005] (1) In the sawtooth wave generator shown in FIG6(a), the reference current and comparator delay vary greatly with PVT, which can cause a large deviation in the output frequency of the sawtooth wave oscillator. The capacitor / current needs to be calibrated carefully to obtain the desired target frequency sawtooth wave.

[0006] (2) In the sawtooth wave generator shown in FIG6(b), although the frequency of the sawtooth wave can be precisely controlled without calibration, the swing of the generated sawtooth wave is seriously affected by PVT. Under normal processes, the deviation of capacitors and resistors is 20%-30%, which will cause the maximum and minimum swings of the sawtooth wave to differ by more than twice. Too large a swing / distortion will cause the lower-level comparator to malfunction, especially when the DC-DC output duty cycle is large. Too small a swing will make the signal more susceptible to interference, reduce the duty cycle accuracy of the output signal, and easily cause large errors in the power supply output. Summary of the invention

[0007] The present invention provides a sawtooth wave generator for voltage-mode DC-DC, which can adapt to changes in process angle (P-process), power supply voltage (V-Voltage) and temperature (T-Temperature) without additional post-calibration, fundamentally reducing the complexity of chip design and the complexity of post-shipment test calibration, and providing a high-reliability frequency source for DC-DC.

[0008] The present invention can be achieved through the following technical solutions:

[0009] A sawtooth wave generator for voltage mode DC-DC includes a current mirror, wherein the input end of the current mirror is connected to a reference current generating module, the output end is connected to one end of an energy storage capacitor C4 through a controllable switch, the other end of the energy storage capacitor is grounded, the controllable end of the controllable switch is connected to a pulse generator, and the reference current generating module generates a reference current source using a switch capacitor technology.

[0010] The reference current source is replicated 1:M times through a current mirror, and its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch is repeatedly switched at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to a set voltage and then quickly discharged to zero, thereby generating a sawtooth wave.

[0011] Furthermore, the capacitance ratio of the energy storage capacitor C3 and the energy storage capacitor C4 used in the reference current generating module is the same as the current replication ratio of the current mirror.

[0012] Furthermore, the reference current generating module uses an inverter as a control medium, and under the control of a clock unit, repeatedly charges and discharges the energy storage capacitor C3, thereby generating a dynamic reference current source.

[0013] Furthermore, the reference current generating module comprises an inverter, the input end of the inverter is connected to the clock unit, the output end is connected to the energy storage capacitor C3, and the power supply end is connected to the input end of the current mirror.

[0014] Furthermore, the controllable switch is set to a field effect transistor MN1, the gate of the field effect transistor MN1 is connected to the output end of the pulse generator, the source thereof is grounded, the drain thereof is connected to one end of the energy storage capacitor C4, and is also connected to the output end of the current mirror, the other end of the energy storage capacitor C4 is grounded, and the input end of the pulse generator is connected to the clock unit.

[0015] Further, the current mirror includes a field effect transistor MP1, the gate of the field effect transistor MP1 is connected to the gate of the field effect transistor MP2, the source of the field effect transistor MP1 and the source of the field effect transistor MP2 are commonly connected to the power supply VDD, the drain of the field effect transistor MP1 is connected to the power supply end of the inverter, and is also connected to the connection line between the gate of the field effect transistor MP1 and the gate of the field effect transistor MP2, and the drain of the field effect transistor MP2 is connected to the drain of the field effect transistor MN1.

[0016] Furthermore, a voltage stabilizing capacitor C1 is connected between the gate and source of the field effect transistor MP1, and is connected to the gate of the field effect transistor MP2 via an RC filter circuit.

[0017] Furthermore, the field effect transistor MP1 and the field effect transistor MP2 are P-channel field effect transistors, and the field effect transistor MN1 is an N-channel field effect transistor.

[0018] The beneficial technical effects of the present invention are:

[0019] By using the switched capacitor technology to obtain a reference current source, the frequency and amplitude of the sawtooth wave can be accurately controlled by charging the capacitor with this current. The frequency is determined by the frequency of the pulse generator. According to the formula U C4,MAX =U C3,MAX =VDD-V GS,MP1 The swing is determined by the power supply voltage VDD and the voltage V of the field effect transistor MP1. GS It is determined by the voltage, which has nothing to do with the capacitance and resistance, so it can be accurately controlled, and the output range of the front stage sawtooth generator in the DC-DC power supply is VDD-V gs,mp1 , and the common-mode input range of the subsequent comparator is also VDD-V gs,mp1 , when PVT changes, V gs,mp1 The frequency response of the chip will change, but no matter how it changes, the input and output ranges of the front and rear stages are always matched. Therefore, it can adapt to the changes in PVT without additional calibration, which fundamentally reduces the design complexity of the chip and the test and calibration steps for later shipments, providing a highly reliable frequency source for DC-DC. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Schematic diagram of the circuit structure of the sawtooth generator of the present invention;

[0021] Figure 2 For the present invention Figure 1 Schematic diagram of voltage change curve corresponding to each node;

[0022] FIG3( a ) is a schematic diagram of a sawtooth waveform generated by the sawtooth wave generator of the present invention at the same temperature (40° C.), voltage (2.4 V), and different process angles;

[0023] FIG3( b ) is a schematic diagram of sawtooth waveforms generated by the sawtooth wave generator of the present invention at different temperatures under the same process angle (tt) and voltage (2.4 V);

[0024] FIG3( c ) is a schematic diagram of a sawtooth waveform generated by the sawtooth wave generator of the present invention at the same process angle (tt), temperature (40° C.), and different voltages;

[0025] FIG4( a ) shows the waveforms generated by the sawtooth wave generator of the present invention at the same temperature (40° C.), voltage (2.4 V), and different process angles and the common mode input range of the comparator;

[0026] FIG4( b ) shows waveforms generated by the sawtooth wave generator of the present invention at different temperatures under the same process angle (tt) and voltage (2.4 V) and the common mode input range of the comparator;

[0027] FIG4(c) shows waveforms generated by the sawtooth wave generator of the present invention at the same process angle (tt) and temperature (40° C.) and different voltages and the common mode input range of the comparator;

[0028] Figure 5 The sawtooth wave generator of the present invention is used in a DC-DC power supply, and its corresponding common mode input range simulation circuit of the subsequent comparator;

[0029] Figure 6 (a) and Figure 6 (b) are schematic diagrams of the distribution of inductance magnetic lines of force of the DCDC circuit in the prior art. DETAILED DESCRIPTION

[0030] The specific implementation of the present invention is described in detail below with reference to the accompanying drawings and preferred embodiments.

[0031] like Figure 1 and 2 As shown, the present invention provides a sawtooth wave generator for voltage mode DC-DC, which includes a current mirror, the input end of the current mirror is connected to a reference current generating module, the output end is connected to one end of an energy storage capacitor C4 through a controllable switch, the other end of the energy storage capacitor is grounded, the controllable end of the controllable switch is connected to a pulse generator, the reference current generating module generates a dynamic reference current source using a switch capacitor technology, the reference current source is replicated 1:M times through a current mirror, and its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch is repeatedly switched at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to a set voltage and then quickly discharged to zero, thereby generating a sawtooth wave.

[0032] In this way, on the basis of the traditional sawtooth wave generator, the switching capacitor technology is used to obtain a reference current source that is adaptive to PVT changes. After being copied by the current mirror, this current is used to repeatedly charge and discharge the energy storage capacitor C4 to generate a sawtooth wave, and a sawtooth wave generator with optimal swing amplitude is systematically realized, thereby reducing the complexity of the early design of the chip and saving the cost of later testing and calibration.

[0033] The details are as follows:

[0034] The current mirror includes a field effect transistor MP1, a gate of the field effect transistor MP1 is connected to a gate of the field effect transistor MP2, a source of the field effect transistor MP1 and a source of the field effect transistor MP2 are commonly connected to a power supply VDD, a drain of the field effect transistor MP1 is connected to a power supply terminal of an inverter, and is also connected to a connection line between the gate of the field effect transistor MP1 and the gate of the field effect transistor MP2, a drain of the field effect transistor MP2 is connected to a drain of the field effect transistor MN1, wherein the field effect transistors MP1 and MP2 are P-channel field effect transistors, and the field effect transistor MN1 is an N-channel field effect transistor.

[0035] In order to stabilize the V GS Voltage, we connect a voltage-stabilizing capacitor C1 between the gate and source of the field effect transistor MP1, which is also connected to the gate of the field effect transistor MP2 through an RC filter circuit. The resistor R1 of the RC filter circuit is connected between the gate of the field effect transistor MP1 and the gate of the field effect transistor MP2, and the capacitor C2 is connected between the gate and source of the field effect transistor MP2.

[0036] The reference current generating module comprises an inverter, the input end of the inverter is connected to the clock unit, the output end is connected to the energy storage capacitor C3, and the power supply end is connected to the input end of the current mirror, that is, the inverter is used as a control medium, and under the control of the clock unit, the energy storage capacitor C3 is repeatedly charged and discharged to construct a switching capacitor, thereby generating a dynamic reference current source.

[0037] The controllable switch can be set as a field effect tube MN1, the gate of the field effect tube MN1 is connected to the output end of the pulse generator, the source is grounded, the drain is connected to one end of the energy storage capacitor C4, and is also connected to the output end of the current mirror. The other end of the energy storage capacitor C4 is grounded, and the input end of the pulse generator is connected to the clock unit. As the field effect tube MN1 is turned on, the energy storage capacitor C4 forms a loop with the ground through the field effect tube MN1, so that the energy of the energy storage capacitor C4 can be quickly discharged, corresponding to the falling edge of the sawtooth wave; during the period when the field effect tube MN1 is turned off, the output current copied by the current mirror will continue to charge the energy storage capacitor C4, so that the voltage across the energy storage capacitor C4 increases linearly until the field effect tube MN1 is turned on, corresponding to the rising edge of the sawtooth wave, and its charging time can be determined by the working frequency of the pulse generator. Under the control of the pulse generator, the field effect tube MN1 will be turned on / off according to the set frequency, and the above process will be repeated, thereby outputting a sawtooth wave.

[0038] In summary, if Figure 1 As shown, the present invention is based on ① using an inverter to repeatedly charge and discharge the energy storage capacitor C3 to construct a switching capacitor to generate an "adaptive PVT" current source, and ② using a voltage stabilizing capacitor C1 to stabilize the V of the field effect transistor MP1. GSThe voltage passes through the low-pass filter network composed of R1 and C2. ③ The field effect tube MP2 copies the current of the field effect tube MP1 at a ratio of 1:M and uses this current to charge the energy storage capacitor C4. ④ The field effect tube MN1 is controlled by the voltage of the pulse generator and releases the charge accumulated on the energy storage capacitor C4 to the ground every cycle. The energy storage capacitor C3 and the energy storage capacitor C4 are matched at a ratio of 1:N.

[0039] The basic principle of the sawtooth wave generator of the present invention is as follows:

[0040] (A) The generation mechanism of the current source of "Adaptive PVT" is: using the inverter as the medium to charge the energy storage capacitor C3, Figure 1 The maximum voltage of node ① is U C3,MAX =VDD-V GS,MP1 , a switched capacitor reference current generation module based on an inverter is constructed to generate a dynamic reference current I INV The calculation formula is as follows:

[0041] I INV =C3*U C3,MAX *F CLK

[0042] Among them, F CLK is the operating frequency of the input clock unit CLK.

[0043] (B) Field effect transistor MP2 replicates the current of field effect transistor MP1 at a ratio of 1:M. The current of field effect transistor MP2, i.e. the output current of the current mirror, is

[0044] I MP2 =M*I MP1 =M*I INV =M*C3*U C3,MAX *F CLK

[0045] (C) Field effect transistor IMP2 charges energy storage capacitor C4, and the maximum voltage of energy storage capacitor C4 is

[0046]

[0047] Assume M = N, then U C4,MAX =U C3,MAX =VDD-V GS,MP1 , so that the sawtooth wave swing generated by the sawtooth wave generator of the present invention changes and the common mode input range (VDD-V gs,mp1 ) and can adapt to changes in PVT without additional calibration, fundamentally reducing the design complexity of the chip and the steps of test and calibration in later shipments, providing a high-reliability frequency source for DC-DC.

[0048] (D) Figure 1 The waveforms of nodes ① to ⑥ are as follows: Figure 2 As shown, in the simulation, VDD = 2.4V, ④ is a square wave signal of 0-VDD, and the frequency is the operating frequency of the DC-DC (1.8MHz in the simulation). In actual design, the clock input to the inverter can be K times the operating frequency. A higher frequency clock is beneficial to reducing the area overhead of the subsequent RC filter.

[0049] The high level of node ① will follow the change of node ②. After RC filtering, node ③ is obtained, and its voltage is almost stable, which is VDD-VGS≈1.7V (simulation value); node ⑤ generates a high level pulse on the falling edge of each cycle clock; node ⑥ is a sawtooth waveform, and its voltage returns to 0 after each high level pulse, and charging starts again. The maximum value of the sawtooth wave voltage is also VDD-VGS≈1.7V (simulation value), which automatically adapts to the voltage input range of the subsequent comparator circuit.

[0050] When the PVT changes, the sawtooth wave waveform generated by the sawtooth wave generator of the present invention is as follows: Figure 3(a)-Figure 3(c) As shown. When the process angle changes, V GS,ss >V GS,tt >V GS,ff , then the maximum value of the sawtooth wave U C4,MAX_ss C4,MAX_tt C4,MAX_ff ; When the temperature changes, V GS,-40℃ >V GS,40℃ >V GS,125℃ , then the maximum value of the sawtooth wave U C4,MAX_-40℃ C4,MAX_40℃ C4,MAX_-125℃ ; When the power supply voltage VDD changes, it can be found that VDD-U C4,MAX_2V ≈VDD-U C4,MAX_2.4V ≈VDD-U C4,MAX_2.8V In summary, this change in the maximum value of the sawtooth wave just adapts to the PVT change of the input range of the subsequent comparator. Figure 4(a)-Figure 4(c) .

[0051] Figure 4(a)-Figure 4(c) The right side shows the common mode input range simulation of the subsequent comparator under the corresponding conditions. The subsequent comparator is connected in the form of a unit gain buffer. Figure 5 ​​​​As shown, when the input terminal Vin changes, if the output terminal Vout can follow the change of the input, it means that the input terminal Vin is within the common mode input range Vcm of the subsequent comparator, which is the straight line section of the curve in Figure 4. When the input terminal Vin gradually increases, the output terminal Vout can no longer follow the change of the input terminal Vin, and its output voltage curve bends. The inflection point of the curve is the maximum input range of the comparator. It can be found that when PVT changes, the maximum value of the sawtooth wave is always exactly equal to the maximum input range of the subsequent comparator, so this circuit can adapt to the change of PVT and can always generate a sawtooth wave signal that is optimal for the circuit.

[0052] The present invention utilizes the high matching between capacitors and establishes a method of strong correlation between charging current and charging capacitance, thereby solving technical problems such as mismatch caused by capacitor and resistor decoupling in traditional sawtooth wave generators and reducing subsequent testing and calibration costs.

[0053] Although specific embodiments of the present invention are described above, those skilled in the art should understand that these are merely examples and that various changes or modifications may be made to these embodiments without departing from the principles and essence of the present invention. Therefore, the scope of protection of the present invention is limited by the appended claims.

Claims

1. A sawtooth wave generator for voltage mode DC-DC, characterized in that: It includes a current mirror, the input end of the current mirror is connected to a reference current generating module, the output end is connected to one end of an energy storage capacitor C4 through a controllable switch, the other end of the energy storage capacitor is grounded, the controllable end of the controllable switch is connected to a pulse generator, and the reference current generating module generates a reference current source using a switch capacitor technology. The reference current source is replicated 1:M times through a current mirror, and its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch is repeatedly switched at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to a set voltage and then quickly discharged to zero, thereby generating a sawtooth wave.

2. The sawtooth wave generator for voltage mode DC-DC according to claim 1, characterized in that: The capacitance ratio of the energy storage capacitor C3 and the energy storage capacitor C4 used in the reference current generating module is the same as the current replication ratio of the current mirror.

3. The sawtooth wave generator for voltage mode DC-DC according to claim 1, characterized in that: The reference current generating module uses an inverter as a control medium and, under the control of a clock unit, repeatedly charges and discharges the energy storage capacitor C3, thereby generating a dynamic reference current source.

4. The sawtooth wave generator for voltage mode DC-DC according to claim 3, characterized in that: The reference current generating module comprises an inverter, the input end of the inverter is connected to the clock unit, the output end is connected to the energy storage capacitor C3, and the power supply end is connected to the input end of the current mirror.

5. The sawtooth wave generator for voltage mode DC-DC according to claim 4, characterized in that: The controllable switch is set as a field effect transistor MN1, the gate of the field effect transistor MN1 is connected to the output end of the pulse generator, the source thereof is grounded, the drain thereof is connected to one end of the energy storage capacitor C4, and is also connected to the output end of the current mirror, the other end of the energy storage capacitor C4 is grounded, and the input end of the pulse generator is connected to the clock unit.

6. The sawtooth wave generator for voltage mode DC-DC according to claim 5, characterized in that: The current mirror includes a field effect transistor MP1, the gate of the field effect transistor MP1 is connected to the gate of the field effect transistor MP2, the source of the field effect transistor MP1 and the source of the field effect transistor MP2 are commonly connected to the power supply VDD, the drain of the field effect transistor MP1 is connected to the power supply end of the inverter, and is also connected to the connection line between the gate of the field effect transistor MP1 and the gate of the field effect transistor MP2, and the drain of the field effect transistor MP2 is connected to the drain of the field effect transistor MN1.

7. The sawtooth wave generator for voltage mode DC-DC according to claim 6, characterized in that: A voltage stabilizing capacitor C1 is connected between the gate and source of the field effect transistor MP1, and is also connected to the gate of the field effect transistor MP2 via an RC filter circuit.

8. The sawtooth wave generator for voltage mode DC-DC according to claim 6, characterized in that: The field effect transistors MP1 and MP2 are P-channel field effect transistors, and the field effect transistor MN1 is an N-channel field effect transistor.

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