Load driving circuit and method for controlling load driving circuit

Abstract

The invention provides a load driving circuit and a control method of the load driving circuit. The load drive circuit includes: a drive circuit that receives a power supply voltage from a power supply circuit that reduces the power supply voltage when a power supply current exceeds a limit value, drives a load while receiving an enable signal of an active level, and stops driving of the load while receiving the enable signal of an inactive level; a voltage drop detection circuit that outputs a first detection signal of an active level when the power supply voltage is lower than a first voltage, and outputs a first detection signal of an inactive level when the power supply voltage is greater than or equal to the first voltage; and an enable control circuit which outputs the enable signal of an ineffective level according to the first detection signal of the effective level, and outputs the enable signal of the effective level according to the first detection signal of the ineffective level.

Description

Technical Field

[0001] The invention relates to a load driving circuit and a control method of the load driving circuit. Background Art

[0002] As a load driving circuit that drives a speaker as a load to output sound from the speaker, a class D amplifier circuit and a class B amplifier circuit are known (for example, refer to Patent Document 1).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2014-72613 Summary of the invention

[0004] For example, in a speaker system in which an amplifier circuit driving a speaker and the speaker are mounted on a substrate, when the + and - terminals of the speaker are short-circuited due to dust or the like adhering to the substrate, an abnormal current may flow in the amplifier circuit. The abnormal current in the amplifier circuit caused by the short circuit can be detected by detecting a temperature rise in the amplifier circuit using an overheat protection circuit or the like.

[0005] However, when a regulator is used as the power supply of the amplifier circuit, the regulator has a protection function that reduces the power supply voltage when the power supply current exceeds the limit current. As a result, the abnormal current is reduced, and therefore, the temperature rise caused by the overheat protection circuit cannot be detected, and the abnormal current may not be detected.

[0006] In addition, when multiple functional circuits including an amplifier circuit are integrated into one chip, the chip size and package size may increase, and the number of package terminals may increase. When the number of terminals increases, the amount of heat dissipated from the package increases, and the allowable loss increases. Therefore, the temperature rise accompanying the abnormal current cannot be detected by the overheat protection circuit, and the abnormal current may not be detected.

[0007] The disclosed technology aims to detect the abnormal current and stop the drive circuit even when an abnormal current of the drive circuit caused by an abnormality of a load driven by the drive circuit cannot be detected as a temperature rise.

[0008] In order to solve the above-mentioned technical problems, a load driving circuit of one embodiment of the present invention comprises: a driving circuit, which receives the power supply voltage from a power supply circuit that reduces the power supply voltage when the power supply current exceeds a limit value, drives the load during the period of receiving an enable signal of a valid level, and stops driving the load during the period of receiving the enable signal of an invalid level; a voltage drop detection circuit, which outputs a first detection signal of a valid level when the power supply voltage is lower than a first voltage, and outputs a first detection signal of an invalid level when the power supply voltage is higher than the first voltage; and an enable control circuit, which outputs the enable signal of an invalid level based on the first detection signal of a valid level, and outputs the enable signal of a valid level based on the first detection signal of an invalid level.

[0009] Even when an abnormal current of the drive circuit caused by an abnormality in a load driven by the drive circuit cannot be detected as a temperature rise, the abnormal current can be detected to stop the drive circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a block diagram showing an example of a system including the load driving circuit in the first embodiment.

[0011] Figure 2 Yes means Figure 1 A diagram of an example of characteristics of output voltage and output current of a regulator.

[0012] Figure 3 Yes means Figure 1 A timing diagram showing an example of the operation of the load driving circuit.

[0013] Figure 4 This is a block diagram showing an example of a system including the load driving circuit in the second embodiment.

[0014] Figure 5 This is a block diagram showing an example of a system including the load driving circuit in the third embodiment.

[0015] Figure 6 : is a block diagram showing an example of a system including the load driving circuit in the fourth embodiment. DETAILED DESCRIPTION

[0016] Hereinafter, the embodiments are described with reference to the accompanying drawings. Hereinafter, the same symbols as the signal names are sometimes used for signal lines, terminals, and nodes that transmit signals. The same symbols as the voltage names are sometimes used for voltage lines, terminals, nodes, and voltage values ​​that transmit voltages. In each of the accompanying drawings, the same symbols are marked for the same components, and repeated descriptions are sometimes omitted.

[0017] (First Embodiment)

[0018] Figure 1 1 is a block diagram showing an example of a system including a load driving circuit according to the first embodiment. Figure 1 The system SYS1 shown has a load driving circuit 100, a regulator 200, and a load circuit 301 such as a speaker SP, and functions as a sound output system. For example, the load driving circuit 100 has a form of a semiconductor chip, and is mounted on a substrate together with the regulator 200 and the load circuit 301 (speaker SP). Therefore, the system SYS1 can have a form of a substrate. In addition, the regulator 200 can be provided in the chip of the load driving circuit 100. The regulator 200 is an example of a power supply circuit that reduces the power supply voltage when the power supply current exceeds the limit value.

[0019] The output of the regulator 200 is connected to the power supply terminal VDD of the load driving circuit 100. Each circuit of the load driving circuit 100 operates by receiving the power supply voltage VDD generated by the regulator 200. The output terminals OUT+ and OUT- of the load driving circuit 100 are connected to the -terminal and +terminal of the speaker SP, respectively.

[0020] The load driving circuit 100 includes an audio amplifier 10, an overheat protection circuit 20, a voltage drop detection circuit 30, a control circuit 40, a reference voltage generating unit 50, a capacitor C1, resistors R1, R2, and a two-input NOR circuit. The audio amplifier 10 includes differential amplifiers AMP1, AMP2, and resistors R11, R12. The voltage drop detection circuit 30 includes a comparator CMP, an inverter IV1, and resistors R31, R32, R33, and R34. The audio amplifier 10 is an example of a driving circuit that drives a speaker SP as a load.

[0021] The capacitor C1 and the resistor R1 are connected in series between the input terminal VIN of the load driving circuit 100 and the input terminal IN- of the audio amplifier 10, and function as a filter. The resistor R2 is configured between the output and the -input of the amplifier AMP1, and functions as a feedback resistor. The output terminal ST_SS of the voltage drop detection circuit 30 is connected to the input of the control circuit 40. The two inputs of the NOR circuit are respectively connected to the high temperature detection terminal HT of the overheat protection circuit 20 and the output terminal ST_SS2 of the control circuit 40. The output of the NOR circuit is connected to the enable terminal EN of the audio amplifier 10. The control circuit 40 and the NOR circuit are an example of an enable control circuit. The reference voltage generating unit 50 outputs a reference voltage to the input terminal IN+ of the audio amplifier 10.

[0022] The audio amplifier 10 operates when receiving a high-level enable signal EN through the enable terminal EN, and stops operating when receiving a low-level enable signal EN through the enable terminal EN. Resistors R11 and R12 are connected in series between the output of the amplifier AMP1 and the output of AMP2, and a connection node CN of the resistors R11 and R12 is connected to the -input of the amplifier AMP2.

[0023] The amplifier AMP1 receives an AC input signal VIN supplied via the capacitor C1 and the resistor R1 through the input terminal IN- and receives a reference voltage through the input terminal IN+ and the input terminal +. The amplifier AMP1 inverts and amplifies the input signal VIN received through the input terminal - according to the resistance ratio of the resistors R1 and R2, and outputs it to the output terminal OUT+ as an output signal OUT+. The input terminals IN- and IN+ of the amplifier AMP1 are an example of a pair of first input terminals. The output terminal OUT+ is an example of a first output terminal, and the output signal OUT+ is an example of a first output signal. The amplifier AMP2 receives the output signal OUT+ of the amplifier AMP1 through the input terminal - via the resistor R11 and the connection node CN, and receives a reference voltage through the input terminal +. The amplifier AMP2 inverts and amplifies the signal received through the input terminal -, and outputs it to the output terminal OUT- as an output signal OUT-. The input terminals IN- and IN+ of the amplifier AMP2 are an example of a pair of second input terminals. The output terminal OUT- is an example of a second output terminal, and the output signal OUT- is an example of a second output signal.

[0024] As described above, the audio amplifier 10 inverts and amplifies the input signal VIN, and outputs the differential output signals OUT+ and OUT- to the -terminal and +terminal of the speaker SP. Then, the speaker SP outputs sound corresponding to the input signal VIN.

[0025] The overheat protection circuit 20 includes a transistor, and detects temperature by utilizing the temperature dependency of the base-emitter voltage VBE of the transistor. When the detected temperature is higher than a predetermined temperature, the overheat protection circuit 20 outputs a high-level high-temperature detection signal HT to the NOR circuit, and when the detected temperature is lower than the predetermined temperature, the overheat protection circuit 20 outputs a low-level high-temperature detection signal HT to the NOR circuit.

[0026] The overheat protection circuit 20 is an example of a temperature detection circuit. The predetermined temperature is a maximum temperature within a range where the power consumption of the load driving circuit 100 does not exceed the allowable loss, and is an example of a first temperature. The high temperature detection signal HT is an example of a second detection signal. The high level of the high temperature detection signal HT is an example of a valid level, and the low level of the high temperature detection signal HT is an example of an invalid level.

[0027] In the voltage drop detection circuit 30, resistors R31 and R32 are connected in series between the power supply line VDD and the ground line GND, and a voltage DIV1 obtained by dividing the power supply voltage VDD according to the resistance ratio is supplied to the input terminal + of the comparator CMP. Resistors R33 and R34 are connected in series between the reference voltage line VREF and the ground line GND, and a voltage DIV2 obtained by dividing the reference voltage VREF according to the resistance ratio is supplied to the input terminal - of the comparator CMP. The reference voltage VREF is an example of a first voltage.

[0028] When voltage DIV1 is equal to or greater than voltage DIV2, comparator CMP detects that power supply voltage VDD is equal to or greater than reference voltage VREF and outputs a high level to inverter IV1. Inverter IV1 receiving the high level outputs a low level voltage drop detection signal ST_SS indicating that power supply voltage VDD is a normal value to control circuit 40.

[0029] When voltage DIV1 is lower than voltage DIV2, comparator CMP detects that power supply voltage VDD is lower than reference voltage VREF and outputs a low level to inverter IV1. Inverter IV1 receiving the low level outputs a high level voltage drop detection signal ST_SS indicating that power supply voltage VDD is lower than a normal value to control circuit 40.

[0030] The control circuit 40 receives a state signal ST indicating the states of various circuits mounted in the load driving circuit 100, and outputs various control signals CNTL according to the state signal ST. In addition, the control circuit 40 outputs a high-level voltage drop detection signal ST_SS2 to the NOR circuit when the voltage drop detection signal ST_SS is at a high level, and outputs a low-level voltage drop detection signal ST_SS2 to the NOR circuit when the voltage drop detection signal ST_SS is at a low level.

[0031] The voltage drop detection signals ST_SS and ST_SS2 are examples of the first detection signal. The high level of the voltage drop detection signals ST_SS and ST_SS2 is an example of a valid level, and the low level of the voltage drop detection signals ST_SS and ST_SS2 is an example of an invalid level.

[0032] When the NOR circuit receives one or both of the high-level high-temperature detection signal HT and the high-level voltage drop detection signal ST_SS2, the NOR circuit outputs the low-level enable signal EN to the enable terminal EN of the audio amplifier 10. When the NOR circuit receives the low-level high-temperature detection signal HT and the low-level voltage drop detection signal ST_SS2, the NOR circuit outputs the high-level enable signal EN to the enable terminal EN of the audio amplifier 10.

[0033] As described above, the audio amplifier 10 stops operating when the overheat protection circuit 20 detects a high temperature or when the voltage drop detection circuit 30 detects that the power supply voltage VDD is lower than a normal value. The audio amplifier 10 operates when the overheat protection circuit 20 does not detect a high temperature and the voltage drop detection circuit 30 detects that the power supply voltage VDD is a normal value.

[0034] For example, when the load drive circuit 100 generates heat due to an abnormality in a circuit in the load drive circuit 100, even when the power supply current from the regulator 200 does not exceed the limit current, the operation of the audio amplifier 10 can be stopped by the overheat protection circuit 20. As a result, for example, the generation of an abnormal current in the audio amplifier 10 can be prevented in advance.

[0035] On the other hand, when a current greater than the limiting current of the regulator 200 flows through the audio amplifier 10, the supply of power supply current from the regulator 200 to the audio amplifier 10 is limited. Thus, when the heat generation of the audio amplifier 10 decreases, it becomes difficult to detect abnormal current by the overheat protection circuit 20.

[0036] However, in the present embodiment, when the supply of the power supply current is limited by the regulator 200, the power supply voltage VDD output from the regulator 200 decreases. When the decrease in the power supply voltage VDD is detected, the voltage drop detection circuit 30 outputs a high-level voltage drop detection signal ST_SS to stop the operation of the audio amplifier 10. Therefore, even when the regulator 200 limits the power supply current, the load drive circuit 100 can detect an abnormal current of the audio amplifier 10 caused by a short circuit of the speaker SP.

[0037] Figure 2 Yes means Figure 1 FIG. 1 is a diagram showing an example of the characteristics of the output voltage and output current of the regulator 200. When the load driving circuit 100 operates according to the power supply voltage VDD outputted from the regulator 200 and a predetermined power supply current is consumed by the load driving circuit 100, the regulator 200 outputs a constant power supply voltage VDD ( Figure 2 (a)).

[0038] On the other hand, when the current consumption of the load driving circuit 100 increases due to a short circuit of the speaker SP or the like and exceeds the current limit of the regulator 200, the regulator 200 activates the current limit function and reduces the power supply voltage VDD (VDD) to be output. Figure 2 (b)). Therefore, the power supply current (regulator output current) supplied from the regulator 200 to the load driving circuit 100 decreases as the power supply voltage VDD decreases ( Figure 2 (c)).

[0039] Figure 3 Yes means Figure 1 The timing diagram of an example of the operation of the load driving circuit 100 is shown in FIG. Figure 3 FIG. 1 shows an example of a control method of the load driving circuit 100. First, when the power supply of the system SYS1 is turned on, the regulator 200 starts to generate the power supply voltage VDD, and the load driving circuit 100 starts to operate ( Figure 3 (a)).

[0040] Since the overheat protection circuit 20 does not detect high temperature, it outputs a low-level high temperature detection signal HT ( Figure 3 (b)). Since the power supply voltage VDD is at a normal value, the voltage drop detection circuit 30 outputs a low-level voltage drop detection signal ST_SS, and the control circuit 40 outputs a low-level voltage drop detection signal ST_SS2 ( Figure 3 (c)).

[0041] The NOR circuit outputs a high-level enable signal EN to the audio amplifier 10 according to the low-level high-temperature detection signal HT and the low-level voltage drop detection signal ST_SS2. Figure 3 (d)). Then, the audio amplifier 10 differentially amplifies the voltage of the input signal VIN and outputs it to the speaker SP, so that the speaker SP outputs sound. In addition, at this time, the speaker SP is not short-circuited.

[0042] Thereafter, any of the components mounted in the system SYS1 including the load driving circuit 100 reaches a high temperature for some reason, and the overheat protection circuit 20 detects the temperature abnormality. In addition, the power supply current of the regulator 200 does not exceed the limit current due to the high temperature state of the components in the system SYS1 during the abnormal temperature detection period, and thus the power supply voltage VDD is maintained at a normal value ( Figure 3 (e)).

[0043] During the abnormal temperature detection period, the overheat protection circuit 20 outputs a high-level high temperature detection signal HT to the NOR circuit, and the NOR circuit outputs a low-level enable signal EN to the audio amplifier 10. Figure 3 (f), (g)). The audio amplifier 10 stops operating according to the low-level enable signal EN, and the speaker SP stops outputting sound.

[0044] After that, the high temperature state of the system SYS1 is released, and the overheat protection circuit 20 changes the high temperature detection signal HT to a low level ( Figure 3 (h)). The NOR circuit outputs a high-level enable signal EN to the audio amplifier 10 according to the low-level high-temperature detection signal HT and the low-level voltage drop detection signal ST_SS2 ( Figure 3 (i)). As a result, the output of sound from the speaker SP is restarted.

[0045] Then, a temporary short circuit occurs between the -terminal and the +terminal of the speaker SP. A temporary short circuit may occur, for example, due to moisture absorption of dust or the like accumulated in the terminal portion of the speaker SP. Due to the short circuit, a through current flows between the output terminals OUT+ and OUT- of the load drive circuit 100. When the regulator 200 outputs a power supply current greater than the limit current, the regulator 200 limits the supply of the power supply current, thereby reducing the power supply voltage VDD ( Figure 3 (j)).

[0046] When the power supply voltage VDD is lower than the reference voltage VREF, the voltage drop detection circuit 30 outputs a high-level voltage drop detection signal ST_SS, and the control circuit 40 outputs a high-level voltage drop detection signal ST_SS2 ( Figure 3 (k)). The NOR circuit outputs a low-level enable signal EN to the audio amplifier 10 according to the high-level voltage drop detection signal ST_SS2 ( Figure 3 The audio amplifier 10 stops operating during the VDD drop detection period according to the low-level enable signal EN, and the speaker SP stops outputting sound.

[0047] After that, the temporary short circuit between the -terminal and the +terminal of the speaker SP is released, and the regulator 200 outputs a normal power supply voltage VDD (which is higher than the reference voltage VREF). Figure 3 Since the power supply voltage VDD is higher than the reference voltage VREF, the voltage drop detection circuit 30 changes the voltage drop detection signal ST_SS to a low level, and the control circuit 40 outputs a low-level voltage drop detection signal ST_SS2 ( Figure 3 The NOR circuit outputs a high-level enable signal EN to the audio amplifier 10 according to the low-level voltage drop detection signal ST_SS2 and the low-level high-temperature detection signal HT ( Figure 3 As a result, the output of sound from the speaker SP is restarted.

[0048] In addition, the load driving circuit 100 may not include the overheat protection circuit 20. In this case, one input of the NOR circuit is set to a low level. The operation of the load driving circuit 100 without the overheat protection circuit 20 is different from that without the overheat protection circuit 20. Figure 3 The waveform of the high temperature detection signal HT has no change other than the change of the enable signal EN based on the high temperature detection signal HT. Figure 3 The operation waveform is the same as that of . In addition, the load driving circuit 100 may not include the control circuit 40. In this case, the voltage drop detection signal ST_SS may be directly connected to the input of the NOR circuit.

[0049] As described above, in the first embodiment, when a decrease in the power supply voltage VDD is detected, the voltage drop detection circuit 30 outputs a high-level voltage drop detection signal ST_SS to stop the operation of the audio amplifier 10. Therefore, even when the regulator 200 limits the power supply current, the load drive circuit 100 can detect an abnormal current of the audio amplifier 10 caused by a short circuit of the speaker SP. As a result, even when the abnormal current of the audio amplifier 10 caused by an abnormality of the load circuit 301 driven by the audio amplifier 10 cannot be detected as a temperature rise, the abnormal current can be detected and the audio amplifier 10 can be stopped.

[0050] Furthermore, when the load driving circuit 100 generates heat due to a circuit abnormality in the load driving circuit 100 , the operation of the audio amplifier 10 can be stopped by the overheat protection circuit 20 if the power supply current from the regulator 200 does not exceed the limit current.

[0051] (Second Embodiment)

[0052] Figure 4 FIG. 1 is a block diagram showing an example of a system including a load driving circuit according to the second embodiment. Figure 1 The same elements are denoted by the same reference numerals, and detailed descriptions thereof are omitted. Figure 4 The system SYS2 shown in the figure comprises: a load driving circuit 102, a regulator 200 and a load circuit 302. The load driving circuit 102 comprises a driving circuit 12 instead of Figure 1 In addition to the audio amplifier 10, there is Figure 1 The load driving circuit 100 has the same structure and function.

[0053] The driving circuit 12 includes a two-input NAND circuit, an inverter IV2, and an open-drain n-channel MOS (Metal Oxide Semiconductor) transistor NM1. Hereinafter, the n-channel MOS transistor NM1 is also simply referred to as the transistor NM1.

[0054] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 102, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the input of the inverter IV2, and the output of the inverter IV2 is connected to the gate of the transistor NM1. The drain of the transistor NM1 is connected to the load circuit 302 via the output terminal OUT, and the source of the transistor NM1 is connected to the ground line GND.

[0055] For example, the load circuit 302 has a load L1 equivalently represented as a resistor connected between the power supply line VDD and the output terminal OUT of the drive circuit 12. For example, the load circuit 302 may be an LED (Light Emitting Diode). The drive circuit 12 operates when receiving a high-level enable signal EN, and turns on the transistor NM1 according to the high-level input signal IN to operate the load circuit 302. When the drive circuit 12 receives a low-level enable signal EN, the transistor NM1 is turned off to stop the operation of the load circuit 302.

[0056] The load driving circuit 102 and Figure 3 The same action. However, Figure 3 The “stop of the output of the sound” during the low level period of the enable signal EN is replaced by the “stop of the driving of the load circuit 302 by the transistor NM1”.

[0057] For example, even when an abnormal current of the drive circuit 12 caused by an abnormality in a load driven by the drive circuit 12 cannot be detected as a temperature rise, the abnormal current can be detected and the drive circuit 12 can be stopped.

[0058] (Third Embodiment)

[0059] Figure 5 FIG. 1 is a block diagram showing an example of a system including a load driving circuit according to the third embodiment. Figure 1 and Figure 4 The same elements are denoted by the same reference numerals, and detailed descriptions thereof are omitted. Figure 5 The system SYS3 shown in FIG. 1 comprises a load driving circuit 103, a regulator 200 and a load circuit 303. The load driving circuit 103 comprises a driving circuit 13 instead of Figure 1 In addition to the audio amplifier 10, there is Figure 1 The load driving circuit 100 has the same structure and function.

[0060] The driving circuit 13 includes a two-input NAND circuit and an open-drain p-channel MOS transistor PM1. Hereinafter, the p-channel MOS transistor PM1 is also simply referred to as the transistor PM1.

[0061] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 103, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the gate of the transistor PM1. The drain of the transistor PM1 is connected to the load circuit 303 via the output terminal OUT, and the source of the transistor PM1 is connected to the power supply line VDD.

[0062] For example, the load circuit 303 includes a load L2 equivalently represented as a resistor connected between the output terminal OUT of the drive circuit 13 and the ground line GND. The drive circuit 13 operates when receiving a high-level enable signal EN, and turns on the transistor PM1 according to the high-level input signal IN to operate the load circuit 303. When receiving a low-level enable signal EN, the drive circuit 13 turns off the transistor PM1 to stop the operation of the load circuit 303.

[0063] The load driving circuit 103 and Figure 3 The same action. However, Figure 3 The “stop of sound output” during the low level period of the enable signal EN is replaced by the “stop of driving the load circuit 303 by the transistor PM1”.

[0064] For example, even when an abnormal current of the drive circuit 13 caused by an abnormality in a load driven by the drive circuit 13 cannot be detected as a temperature rise, the abnormal current can be detected and the drive circuit 13 can be stopped.

[0065] (Fourth Embodiment)

[0066] Figure 6 FIG. 1 is a block diagram showing an example of a system including a load driving circuit according to a fourth embodiment. Figure 1 , Figure 4 as well as Figure 5 The same elements are denoted by the same reference numerals, and detailed descriptions thereof are omitted. Figure 6 The system SYS4 shown in FIG. 1 comprises a load driving circuit 104, a regulator 200 and a load circuit 304. The load driving circuit 104 comprises a driving circuit 14 instead of Figure 1 In addition to the audio amplifier 10, there is Figure 1 The load driving circuit 100 has the same structure and function.

[0067] The driving circuit 14 includes a two-input NAND circuit, an inverter IV2, and a CMOS inverter IV3. The CMOS inverter IV3 includes transistors PM1 and NM1. The source of the transistor PM1 is connected to the power supply line VDD, and the source of the transistor NM1 is connected to the ground line GND.

[0068] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 104, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the input of the CMOS inverter IV3 via the inverter IV2. The output of the CMOS inverter IV3 is connected to the load circuit 304 via the output terminal OUT.

[0069] For example, the load circuit 304 includes loads L3, L4, and a switch SW. The load L3 is connected between the output terminal OUT of the drive circuit 14 and the power supply line VDD. The load L4 is connected between the output terminal OUT of the drive circuit 14 and the ground line GND. The switch SW connects the output terminal OUT to any one of the loads L1 and L2. The switching of the switch SW can be implemented by the control circuit of the load drive circuit 104, or by another control circuit in the system SYS4.

[0070] In the first operation mode, the output terminal OUT of the load driving circuit 104 is connected to the load L3 via the switch SW. Figure 4 The load driving circuit 104 operates in the same manner as the load driving circuit 102. In the second operation mode, the output terminal OUT of the load driving circuit 104 is connected to the load L4 through the switch SW. Figure 5 The load driving circuit 103 operates in the same manner.

[0071] For example, when an abnormal current of the drive circuit 14 caused by an abnormality in the load driven by the drive circuit 14 cannot be detected as a temperature rise, the abnormal current can be detected and the drive circuit 14 can be stopped.

[0072] As mentioned above, although the present invention has been described based on each embodiment, the present invention is not limited to the requirements shown in the above embodiment. These aspects can be changed within the scope not departing from the gist of the present invention and can be appropriately determined according to the application mode.

[0073] Explanation of symbols

[0074] 10. Audio amplifier;

[0075] 12, 13, 14 driving circuit;

[0076] 20 Overheat protection circuit;

[0077] 30 voltage drop detection circuit;

[0078] 40 control circuit;

[0079] 50 reference voltage generating unit;

[0080] 100, 102, 103, 104 load driving circuit;

[0081] 200 regulator;

[0082] 301, 302, 303, 304 load circuits;

[0083] AMP1, AMP2 differential amplifiers;

[0084] C1 capacitor;

[0085] CMP comparator;

[0086] CN connection node;

[0087] CNTL control signal;

[0088] DIV1, DIV2 voltage;

[0089] EN enable signal;

[0090] HT high temperature detection signal;

[0091] IN, IN+, IN- input terminals;

[0092] IV1, IV2, IV3 inverters;

[0093] L1, L2, L3, L4 load;

[0094] NM1 transistor;

[0095] OUT, OUT+, OUT- output terminals;

[0096] PM1 transistor;

[0097] R1, R2, R11, R12 resistors;

[0098] R31, R32, R33, R34 resistors;

[0099] SP Speaker;

[0100] ST status signal;

[0101] ST_SS, ST_SS2 voltage drop detection signal;

[0102] SW switch;

[0103] SYS1, SYS2, SYS3, SYS4 systems;

[0104] VDD power supply terminal;

[0105] VIN input terminal;

[0106] VREF reference voltage.

Claims

1. A load driving circuit, characterized in that: have: a drive circuit that receives the power supply voltage from a power supply circuit that reduces the power supply voltage when the power supply current exceeds a limit value, drives a load while receiving an enable signal of an effective level, and stops driving the load while receiving the enable signal of an ineffective level; a voltage drop detection circuit, which outputs a first detection signal of a valid level when the power supply voltage is lower than a first voltage, and outputs a first detection signal of an invalid level when the power supply voltage is higher than the first voltage; as well as The enable control circuit outputs the enable signal of an invalid level according to the first detection signal of an effective level, and outputs the enable signal of an effective level according to the first detection signal of an invalid level.

2. The load driving circuit according to claim 1, characterized in that: The load driving circuit comprises: a temperature detection circuit, which outputs a second detection signal of a valid level when the temperature is above a first temperature, and outputs the second detection signal of an invalid level when the temperature is below the first temperature. The enable control circuit outputs the enable signal of an invalid level according to the first detection signal of an invalid level or the second detection signal of an invalid level, and outputs the enable signal of an invalid level according to the first detection signal of an invalid level and the second detection signal of an invalid level.

3. The load driving circuit according to claim 1 or 2, characterized in that: The driving circuit is an audio amplifier including a first amplifier and a second amplifier, wherein an input signal input through a filter and a reference voltage are input to a pair of first input terminals of the first amplifier, and a first output signal is output from a first output terminal, and the reference voltage and a third voltage are input to a pair of second input terminals of the second amplifier, and a second output signal is output from a second output terminal. The third voltage is a voltage output from a resistor connected in series between the first output terminal and the second output terminal. The load is a speaker, and the first output signal is input to a first input terminal of the speaker, and the second output signal is input to a second input terminal of the speaker.

4. A method for controlling a load driving circuit, wherein the load driving circuit receives a power supply voltage from a power supply circuit that reduces the power supply voltage when the power supply current exceeds a limit value to drive a load, characterized in that: driving the load during a period of receiving an enable signal of a valid level, and stopping the driving of the load during a period of receiving the enable signal of an invalid level, When the power supply voltage is lower than the first voltage, a first detection signal of a valid level is output, and when the power supply voltage is higher than the first voltage, a first detection signal of an invalid level is output, According to the first detection signal of the effective level, the enable signal of the ineffective level is output, and according to the first detection signal of the ineffective level, the enable signal of the effective level is output.

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