A PCB manufacturing method, a PCB and an electronic device

Abstract

The application discloses a PCB manufacturing method, a PCB and an electronic device. The method comprises the following steps: obtaining the minimum depth of a via required by a connector pin and the actual depth of the via in a PCB; in response to the minimum depth being smaller than the actual depth of the via, obtaining the position of a wiring layer; in response to the position of the wiring layer meeting preset requirements, adding a local PCB to the upper part of the via of the PCB; drilling a hole in the local PCB at a position aligned with the via of the PCB to obtain a via of the local PCB, and pressing the connector pin through the via of the local PCB into the via of the PCB. The application can flexibly change the contact point depth of the connector pin by adding a local PCB to the via, reduces the influence of the invalid via stub, and improves the electrical performance.

Description

Technical Field

[0001] This invention relates to the field of PCBs, and more specifically to a method for manufacturing a PCB, a PCB, and electronic equipment. Background Technology

[0002] Currently, server products have a variety of external interfaces, requiring the use of various connectors for external connections. There are many ways to connect connectors to PCBs (Printed Circuit Boards), such as through-hole wave soldering and reflow soldering. As the speed and density of high-speed signals increase, among the many connector connection methods, crimp connection technology is widely used in the high-speed signal field due to its advantages such as convenient installation, high density, and excellent signal characteristics.

[0003] like Figure 1 The connection method between the crimp connector and the PCB shown illustrates that the crimp connector achieves the connection with the via wall through the deformation of the connecting pins, thus fulfilling the functional requirements of device fixation and instrument electrical connection. The connection position between the pin and the via is not at the top of the connector-PCB contact area, but rather in an area at a certain distance from the surface. Due to differences in pins, different connectors require different minimum via lengths and depths to ensure reliable electrical connections. For the trace layer below the pin-via contact point, the portion above the contact point is considered an invalid via stub (or residual stub), which can lead to signal quality loss for high-speed signals. Summary of the Invention

[0004] In view of this, in order to overcome at least one aspect of the above problems, embodiments of the present invention provide a method for manufacturing a PCB board, comprising the following steps:

[0005] Obtain the minimum via depth required for connector pins and the actual via depth in the PCB board;

[0006] In response to the minimum depth being less than the actual depth of the via, the position of the routing layer is obtained;

[0007] In response to the fact that the position of the trace layer meets the preset requirements, a partial PCB layer is added above the vias of the PCB board;

[0008] Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB, and press the connector pins through the vias of the partial PCB into the vias of the PCB board.

[0009] In some embodiments, in response to the position of the trace layer meeting preset requirements, a partial PCB layer is added above the vias of the PCB board, further including:

[0010] Determine the contact point of the connector pins with the vias of the PCB board when the local PCB is not added;

[0011] Determine whether the location of the wiring layer is above the contact point;

[0012] In response to the fact that the position of the trace layer is above the contact point, it is determined that the position of the trace layer meets the preset requirements.

[0013] In some embodiments, after the step of adding a partial PCB layer above the vias of the PCB board in response to the position of the trace layer meeting preset requirements, the method further includes:

[0014] The thickness for back-drilling the vias in the PCB is determined based on the thickness of the local PCB and the minimum depth.

[0015] Back drilling is performed according to the thickness of the back drill.

[0016] In some embodiments, drilling holes at positions aligned with vias on the PCB of the partial PCB to obtain vias on the partial PCB further includes:

[0017] Drill holes independently in the local PCB according to the location of the vias on the PCB board;

[0018] Based on the via positions of the partial PCB and the PCB board, the partial PCB and the PCB board are pressed together to align the vias of the partial PCB and the PCB board.

[0019] In some embodiments, after drilling holes at locations aligned with the vias on the PCB to obtain the vias of the partial PCB, the method further includes:

[0020] The via area above the connection point between the trace layer and the via on the PCB board is etched to remove the metal plating in the via area above the connection point.

[0021] In some embodiments, it also includes:

[0022] In response to the minimum depth being greater than the actual depth of the via, a local PCB layer is added above the via on the PCB board;

[0023] Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB;

[0024] The connector pins are pressed into the vias of the partial PCB through the vias of the PCB board.

[0025] In some embodiments, an additional partial PCB layer is added above the vias of the PCB board, further comprising:

[0026] Based on the principle that the sum of the thickness of the local PCB and the depth of the vias on the PCB board is not less than the minimum depth, a local PCB layer is added above the vias on the PCB board.

[0027] In some embodiments, it also includes:

[0028] In response to the fact that the position of the wiring layer does not meet the preset requirements, it is determined whether the height of the connector meets the standard;

[0029] In response to the connector's height not meeting the standard, a partial PCB layer is added above the via on the PCB board to increase the connector's height to meet the standard.

[0030] Based on the same inventive concept, according to another aspect of the present invention, embodiments of the present invention also provide a PCB board, said PCB board being manufactured according to the method described in any of the above embodiments.

[0031] Based on the same inventive concept, according to another aspect of the present invention, embodiments of the present invention also provide a computer device, the electronic device comprising the PCB board described in the above embodiments.

[0032] The present invention has one of the following beneficial technical effects: the solution proposed in this invention can flexibly change the contact point depth of the connector pins by adding a local PCB on the via, reducing the impact of invalid via stubs, and thus improving electrical performance. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings without creative effort.

[0034] Figure 1 This is a schematic diagram illustrating the connection method between a crimp connector and a PCB in the prior art;

[0035] Figure 2 A schematic flowchart illustrating a method for manufacturing a PCB board according to an embodiment of the present invention;

[0036] Figure 3The accompanying diagram shows a comparison of adding a partial PCB and not adding a partial PCB, provided for embodiments of the present invention. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to specific examples and the accompanying drawings.

[0038] It should be noted that all uses of "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two entities or parameters with the same name but different names. It is clear that "first" and "second" are only for the convenience of expression and should not be construed as limiting the embodiments of the present invention. Subsequent embodiments will not explain this in detail.

[0039] According to one aspect of the present invention, embodiments of the present invention provide a method for manufacturing a PCB board, such as... Figure 2 As shown, it may include the following steps:

[0040] S1, obtain the minimum depth of the via required for the connector pin and the actual depth of the via in the PCB board;

[0041] S2, in response to the minimum depth being less than the actual depth of the via, obtain the position of the routing layer;

[0042] S3, in response to the position of the trace layer meeting the preset requirements, a partial PCB layer is added above the vias of the PCB board;

[0043] S4, Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain vias on the partial PCB, and press the connector pins through the vias on the partial PCB into the vias of the PCB board.

[0044] The solution proposed in this invention can flexibly change the contact point depth of the connector pins by adding a local PCB on the via, reducing the impact of invalid via stubs, and thus improving electrical performance.

[0045] In some embodiments, in response to the position of the trace layer meeting preset requirements, a partial PCB layer is added above the vias of the PCB board, further including:

[0046] Determine the contact point of the connector pins with the vias of the PCB board when the local PCB is not added;

[0047] Determine whether the location of the wiring layer is above the contact point;

[0048] In response to the fact that the position of the trace layer is above the contact point, it is determined that the position of the trace layer meets the preset requirements.

[0049] Specifically, since different connectors have different minimum via depth requirements (reserved depth), and the routing layer distribution and board thickness of the single board are also different in actual projects, when the minimum required via depth is less than the actual depth of the via on the PCB, and the position of the routing layer is above the contact point of the connector pin and the via on the PCB, a solution can be made to locally add a PCB layer in the connector area and adjust the thickness of the added PCB layer to flexibly adjust the position of the connector and PCB contact point. This increases the back-drilling depth of the via below the connection point of the routing layer and the via for the routing layer above the contact point, improves the stub effect of the via below the routing layer, and thus improves the electrical performance.

[0050] For example, such as Figure 2 As shown, the pins of the connector on the right are directly pressed into the vias of the PCB. However, since the trace layer is located above the contact point, the depth of back drilling is affected by the depth of the connector. When the solution proposed in this application is adopted, a local PCB layer is added above the via. This is equivalent to raising the height of the via and reducing the area below the connection point between the trace layer and the via, thereby effectively increasing the depth of back drilling and effectively removing invalid via stubs.

[0051] In some embodiments, after the step of adding a partial PCB layer above the vias of the PCB board in response to the position of the trace layer meeting preset requirements, the method further includes:

[0052] The thickness for back-drilling the vias in the PCB is determined based on the thickness of the local PCB and the minimum depth.

[0053] Back drilling is performed according to the thickness of the back drill.

[0054] Specifically, such as Figure 3 As shown, the thickness of the back drill can be determined based on the local PCB thickness and the minimum depth. Figure 3 In the proposed solution, the depth of the back drilling on the left side is greater than the depth of the back drilling on the right side by the thickness of a portion of the PCB.

[0055] In some embodiments, drilling holes at positions aligned with vias on the PCB of the partial PCB to obtain vias on the partial PCB further includes:

[0056] Drill holes independently in the local PCB according to the location of the vias on the PCB board;

[0057] Based on the via positions of the partial PCB and the PCB board, the partial PCB and the PCB board are pressed together to align the vias of the partial PCB and the PCB board.

[0058] Specifically, since via stubs can also appear above the connection point, the vias of the local PCB can be electrically disconnected from the vias of the global PCB. They can be laminated after drilling and processing, which can reduce via stubs above the contact point.

[0059] In some embodiments, after drilling holes at locations aligned with the vias on the PCB to obtain the vias of the partial PCB, the method further includes:

[0060] The via area above the connection point between the trace layer and the via on the PCB board is etched to remove the metal plating in the via area above the connection point.

[0061] Specifically, after the PCB via processing is completed, the invalid via stubs above the connection points are etched using via wall etching technology. This process eliminates the invalid via areas while ensuring the electrical connection between the critical points and the vias, thereby improving the impact of the stubs.

[0062] In some embodiments, it also includes:

[0063] In response to the minimum depth being greater than the actual depth of the via, a local PCB layer is added above the via on the PCB board;

[0064] Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB;

[0065] The connector pins are pressed into the vias of the partial PCB through the vias of the PCB board.

[0066] In some embodiments, an additional partial PCB layer is added above the vias of the PCB board, further comprising:

[0067] Based on the principle that the sum of the thickness of the local PCB and the depth of the vias on the PCB board is not less than the minimum depth, a local PCB layer is added above the vias on the PCB board.

[0068] Specifically, when the PCB thickness is too thin to meet the connector retention depth requirement, a partial PCB layer can be added above the vias of the PCB. The sum of the thickness of the added partial PCB and the depth of the vias of the PCB should not be less than the retention depth.

[0069] In some embodiments, it also includes:

[0070] In response to the fact that the position of the wiring layer does not meet the preset requirements, it is determined whether the height of the connector meets the standard;

[0071] In response to the connector's height not meeting the standard, a partial PCB layer is added above the via on the PCB board to increase the connector's height to meet the standard.

[0072] Specifically, if the location of the trace layer does not meet the preset requirements and the height of the connector does not meet the standard, the height of the connector can be increased by adding a PCB layer.

[0073] The solution proposed in this invention can flexibly change the contact point depth of the connector pins by adding a local PCB on the via, reducing the impact of invalid via stubs, and thus improving electrical performance.

[0074] Based on the same inventive concept, according to another aspect of the present invention, embodiments of the present invention also provide a PCB board, which is manufactured by the following steps:

[0075] Obtain the minimum via depth required for connector pins and the actual via depth in the PCB board;

[0076] In response to the minimum depth being less than the actual depth of the via, the position of the routing layer is obtained;

[0077] In response to the fact that the position of the trace layer meets the preset requirements, a partial PCB layer is added above the vias of the PCB board;

[0078] Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB, and press the connector pins through the vias of the partial PCB into the vias of the PCB board.

[0079] In some embodiments, in response to the position of the trace layer meeting preset requirements, a partial PCB layer is added above the vias of the PCB board, further including:

[0080] Determine the contact point of the connector pins with the vias of the PCB board when the local PCB is not added;

[0081] Determine whether the location of the wiring layer is above the contact point;

[0082] In response to the fact that the position of the trace layer is above the contact point, it is determined that the position of the trace layer meets the preset requirements.

[0083] In some embodiments, after the step of adding a partial PCB layer above the vias of the PCB board in response to the position of the trace layer meeting preset requirements, the method further includes:

[0084] The thickness for back-drilling the vias in the PCB is determined based on the thickness of the local PCB and the minimum depth.

[0085] Back drilling is performed according to the thickness of the back drill.

[0086] In some embodiments, drilling holes at positions aligned with vias on the PCB of the partial PCB to obtain vias on the partial PCB further includes:

[0087] Drill holes independently in the local PCB according to the location of the vias on the PCB board;

[0088] Based on the via positions of the partial PCB and the PCB board, the partial PCB and the PCB board are pressed together to align the vias of the partial PCB and the PCB board.

[0089] In some embodiments, after drilling holes at locations aligned with the vias on the PCB to obtain the vias of the partial PCB, the method further includes:

[0090] The via area above the connection point between the trace layer and the via on the PCB board is etched to remove the metal plating in the via area above the connection point.

[0091] In some embodiments, it also includes:

[0092] In response to the minimum depth being greater than the actual depth of the via, a local PCB layer is added above the via on the PCB board;

[0093] Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB;

[0094] The connector pins are pressed into the vias of the partial PCB through the vias of the PCB board.

[0095] In some embodiments, an additional partial PCB layer is added above the vias of the PCB board, further comprising:

[0096] Based on the principle that the sum of the thickness of the local PCB and the depth of the vias on the PCB board is not less than the minimum depth, a local PCB layer is added above the vias on the PCB board.

[0097] In some embodiments, it also includes:

[0098] In response to the fact that the position of the wiring layer does not meet the preset requirements, it is determined whether the height of the connector meets the standard;

[0099] In response to the connector's height not meeting the standard, a partial PCB layer is added above the via on the PCB board to increase the connector's height to meet the standard.

[0100] Based on the same inventive concept, according to another aspect of the present invention, embodiments of the present invention also provide a computer device, the electronic device comprising the PCB board described in the above embodiments. It should be understood that, without conflict, all embodiments, features, and advantages described above regarding the method of manufacturing a PCB board according to the present invention are equally applicable to the PCB board and computer device according to this other aspect of the present invention. That is, all embodiments and variations thereof described above can be directly transferred and incorporated herein. For the sake of brevity, further details are omitted here.

[0101] The above are exemplary embodiments disclosed in this invention. However, it should be noted that various changes and modifications can be made without departing from the scope of the embodiments of this invention as defined by the claims. The functions, steps, and / or actions of the methods according to the disclosed embodiments described herein do not need to be performed in any particular order. Furthermore, although the elements disclosed in the embodiments of this invention may be described or claimed individually, they may be understood as multiple unless explicitly limited to a singular number.

[0102] It should be understood that, as used herein, the singular form “a” is intended to include the plural form as well, unless the context clearly supports an exception. It should also be understood that, as used herein, “and / or” refers to any and all possible combinations of one or more of the associated listed items.

[0103] The embodiment numbers disclosed in the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0104] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0105] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the invention (including the claims) is limited to these examples. Within the framework of the invention, technical features of the above embodiments or different embodiments can be combined, and many other variations of different aspects of the invention exist, which are not provided in the details for the sake of brevity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the invention should be included within the protection scope of the invention.

Claims

1. A method for manufacturing a PCB board, characterized in that, Includes the following steps: Obtain the minimum via depth required for connector pins and the actual via depth in the PCB board; In response to the minimum depth being less than the actual depth of the via, the position of the routing layer is obtained; In response to the fact that the position of the trace layer meets the preset requirements, a partial PCB layer is added above the vias of the PCB board; Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB, and press the connector pins through the vias of the partial PCB into the vias of the PCB board; Following the step of adding a partial PCB layer above the vias of the PCB board in response to the routing layer meeting preset requirements, the method further includes: The thickness for back-drilling the vias in the PCB is determined based on the thickness of the local PCB and the minimum depth. Back drilling is performed according to the thickness of the back drill.

2. The method as described in claim 1, characterized in that, In response to the routing layer meeting preset requirements, a partial PCB layer is added above the vias on the PCB board, further including: Determine the contact point of the connector pins with the vias of the PCB board when the local PCB is not added; Determine whether the location of the wiring layer is above the contact point; In response to the fact that the position of the trace layer is above the contact point, it is determined that the position of the trace layer meets the preset requirements.

3. The method as described in claim 1, characterized in that, Drilling holes on the partial PCB at positions aligned with the vias of the PCB board to obtain vias on the partial PCB further includes: Drill holes independently in the local PCB according to the location of the vias on the PCB board; Based on the via positions of the partial PCB and the PCB board, the partial PCB and the PCB board are pressed together to align the vias of the partial PCB and the PCB board.

4. The method as described in claim 1, characterized in that, After drilling holes in the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB, the method further includes: The via area above the connection point between the trace layer and the via on the PCB board is etched to remove the metal plating in the via area above the connection point.

5. The method as described in claim 1, characterized in that, Also includes: In response to the minimum depth being greater than the actual depth of the via, a local PCB layer is added above the via on the PCB board; Drill holes on the partial PCB at positions aligned with the vias of the PCB board to obtain the vias of the partial PCB; The connector pins are pressed into the vias of the partial PCB through the vias of the PCB board.

6. The method as described in claim 5, characterized in that, Adding a partial PCB layer above the vias of the PCB board further includes: Based on the principle that the sum of the thickness of the local PCB and the depth of the vias on the PCB board is not less than the minimum depth, a local PCB layer is added above the vias on the PCB board.

7. The method as described in claim 1, characterized in that, Also includes: In response to the fact that the position of the wiring layer does not meet the preset requirements, it is determined whether the height of the connector meets the standard; In response to the connector's height not meeting the standard, a partial PCB layer is added above the via on the PCB board to increase the connector's height to meet the standard.

8. A PCB board, characterized in that, The PCB board is manufactured according to any one of claims 1-7.

9. An electronic device, characterized in that, The electronic device includes the PCB board as described in claim 8.

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