Single photon avalanche diode and preparation method thereof

Abstract

The invention provides a single photon avalanche diode and a preparation method thereof, the single photon avalanche diode comprises a first type center well region, a second type center well region and a protection ring, the first type center well region comprises a first type center well region body part and a first type center well region extension part, the first type central well region extension part is arranged on one side of the first type central well region body part in the first direction; the second-type central well region is arranged on one side of the first-type central well region body part in the first direction, and the first-type central well region extension part surrounds the second-type central well region; the protection ring surrounds the first type central well region extension part; and the first type central well region body part is in contact with the first type central well region extension part. In the single-photon avalanche diode provided by the invention, the first type central well region extension part can separate the protection ring from the second type central well region, so that the dark count rate of the single-photon avalanche diode is reduced, the noise is reduced, and the performance of the single-photon avalanche diode is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a single-photon avalanche diode and a method for preparing the same. Background Art

[0002] Single Photon Avalanche Diode (SPAD) is an avalanche photodiode that works in Geiger mode (operating voltage is greater than breakdown voltage). It is widely used in laser radar, medicine, molecular imaging and quantum science due to its advantages of high time resolution, high detection sensitivity and low cost. The working principle of SPAD is: in Geiger mode, when SPAD absorbs photons, electron-hole pairs are generated in the avalanche region, and avalanche multiplication effect occurs under the action of strong electric field, forming avalanche current.

[0003] Dark count rate (DCR) is one of the most important parameters in SPAD design, which can be understood as the noise of the device. SPAD in related technologies has technical problems of high dark count rate and high noise, which need to be solved urgently. Summary of the invention

[0004] The present application provides a single-photon avalanche diode and a preparation method thereof, which can effectively solve the technical problems of high dark count rate and high noise in existing single-photon avalanche diodes.

[0005] On the one hand, the present application provides a single-photon avalanche diode, which includes: a first-type central well region, including a first-type central well region body and a first-type central well region extension, the first-type central well region extension is arranged on one side of the first-type central well region body in a first direction; a second-type central well region, arranged on one side of the first-type central well region body in the first direction, and the first-type central well region extension surrounds the second-type central well region; a guard ring surrounds the first-type central well region extension; wherein the first-type central well region body and the first-type central well region extension are in contact with each other.

[0006] Optionally, the doping concentration of the first-type central well region extension portion is less than the doping concentration of the first-type central well region body portion and the doping concentration of the second-type central well region.

[0007] Optionally, the surface of the second type central well region on the side facing away from the first type central well region body is a first surface; the surface of the first type central well region body on the side of the second type central well region is a second surface, wherein the area of ​​the first surface is greater than the area of ​​the second surface.

[0008] Optionally, the first-type central well region extension portion includes a first side surface adjacent to the second-type central well region, wherein a cross-sectional shape of the first side surface is an arc.

[0009] Optionally, in the first direction, the maximum thickness of the first type central well region extension portion is a first thickness, and the maximum thickness of the guard ring is a second thickness, wherein the first thickness ≥ the second thickness.

[0010] Optionally, in a direction parallel to the first surface, the maximum width of the first type central well region extension portion is a first width, wherein the first width is 0.2 micrometers to 0.6 micrometers.

[0011] Optionally, the doping concentration of the first type central well region extension is less than 1×10 17 / cm 3 .

[0012] Optionally, the doping concentration of the first type central well region body is 1×10 16 / cm 3 ~1×10 18 / cm 3 The doping concentration of the second type central well region is 1×10 16 / cm 3 ~1×10 18 / cm 3 .

[0013] Optionally, the single-photon avalanche diode further includes: a polysilicon layer, and an orthographic projection of the polysilicon layer on the guard ring at least partially overlaps with the guard ring.

[0014] On the other hand, the present application provides a method for preparing a single-photon avalanche diode, the method for preparing a single-photon avalanche diode comprising the following steps:

[0015] providing a substrate;

[0016] growing a second type epitaxial layer on the substrate;

[0017] forming a guard ring in the second type epitaxial layer;

[0018] forming a first type central well region body portion in the second type epitaxial layer;

[0019] forming a first type central well region extension portion in the second type epitaxial layer, the first type central well region extension portion being surrounded by the guard ring, wherein the first type central well region extension portion is in contact with the first type central well region body portion, and the ion implantation angle for forming the first type central well region extension portion is 3-15°;

[0020] A second type central well region is formed in the second type epitaxial layer. The second type central well region is located on a side of the first type central well region body away from the substrate and is surrounded by the first type central well region extension.

[0021] The present application provides a single-photon avalanche diode and a preparation method thereof, wherein the single-photon avalanche diode comprises a first-type central well region, a second-type central well region and a guard ring, wherein the first-type central well region comprises a first-type central well region body and a first-type central well region extension, wherein the first-type central well region extension is arranged on one side of the first-type central well region body in a first direction; the second-type central well region is arranged on one side of the first-type central well region body in the first direction, and the first-type central well region extension surrounds the second-type central well region; the guard ring surrounds the first-type central well region extension; wherein the first-type central well region body and the first-type central well region extension are in contact. In the single-photon avalanche diode provided by the present application, the first-type central well region extension in contact with the first-type central well region body can space the guard ring and the second-type central well region, thereby reducing the dark count rate of the single-photon avalanche diode, reducing noise, and improving the performance of the single-photon avalanche diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0023] Figure 1 A cross-sectional schematic diagram of a single-photon avalanche diode provided in an embodiment of the present application.

[0024] Figure 2 A schematic flow chart of a method for preparing a single-photon avalanche diode provided in an embodiment of the present application.

[0025] Figure 3a A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S01 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0026] Figure 3b A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S02 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0027] Figure 3c A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S03 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0028] Figure 3d A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S04 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0029] Figure 3e A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S05 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0030] Figure 3f A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S06 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0031] Figure 3g A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S07 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0032] Figure 3h A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S08 in the method for preparing the single-photon avalanche diode provided in an embodiment of the present application.

[0033] Description of reference numerals:

[0034] Single photon avalanche diode 10; substrate 11; second type epitaxial layer 12; guard ring 13; shallow trench isolation portion 14; first type deep well region 15; first type central well region 16; first type central well region body 161; first type central well region extension 162; second type central well region 17; first type edge well region 18; second type edge well region 19; polysilicon layer 20; first electrode M1; second electrode M2; third electrode M3; first surface K1; second surface K2; first thickness T1; second thickness T2; first width W; first side D; first direction X; DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. In addition, it should be understood that the specific implementation methods described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the directional words such as "upper" and "lower" used generally refer to the upper and lower parts of the device in actual use or working state, specifically the drawing direction in the accompanying drawings; while "inside" and "outside" refer to the outline of the device.

[0036] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the present application provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials. The following is described in detail respectively, and it should be noted that the description order of the following embodiments is not used as a limitation to the preferred order of the embodiments.

[0037] Figure 1 A cross-sectional schematic diagram of a single photon avalanche diode provided in an embodiment of the present application. Figure 1 As shown, in the first aspect, an embodiment of the present application provides a single-photon avalanche diode 10, which includes: a first-type central well region 16, a second-type central well region 17 and a guard ring 13, wherein the first-type central well region 16 includes a first-type central well region body 161 and a first-type central well region extension 162, wherein the first-type central well region extension 162 is arranged on one side of the first-type central well region body 161 in the first direction X; the second-type central well region 17 is arranged on one side of the first-type central well region body 161 in the first direction X, and the first-type central well region extension 162 surrounds the second-type central well region 17; the guard ring 13 surrounds the first-type central well region extension 162; wherein the first-type central well region body 161 and the first-type central well region extension 162 are in contact with each other.

[0038] In the single-photon avalanche diode 10 provided in the present application, since the first-type central well region extension 162 and the second-type central well region 17 are both arranged on the same side of the first-type central well region body 161, and the first-type central well region extension 162 surrounds the second-type central well region 17, and the guard ring 13 surrounds the first-type central well region extension 162, the guard ring 13 and the second-type central well region 17 can be separated by the first-type central well region extension 162. In addition, since the first-type central well region body 161 and the first-type central well region extension 162 are in contact, the noise can be derived through the first-type central well region extension 162, thereby reducing the dark count rate of the single-photon avalanche diode 10, reducing noise, and improving the performance of the single-photon avalanche diode 10. It should be noted that when the single-photon avalanche diode 10 includes a substrate, the first direction X is the direction in which the first-type central well region 16 is away from the substrate.

[0039] In some embodiments of the present application, the first-type central well region extension portion 162 is also in contact with the guard ring 13 .

[0040] In the single-photon avalanche diode 10 provided in some embodiments of the present application, since the first-type central well region extension portion 162 is also in contact with the guard ring 13 , it is beneficial to derive the noise.

[0041] In some embodiments of the present application, the doping concentration of the first type central well region extension portion 162 is less than the doping concentration of the first type central well region body portion 161 and the doping concentration of the second type central well region 17 .

[0042] In the single-photon avalanche diode 10 provided in some embodiments of the present application, since the doping concentration of the first-type central well region extension 162 is lower than the doping concentration of the first-type central well region body 161 and the doping concentration of the second-type central well region 17, a doping concentration difference can be formed between the first-type central well region body 161, the second-type central well region 17 and the first-type central well region extension 162, thereby improving the noise extraction efficiency of the first-type central well region extension 162. In addition, the first-type central well region extension 162 with a lower doping concentration can withstand a higher electric field, improve the withstand voltage capability of the surrounding area of ​​the guard ring 13, and enhance the device stability of the single-photon avalanche diode 10, and enable the first-type central well region extension 162 to have the ability to prevent lateral diffusion of the guard ring 13. When the first-type edge well region 18 is arranged on the side of the guard ring 13 away from the first-type central well region extension 162, a larger design margin can be provided between the first-type edge well region 18 and the second-type central well region 17, thereby achieving the effect of saving area.

[0043] Optionally, the doping concentration of the first type central well region extension portion 162 is less than 1×10 17 / cm 3 The doping concentration of the first type central well region body 161 is 1×10 16 / cm 3 ~1×10 18 / cm 3 The doping concentration of the second type central well region 17 is 1×10 16 / cm 3 ~1×10 18 / cm 3 Furthermore, the doping concentration of the first type central well region extension 162 is 1×10 x / cm 3 The doping concentration of the first type central well region body 161 is 1×10 y / cm 3 The doping concentration of the second type central well region 17 is 1×10 z / cm 3 ; and yx≥2; zx≥2, so as to ensure that the difference between the doping concentration of the first-type central well region extension 162 and the doping concentration of the first-type central well region main body 161 and the doping concentration of the second-type central well region 17 is more than two orders of magnitude, thereby further improving the noise extraction efficiency and voltage resistance of the first-type central well region extension 162.

[0044] In some embodiments of the present application, the surface of the second type central well region 17 on the side facing away from the first type central well region body 161 is a first surface K1; the surface of the first type central well region body 161 on the side of the second type central well region 17 is a second surface K2, wherein the area of ​​the first surface K1 is greater than the area of ​​the second surface K2.

[0045] In the single-photon avalanche diode 10 provided in some embodiments of the present application, the first-type central well region extension 162 can be formed by an ion implantation process. In order to facilitate the formation of the first-type central well region extension 162 with a lower doping concentration, the ion implantation angle of the ion implantation process needs to be controlled, and the ion implantation angle can be 3° to 15°. The present application makes the area of ​​the first surface K1 larger than the area of ​​the second surface K2, so that the morphology of the second-type central well region 17 formed after the first-type central well region extension 162 can be adapted to the ion implantation process.

[0046] Optionally, the orthographic projection of the second surface K2 on the first surface K1 is located within the region of the first surface K1, and the distance from the edge of the first surface K1 beyond the edge of the second surface K2 is within 0-0.5 microns. The larger the ion implantation angle, the greater the doping concentration of the first type central well region extension 162. Optionally, the ion implantation angle is 7° to 11°, preferably 9°.

[0047] In some embodiments of the present application, the area of ​​the surface of the second type central well region 17 on one side of the first type central well region body 161 is smaller than the area of ​​the second surface K2, so that the edge of the second surface K2 can exceed the edge of the surface of the second type central well region 17 on one side of the first type central well region body 161, so as to facilitate the contact between the first type central well region body 161 and the first type central well region extension 162.

[0048] In some embodiments of the present application, the first type central well region extension 162 includes a first side surface D adjacent to the second type central well region 17, wherein the cross-sectional shape of the first side surface D is an arc. It should be noted that due to actual process limitations, the arc is not necessarily a smooth arc, that is, based on the actual interface may have undulations, and the arc referred to includes an approximate arc.

[0049] In the single-photon avalanche diode 10 provided in some embodiments of the present application, a PN junction can be formed between the second type central well region 17 and the first type central well region extension 162. Since the cross-sectional shape of the first side surface D is an arc, the contact area between the first type central well region extension 162 and the second type central well region 17 can be increased, further improving the noise extraction capability of the first type central well region extension 162. It should be noted that due to actual process limitations, the arc is not necessarily a smooth arc, that is, based on the actual interface may have undulations, and the arc referred to includes an arc that is approximately an arc.

[0050] In some embodiments of the present application, in the first direction X, the maximum thickness of the first type central well region extension 162 is a first thickness T1, and the maximum thickness of the guard ring 13 is a second thickness T2, wherein the first thickness T1 ≥ the second thickness T2.

[0051] In the single-photon avalanche diode 10 provided in some embodiments of the present application, since the maximum thickness of the first-type central well region extension 162 is not less than the maximum thickness of the guard ring 13, that is, the doping depth of the first-type central well region extension 162 is the same as or even deeper than the doping depth of the guard ring 13, it is possible to improve the coverage of the guard ring 13 by the first-type central well region extension 162, improve the blocking ability of the guard ring 13 by the first-type central well region extension 162, and improve the noise extraction efficiency of the first-type central well region extension 162.

[0052] In some embodiments of the present application, in a direction parallel to the first surface K1, the maximum width of the first type central well region extension portion 162 is a first width W, wherein the first width W is 0.2 micrometers to 0.6 micrometers. Optionally, in a direction away from the first direction X, the width of the first type central well region extension portion 162 increases continuously, that is, the maximum width of the first type central well region extension portion 162 is the surface where the first type central well region extension portion 162 contacts the first type central well region body portion 161.

[0053] In the single photon avalanche diode 10 provided in some embodiments of the present application, in a direction parallel to the first surface K1, since the width of the surface where the first type central well region extension 162 contacts the first type central well region body 161 is in the range of 0.2 micrometers to 0.6 micrometers, it is possible to further improve the noise extraction efficiency of the first type central well region extension 162. Optionally, the first width W is 0.2 micrometers, 0.3 micrometers, 0.4 micrometers, 0.5 micrometers, 0.6 micrometers, etc.

[0054] In some embodiments of the present application, the single-photon avalanche diode 10 further includes: a polysilicon layer 20 , and an orthographic projection of the polysilicon layer 20 on the guard ring 13 at least partially overlaps with the guard ring 13 .

[0055] In the single-photon avalanche diode 10 provided in some embodiments of the present application, the polysilicon layer 20 and the guard ring 13 are arranged correspondingly. Optionally, the polysilicon layer 20 at least covers the boundary area between the guard ring 13 and the first type central well region extension portion 162.

[0056] In some embodiments of the present application, the single-photon avalanche diode 10 also includes a second type epitaxial layer 12, the second type epitaxial layer 12, the first type central well region body 161, the first type central well region extension 162, the second type central well region 17 and the guard ring 13 are all arranged in the second type epitaxial layer 12, and the surface of the second type epitaxial layer 12 in the first direction X is flush with the surfaces of the first type central well region extension 162, the second type central well region 17 and the guard ring 13 in the first direction X.

[0057] In some embodiments of the present application, the single photon avalanche diode 10 further includes a substrate 11, and the substrate 11 is disposed on a surface of the second type epitaxial layer 12 that is away from the first direction X. Optionally, the substrate 11 is a second type substrate.

[0058] In some embodiments of the present application, the single-photon avalanche diode 10 also includes a first type deep well region 15 arranged in the second type epitaxial layer 12, wherein the first type deep well region 15 is arranged on the surface of the first type central well region body 161 on the side away from the second type central well region 17.

[0059] In some embodiments of the present application, the single-photon avalanche diode 10 further includes a first-type edge well region 18 disposed in the second-type epitaxial layer 12, wherein the first-type edge well region 18 is disposed on one side of the first-type deep well region 15 in the first direction X, and the first-type edge well region 18 is disposed around the guard ring 13, the guard ring 13 can limit the lateral diffusion of the first-type edge well region 18, and the first-type central well region body 161 guides the noise in the guard ring 13 through the first-type edge well region 18. Optionally, the surface of the first-type edge well region 18 in the first direction X is flush with the surface of the second-type epitaxial layer 12 in the first direction X.

[0060] In some embodiments of the present application, the single-photon avalanche diode 10 further includes a shallow trench isolation portion 14 disposed in the second-type epitaxial layer 12 , wherein the shallow trench isolation portion 14 is disposed around the first-type edge well region 18 .

[0061] In some embodiments of the present application, the single photon avalanche diode 10 further includes a second type edge well region 19 disposed in the second type epitaxial layer 12 , wherein the second type edge well region 19 is disposed around the shallow trench isolation 14 .

[0062] In some embodiments of the present application, the single-photon avalanche diode 10 also includes a first electrode M1, a second electrode M2, and a third electrode M3. The first electrode M1 is arranged on the surface of the second type central well region 17 on one side of the first direction X, that is, the first electrode M1 is arranged on the first surface K1; the second electrode M2 ​​is arranged on the surface of the first type edge well region 18 on one side of the first direction X; the third electrode M3 is arranged on the surface of the second type edge well region 19 on one side of the first direction X.

[0063] In some embodiments of the present application, the first type is one of N-type and P-type, and the second type is the other of N-type and P-type.

[0064] In a second aspect, an embodiment of the present application also provides a method for preparing a single-photon avalanche diode. Figure 2 A schematic diagram of a process for preparing a single photon avalanche diode according to an embodiment of the present invention, combined with Figure 1 and Figure 2 As shown, the method for preparing the single photon avalanche diode 10 includes step S01, step S02, step S03, step S04, step S05 and step S06.

[0065] Figure 3a A cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S01 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3a As shown, step S01 includes: providing a substrate 11 .

[0066] Figure 3b A cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S02 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3b As shown, step S02 includes: growing a second type epitaxial layer 12 on the substrate 11 .

[0067] Figure 3c A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S03 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3c As shown, step S03 includes: forming a guard ring 13 in the second type epitaxial layer 12 .

[0068] Figure 3d A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S04 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3d As shown, step S04 includes: forming a first type central well region body portion 161 in the second type epitaxial layer 12 .

[0069] Figure 3e A schematic cross-sectional view of a single-photon avalanche diode corresponding to step S05 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3e As shown, step S05 includes: forming a first type of central well region extension 162 in the second type epitaxial layer 12, the first type of central well region extension 162 being surrounded by the guard ring 13, wherein the first type of central well region extension 162 is in contact with the first type of central well region main body 161, and the ion implantation angle of the first type of central well region extension 162 is 3-15°.

[0070] Figure 3f A cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S06 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3f As shown, step S06 includes: forming a second type central well region 17 in the second type epitaxial layer 12, the second type central well region 17 is located on the side of the first type central well region body 161 away from the substrate 11, and the second type central well region 17 is surrounded by the first type central well region extension 162.

[0071] Continue to refer to Figure 3cIn some embodiments of the present application, the step S03 includes: forming a guard ring 13 and a shallow trench isolation portion 14 in the second type epitaxial layer 12. Exemplarily, the step of forming the guard ring 13 and the shallow trench isolation portion 14 in the second type epitaxial layer 12 includes: etching a groove structure in the second type epitaxial layer 12, and filling the groove structure with silicon dioxide to form the guard ring 13 and the shallow trench isolation portion 14.

[0072] Continue to refer to Figure 3d In some embodiments of the present application, the step S04 also includes: forming a first type deep well region 15 in the second type epitaxial layer 12, and after the first type deep well region 15 is formed, forming the first type central well region body 161.

[0073] Figure 3g A cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S07 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3g As shown, in some embodiments of the present application, the method for preparing the single-photon avalanche diode 10 includes step S07 , and step S07 includes: forming a first type edge well region 18 and a second type edge well region 19 in the second type epitaxial layer 12 .

[0074] Figure 3h A cross-sectional schematic diagram of a single-photon avalanche diode corresponding to step S08 in the method for preparing a single-photon avalanche diode provided in an embodiment of the present application. Figure 1 , Figure 2 and Figure 3h As shown, in some embodiments of the present application, the method for preparing the single-photon avalanche diode 10 includes step S08, and step S08 includes: performing an annealing process, and forming a polysilicon layer 20 on the guard ring 13, forming a first electrode M1 on the second type central well region 17, forming a second electrode M2 ​​on the first type edge well region 18, and forming a third electrode M3 on the second type edge well region 19.

[0075] In summary, the present application provides a single-photon avalanche diode and a preparation method thereof, wherein the single-photon avalanche diode comprises a first-type central well region, a second-type central well region and a guard ring, wherein the first-type central well region comprises a first-type central well region body and a first-type central well region extension, wherein the first-type central well region extension is arranged on one side of the first-type central well region body in a first direction; the second-type central well region is arranged on one side of the first-type central well region body in the first direction, and the first-type central well region extension surrounds the second-type central well region; the guard ring surrounds the first-type central well region extension; wherein the first-type central well region body and the first-type central well region extension are in contact. In the single-photon avalanche diode provided by the present application, the first-type central well region extension in contact with the first-type central well region body can space the guard ring and the second-type central well region, thereby reducing the dark count rate of the single-photon avalanche diode, thereby reducing noise and improving the performance of the single-photon avalanche diode.

[0076] The above is a detailed introduction to a single-photon avalanche diode and a preparation method thereof provided in some embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A single photon avalanche diode, characterized in that: The single photon avalanche diode comprises: A first type central well region, comprising a first type central well region body portion and a first type central well region extension portion, wherein the first type central well region extension portion is arranged on one side of the first type central well region body portion in a first direction; A second type of central well region is disposed on one side of the first type of central well region body in the first direction, and the first type of central well region extension portion surrounds the second type of central well region; a guard ring surrounding the first type central well region extension; Wherein, the first type central well region body portion and the first type central well region extension portion are in contact with each other.

2. The single photon avalanche diode according to claim 1, characterized in that: The doping concentration of the first-type central well region extension portion is less than the doping concentration of the first-type central well region body portion and the doping concentration of the second-type central well region.

3. The single photon avalanche diode according to claim 2, characterized in that: The surface of the second type central well region on the side away from the first type central well region body is a first surface; the surface of the first type central well region body on the side of the second type central well region is a second surface, wherein the area of ​​the first surface is greater than the area of ​​the second surface.

4. The single photon avalanche diode according to claim 3, characterized in that: The first-type central well region extension portion includes a first side surface adjacent to the second-type central well region, wherein a cross-sectional shape of the first side surface is an arc shape.

5. The single photon avalanche diode according to claim 3, characterized in that: In the first direction, the maximum thickness of the first type central well region extension portion is a first thickness, and the maximum thickness of the guard ring is a second thickness, wherein the first thickness is ≥ the second thickness.

6. The single photon avalanche diode according to claim 3, characterized in that: In a direction parallel to the first surface, the maximum width of the first type central well region extension portion is a first width, wherein the first width is 0.2 micrometers to 0.6 micrometers.

7. The single photon avalanche diode according to claim 2, characterized in that: The doping concentration of the first type central well region extension is less than 1×10 17 / cm 3 .

8. The single photon avalanche diode according to claim 2, characterized in that: The doping concentration of the main body of the first type central well region is 1×10 16 / cm 3 ~1×10 18 / cm 3 The doping concentration of the second type central well region is 1×10 16 / cm 3 ~1×10 18 / cm 3 .

9. The single photon avalanche diode according to claim 4, characterized in that: The single-photon avalanche diode further includes a polysilicon layer, wherein an orthographic projection of the polysilicon layer on the guard ring at least partially overlaps with the guard ring.

10. A method for preparing a single photon avalanche diode, characterized in that: The preparation method of the single photon avalanche diode comprises the following steps: providing a substrate; growing a second type epitaxial layer on the substrate; forming a guard ring in the second type epitaxial layer; forming a first type central well region body portion in the second type epitaxial layer; forming a first type central well region extension portion in the second type epitaxial layer, the first type central well region extension portion being surrounded by the guard ring, wherein the first type central well region extension portion is in contact with the first type central well region body portion, and the ion implantation angle for forming the first type central well region extension portion is 3-15°; A second type central well region is formed in the second type epitaxial layer. The second type central well region is located on a side of the first type central well region body away from the substrate and is surrounded by the first type central well region extension.

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