Chip register description document generation method and device, storage medium and terminal equipment

Abstract

The embodiment of the invention discloses a chip register description document generation method and device, a storage medium and terminal equipment, and relates to the field of document processing. The method comprises the following steps: analyzing a register attribute table file of a chip, and determining each functional module included in the chip and a register included in each functional module according to an analysis result; querying an associated register description template document according to the model of the chip; extracting field values corresponding to fields in the register list display area and the register description display area from the register attribute table file, and filling the read field values into a register description template document to generate a register description document of the chip, the problems that in the prior art, compiling of the chip register description document is low in efficiency, prone to errors and poor in timeliness are effectively solved, and a more efficient, accurate and reliable method is provided for compiling and managing the chip document.

Description

Technical Field

[0001] The present application relates to the field of document processing, and in particular to a method, device, storage medium and terminal device for generating a chip register description document. Background Art

[0002] The register description of the chip is of great importance to customers and is the key basis for customers to understand and use the chip. Before writing the register description document of the chip, the document engineer will first have in-depth communication with the R&D personnel, or carefully read the R&D record documents to fully and accurately understand the register information of the chip. Subsequently, the document engineer will manually organize and compile this information to form a register description document. However, this manual document writing method is not only time-consuming and labor-intensive, but also prone to omissions or errors due to human factors.

[0003] During the development of a chip, functions often change frequently. Once the chip function is updated, if the R&D personnel fail to inform the documentation engineer of the change in time, the chip register description document may be out of sync with the actual function of the chip. This asynchrony will not only cause trouble to customers, but may also have an adverse impact on the market promotion and application of the chip. Summary of the invention

[0004] The embodiments of the present application provide a method, device, storage medium and terminal device for generating a chip register description document, which can solve the problems of low efficiency, error-proneness and delay in compiling chip register description documents in the prior art. The technical solution is as follows:

[0005] In a first aspect, an embodiment of the present application provides a method for generating a chip register description document, the method comprising:

[0006] Parsing the register attribute table file of the chip, and determining each functional module included in the chip and the registers included in each functional module according to the parsing result;

[0007] Query the associated register description template document according to the model of the chip; wherein the register description template document includes: a register list display area and a register description display area; the register list display area is divided into a plurality of list display sub-areas according to the number of parsed functional modules, and each list display sub-area includes: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into a plurality of description display sub-areas according to the number of parsed functional modules, and each description display sub-area includes fields of each register in the functional module: name, offset address, default value, serial number of register bit, domain of register bit, read and write attributes of register bit and default value of register bit;

[0008] The field values ​​corresponding to the fields in the register list display area and the register description display area are extracted from the register attribute table file, and the register description document of the chip is generated after the read field values ​​are filled into the register description template document.

[0009] In a second aspect, an embodiment of the present application provides a device for generating a chip register description document, the device comprising:

[0010] A parsing unit, used for parsing a register attribute table file of a chip, and determining each functional module included in the chip and the registers included in each functional module according to the parsing result;

[0011] A query unit, used for querying the associated register description template document according to the model of the chip; wherein the register description template document comprises: a register list display area and a register description display area; the register list display area is divided into a plurality of list display sub-areas according to the number of parsed functional modules, each list display sub-area comprising: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into a plurality of description display sub-areas according to the number of parsed functional modules, each description display sub-area comprising fields of each register in the functional module: name, offset address, default value, serial number of register bit, domain of register bit, read and write attributes of register bit and default value of register bit;

[0012] A generating unit is used to extract the field values ​​corresponding to each field in the register list display area and the register description display area in the register attribute table file, and to generate a register description document of the chip after filling the read field values ​​into the register description template document.

[0013] In a third aspect, an embodiment of the present application provides a computer storage medium, wherein the computer storage medium stores a plurality of instructions, wherein the instructions are suitable for being loaded by a processor and executing the above-mentioned method steps.

[0014] In a fourth aspect, an embodiment of the present application provides a terminal device, which may include: a processor and a memory; wherein the memory stores a computer program, and the computer program is suitable for being loaded by the processor and executing the above-mentioned method steps.

[0015] The beneficial effects brought about by the technical solutions provided by some embodiments of the present application include at least:

[0016] In the prior art, document engineers need to manually organize and compile register description documents, which is a time-consuming and cumbersome process. However, this technical solution automatically parses the register attribute table file, quickly and accurately extracts register information, and automatically fills it into the register description template document, thereby greatly shortening the document preparation time and improving work efficiency.

[0017] Manually written documents are prone to omissions or errors due to human factors. This technical solution reduces human intervention through automated processing, thereby effectively reducing the error rate. At the same time, since all information comes from the register attribute table file, the consistency of the document content and the actual function of the chip is ensured.

[0018] During chip development, functions change frequently. In traditional methods, if R&D personnel fail to inform document engineers of function changes in a timely manner, the document may be out of sync with the actual chip function. However, this technical solution generates documents by parsing the latest register attribute table file, ensuring the timeliness and synchronization of the document. Even if the chip function is updated, it can be quickly reflected in the register description document.

[0019] Through the well-designed register description template document, this technical solution displays the register information in a structured way, including the register list display area and the register description display area, as well as the detailed field information in each sub-area. This display method makes the document clearer and easier to read, making it easier for customers to quickly understand and use the chip registers. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1It is a flowchart of a method for generating a chip register description document provided in an embodiment of the present application;

[0022] Figure 2 It is a schematic diagram of the contents of the control panel sub-table in the register attribute table file provided in an embodiment of the present application;

[0023] Figure 3 It is a schematic diagram of the contents of a memory allocation sub-table in a register attribute table file provided in an embodiment of the present application;

[0024] Figure 4 It is a schematic diagram of the contents of the attribute sub-table of the functional module in the register attribute table file provided in an embodiment of the present application;

[0025] Figure 5 It is a schematic diagram of the contents of a register description template document provided in an embodiment of the present application;

[0026] Figure 6 It is a schematic diagram of the contents of a register description document provided in an embodiment of the present application;

[0027] Figure 7 It is a structural schematic diagram of a device for generating a chip register description document provided by the present application;

[0028] Figure 8 It is a structural schematic diagram of a terminal device provided by this application. DETAILED DESCRIPTION

[0029] In order to make the objectives, technical solutions and advantages of the present application more clear, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.

[0030] It should be noted that the method for generating a chip register description document provided in the present application is generally executed by a terminal device, and accordingly, the device for generating a chip register description document is generally arranged in the terminal device.

[0031] The following will be combined with the attached Figure 1 , a method for generating a chip register description document provided in an embodiment of the present application is introduced in detail. Among them, the chip register description document generation device in the embodiment of the present application can be Figure 1 The terminal device shown.

[0032] See also Figure 1 , which is a flow chart of a method for generating a chip register description document according to an embodiment of the present application. Figure 2 As shown, the method of the embodiment of the present application may include the following steps:

[0033] S101, parsing the register attribute table file of the chip, and determining each functional module included in the chip and the register included in each functional module according to the parsing result.

[0034] Among them, the register attribute table file is maintained and filled in by the R&D personnel. The terminal device first reads the register attribute table file of the chip through the file system interface (such as Python's open function) or the network protocol (such as HTTP). After the file is read, according to the format of the file (such as CSV, Excel, XML, etc.), the terminal device selects the corresponding parsing library for preprocessing. For example, for CSV files, the csv module can be used; for Excel files, the openpyxl library can be used. The preprocessing steps may include decoding the file content (such as reading from UTF-8 encoded text), loading the file into memory, and preparing the context required for parsing. The terminal device uses the parsing library to traverse each row and column of the table to extract the relevant information of the register. The extracted information includes: the base address, offset, instance address (if applicable), name, default value, and description of the register. For some complex table formats, additional logic may be required to handle merged cells, nested structures, or special tags. The terminal device identifies different functional modules based on specific fields (such as the "Functional Module" column) or structures (such as grouped rows) in the table. For each functional module, the terminal device creates a data structure (such as a dictionary, object, or custom class) to store all register information under the module. Register information is stored in the form of key-value pairs, where the key is the name of the register and the value is a dictionary or object containing fields such as base address, offset, instance address, default value, description, etc. The terminal device verifies the extracted data to ensure that all necessary fields have been correctly extracted and in the correct format. If data is found to be missing or in the wrong format, the terminal device may record an error log, prompt the user to correct it, or automatically fill in some reasonable default values. Cleaning data may include removing blank lines, processing duplicates, or standardizing field values.

[0035] S102: Query the associated register description template document according to the chip model.

[0036] Among them, the register description template document is maintained and configured by the document engineer. The terminal device extracts the chip model from the register attribute table file parsed in step S101 or the configuration information entered by the user. The model may be expressed in a variety of formats, such as a string with a prefix, suffix, version number or special characters. The terminal device applies a set of standardized rules to clean and format the model string to ensure that it matches the records in the template document database. For example, remove spaces, convert uppercase and lowercase, extract core models, etc. The terminal device is connected to a local or remote template document database. The database may be a relational database (such as MySQL, PostgreSQL), a NoSQL database (such as MongoDB), or a simple file storage system. Using the standardized chip model as a query condition, the terminal device performs a database query operation. The query may involve SQL statements, MongoDB query statements, or calls specific to database APIs. If the database supports full-text search or fuzzy matching functions, the terminal device can use these functions to improve the flexibility and accuracy of the query. The query result may return multiple template documents related to the chip model. These documents may vary depending on the version, manufacturer, or specific requirements. The terminal device applies a set of matching rules to select the most appropriate template document. Matching rules may be based on version number, manufacturer, release date, user preference, or support for specific features. If there are multiple highly similar template documents, the terminal device may prompt the user to select or automatically select the latest version, the most commonly used, or the default recommended template document. If the selected template document is stored on a remote server, the terminal device downloads the document via HTTP, FTP, or other network protocols. During the download process, the terminal device may apply a compression algorithm (such as gzip) to reduce the amount of transmitted data, and use the breakpoint resume function to ensure the reliability of the download process. After the download is complete, the terminal device saves the template document to the local file system or memory cache for subsequent parsing and use. If the template document already exists in the local cache and meets the usage requirements (such as version matching, not expired, etc.), the terminal device can load the document directly from the cache to reduce network requests and download time.

[0037] Before loading a template document, the terminal device checks the integrity and format correctness of the document. This may involve verifying the file's hash value, signature, or performing a simple format check. If the document format does not match expectations or is at risk of being damaged, the terminal device may record an error log, prompt the user to download a new document, or automatically try to obtain the correct template document from other sources. Prepare the context required for parsing, such as loading necessary parsing libraries, setting character encoding, and configuring error handling strategies.

[0038] Among them, the register description template document includes: a register list display area and a register description display area; the register list display area is divided into multiple list display sub-areas according to the number of parsed functional modules, one functional module corresponds to one list display sub-area, and each list display sub-area includes: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into multiple description display sub-areas according to the number of parsed functional modules, one functional module corresponds to one description display sub-area, and each description display sub-area includes fields of each register in the functional module: name, offset address, default value, register bit sequence number, register bit domain, register bit read and write attributes and register bit default value.

[0039] The terminal device uses the parsing library corresponding to the template document format for parsing. The parsing process may involve steps such as traversing the document structure, extracting field values, and building internal data structures. During the parsing process, the terminal device identifies the register list display area and register description display area in the template document, as well as the sub-areas and fields under each area. These fields may include the function module name, register name, offset address, default value, description, etc. The list display sub-area is used to display the basic information list of each register in the function module. Each list display sub-area contains the fields of all registers under the function module, such as base address, offset, instance address (if applicable), name, default value, and possible brief description. These fields are presented in the form of a list, which is convenient for quickly browsing and finding information about a specific register. Each description display sub-area also contains the fields of all registers under the function module, but focuses more on the detailed properties of the register, such as name, offset address, default value, register bit number, register bit domain (that is, the meaning represented by each bit), register bit read and write attributes (read-only, write-only, read and write) and register bit default value, etc. For complex template document structures (such as nested elements, attributes, arrays, etc.), the terminal device applies additional logic to correctly parse and extract information.

[0040] S103, extracting the field values ​​corresponding to the fields in the register list display area and the register description display area from the register attribute table file, and filling the read field values ​​into the register description template document to generate a register description document of the chip.

[0041] Among them, the terminal device traverses the function module and register mapping data structure constructed in step S101, and extracts the information of each function module and register. For each register, the terminal device searches for the corresponding list display sub-area and description display sub-area in the template document data structure parsed in step S102. The matching process may be based on the name, address or other unique identifier of the register. The terminal device fills the extracted register information into the corresponding field of the template document data structure. The filling process may involve copying the basic information of the register (such as name, offset address, default value) to the corresponding field of the template document. For the information of the register bit (such as serial number, domain, read-write attributes, default value, etc.), the terminal device may need additional logic to parse and fill this information. If there are unfilled fields or values ​​that require additional calculation (such as calculation of register address) in the template document, the terminal device may perform corresponding calculations or logical processing.

[0042] See also Figure 6 The figure is a schematic diagram of the contents of a register description document provided in an embodiment of the present application.

[0043] After filling, the terminal device serializes the template document data structure into its original format (such as XML, JSON) or converts it into a format suitable for reading (such as HTML, PDF). The serialization process may involve converting the data structure into a string representation and applying appropriate formatting and indentation. For HTML or PDF formats, the terminal device may use additional libraries (such as jinja2 for HTML template rendering and reportlab for PDF generation) to generate the final document. The terminal device verifies the generated register description document to ensure that all fields are correctly filled and in the correct format. If any problems are found (such as missing fields, format errors, or inconsistent data), the terminal device may record error logs, prompt the user to correct them, or automatically perform some reasonable correction operations. The terminal device saves the generated register description document to a specified location, such as a local file system, a remote server, or a cloud storage. As needed, the terminal device can also send the document to relevant personnel through email, instant messaging tools, etc. When saving, the terminal device may apply an appropriate file name and extension to facilitate identification and access to the generated document.

[0044] In some embodiments of the present application, see Figure 2 The schematic diagram of the register attribute table file shown in the figure includes: ControlPanel control panel sub-table, memory allocation sub-table and attribute sub-tables of each functional module. Figure 2The functional modules in the chip are SPI and UART. The control panel sub-table includes a trigger button Check data, the functional module list (peripheral name list) includes each functional module included in the chip and the registers included in each functional module, and the trigger button is used to perform parsing of the register table of the chip based on the user's trigger operation.

[0045] See also Figure 3 The schematic diagram of the memory allocation sub-table shown in the figure shows the memory mapping relationship of the registers included in each functional module. The memory allocation sub-table includes bus information (Bus), boundary address information (BoundaryAddress), size information (Size, unit Bytes), peripheral information (Peripheral) and corresponding module name information.

[0046] See also Figure 4 The schematic diagram of the SPI attribute sub-table shown in the figure includes: Offset offset, RegName register name, RegDescription register description, bit bit, field domain, RW read and write, default default value, and Description description.

[0047] The terminal device needs to parse a register attribute table file containing multiple sub-tables, which together describe the detailed information of each functional module on the chip and the registers contained therein.

[0048] Subtable 1: ControlPanel control panel subtable

[0049] Function: Provides a user interaction interface, allowing the user to perform operations to parse the chip's register table by triggering buttons.

[0050] Trigger button (Check data): When the user clicks this button, the terminal device will start parsing the register attribute table file and generate a register description document based on the file content.

[0051] Function module list (peripheral name list): lists all function modules (such as SPI, UART, etc.) contained in the chip and their corresponding registers. This list may be used to display on the user interface for users to select the function modules they need to view or configure.

[0052] Subtable 2: Memory allocation subtable.

[0053] Function: Describes the memory mapping relationship of registers in each functional module, that is, the location and size of each register in the memory.

[0054] Bus information (Bus): Indicates the bus type to which the register belongs (such as AHB, APB, etc.).

[0055] Boundary address information (BoundaryAddress): the starting address or boundary address of the register.

[0056] Size information (Size, unit Bytes): the size of the register, in bytes.

[0057] Peripheral information: The peripheral name or functional module name associated with the register.

[0058] Corresponding module name information: may be used to further identify or classify the functional module to which the register belongs.

[0059] Subtable 3: Attribute subtable of each functional module (taking SPI as an example, see Figure 4 )

[0060] Function: Describes in detail the properties of each register in each functional module, including name, offset, description, bit information, read / write properties, default value, etc.

[0061] Offset: The offset of a register relative to the base address of its functional module.

[0062] RegNameRegister Name: Unique identifier of the register.

[0063] RegDescription Register Description: A brief description of the register.

[0064] bit: The number of each bit in the register.

[0065] field: The field name or function represented by each bit or a group of bits in the register.

[0066] RW read and write: the read and write attributes of the register, the read and write attributes include: read and write (R / W), the software can read and write these bits; read only (R), the software can only read these bits; write only (W), the software can only write this bit, and the reset value will be returned when reading this bit; read clear 0 (RC / W), the software can read and write this bit, and it will be automatically cleared when reading this bit; write clear 0 (R / WAC), the software can read and write this bit, and it will be automatically cleared when writing 0 or 1; write 1 to clear 0 (R / W1C), the software can read and write this bit, and it will be automatically cleared when writing 1; write 0 to clear 0 (R / W0C), the software can read and write this bit, and it will be automatically cleared when writing 0; write 1 to set 1 (R / W1S); the software can read and write this bit, and it is set when writing 1, and the write 0 operation is invalid.

[0067] default: The default value of a register after it is reset.

[0068] Description: A detailed description of the register and its fields.

[0069] In some embodiments of the present application, the terminal device locks a specified area in the attribute subtable and skips the specified area when extracting field values ​​in the attribute subtable.

[0070] Among them, the reasons for locking specified areas include: Protecting sensitive information: The attribute subtable may contain some sensitive information, such as specific register values ​​or configurations, which may not need to be disclosed or exposed to the end user when generating the register description document. Or avoiding conflicts or errors: In some cases, some areas in the attribute subtable may contain information that conflicts with other areas, or this information is not applicable in the current context. Locking these areas can avoid introducing errors or inconsistencies when generating documents. Or reserving unused or reserved registers: The chip design may contain some unused or reserved registers that may be used in future versions or configurations. Locking these registers can avoid including them in the current register description document, thereby keeping the document concise and accurate.

[0071] In the attribute subtable, specific tags or identifiers can be used to indicate which areas or fields should be locked. These tags can be text comments, specific field values, or special row formats. The terminal device may use an external configuration file to specify which areas or fields should be locked. This configuration file can be a simple text file, XML file, JSON file, etc., which contains a list of locked areas or fields and related information. In some cases, the terminal device may provide a user interface that allows the user to manually select which areas or fields should be locked. This can be achieved through check boxes, drop-down menus, or other interactive elements.

[0072] When extracting the field values ​​in the attribute subtable, the terminal device checks whether each field or area is locked. If a field or area is locked, the terminal device will skip it and continue to process the next field or area. This means that the information of the locked field or area will not be included in the generated register description document.

[0073] In some embodiments of the present application, the description display sub-area of ​​the functional module is provided with a hyperlink address of the word list display sub-area associated with the functional module.

[0074] Among them, by setting a hyperlink address with the word list display sub-area in the description display sub-area, the following functions can be realized:

[0075] Users can quickly jump to the word list display sub-area associated with the function module by clicking on the hyperlink in the description display sub-area. In this way, users can easily switch between the two areas and conveniently view the detailed description and register information of the function module. By providing hyperlinks, the terminal device can provide users with a more intuitive and easy-to-use interface. Users do not need to manually scroll or search documents to find relevant register information, but can quickly locate the required content by simply clicking on the hyperlink.

[0076] To implement this function, the terminal device can take the following steps:

[0077] The terminal device needs to parse the register description template document and identify the location and content of the description display sub-area and the word list display sub-area. Then, the terminal device needs to insert a hyperlink address associated with the word list display sub-area in the description display sub-area. This address can be a relative path or an absolute path, depending on the structure and storage method of the template document. Finally, when the user triggers the operation of generating a register description document, the terminal device generates a complete document containing hyperlinks based on the template document and the parsed register information.

[0078] In some embodiments of the present application, the VBA code added in the register attribute table file is called to extract the corresponding field value, and the VBA code in the register description template document is called to generate the register description document.

[0079] Among them, in the register attribute table file, VBA code may be embedded for automatic extraction and processing of data. These codes may contain functions, subroutines or macros, which can read specific cells or areas in the table and extract the required field values ​​according to preset logic. When the terminal device executes step S103, it triggers the VBA code in the register attribute table file. This may be achieved by opening the table file and running a specific macro or calling a specific function. The VBA code traverses the relevant areas in the table and extracts field values ​​according to preset rules and logic. These field values ​​may include the name, offset, description, read-write properties, etc. of the register.

[0080] The register description template document may also contain VBA code that is used to automate the generation of various parts of the document. This code may fill in the placeholders in the template based on the extracted field values ​​to generate a complete register description document. After extracting the field values, the terminal device opens the register description template document and calls the VBA code in it. This may be achieved by running a specific macro or calling a specific function that receives the field values ​​extracted from the register attribute table file as input. The VBA code automatically generates a complete register description document based on the input field values ​​and the structure of the template document. This may include filling in tables, generating text descriptions, inserting charts, etc.

[0081] Prior to S101, it also included:

[0082] Edit the register attribute table file in the Excel document and save the edited register table;

[0083] Edit the register description template document in the word document, and save the edited register description template document.

[0084] Among them, the terminal device (such as a computer) first opens a new or existing Excel document, which will be used to edit the register attribute table file. In the Excel document, the user creates or edits the register attribute table as needed. This table should contain all necessary information, such as function module name, register name, offset address, read-write attributes, default values, etc. Users can use Excel cells, rows, and columns to organize this information. Depending on the needs, users can embed VBA (Visual Basic for Applications) code in the Excel document. These codes can be used to automatically extract field values, verify data integrity, or perform other custom functions. After completing the editing, the user needs to save the Excel document. This document now contains the edited register attribute table and may also include VBA code.

[0085] The terminal device then opens a new or existing Word document that will be used to edit the register description template document. In the Word document, the user designs a template that will be used to generate the final register description document. The template should contain placeholders or tags that will be replaced with the actual register information in subsequent steps. Similarly, the user can embed VBA code in the Word document. This code can be used to automate the document generation process, such as inserting register information, formatting the document, or performing other customized operations. After completing the editing, the user needs to save the Word document. This document now contains the edited register description template and may also include VBA code. See Figure 5 As shown, Figure 5 A schematic diagram of the contents of a register description template file provided in an embodiment of the present application.

[0086] The embodiments of the present application specifically include the following beneficial effects when generating a register description document of a chip:

[0087] Significantly improve compilation efficiency: Traditionally, document engineers need to manually organize and compile register description documents, which is a time-consuming and tedious process. However, this technical solution automatically parses the register attribute table file, quickly and accurately extracts register information, and automatically fills it into the register description template document, thereby greatly shortening the document compilation time and improving work efficiency.

[0088] Significantly reduce the error rate: Manually written documents are prone to omissions or errors due to human factors. This technical solution reduces human intervention through automated processing, thereby effectively reducing the error rate. At the same time, since all information comes from the register attribute table file, the consistency of the document content and the actual function of the chip is ensured.

[0089] Enhance the timeliness and synchronization of documents: During the chip development process, functions change frequently. In the traditional way, if the R&D personnel fail to inform the document engineer of the function change information in time, it may cause the document to be out of sync with the actual chip function. However, this technical solution generates documents by parsing the latest register attribute table file, ensuring the timeliness and synchronization of the documents. Even if the chip function is updated, it can be quickly reflected in the register description document.

[0090] Improve document readability and ease of use: Through a carefully designed register description template document, this technical solution displays register information in a structured manner, including a register list display area and a register description display area, as well as detailed field information in each sub-area. This display method makes the document clearer and easier to read, making it easier for customers to quickly understand and use the chip's registers.

[0091] The following are device embodiments of the present application, which can be used to execute the method embodiments of the present application. For details not disclosed in the device embodiments of the present application, please refer to the method embodiments of the present application.

[0092] See also Figure 7 , which shows a schematic diagram of the structure of a device for generating a chip register description document provided by an exemplary embodiment of the present application, hereinafter referred to as device 7. The device 7 can be implemented as all or part of a terminal device through software, hardware, or a combination of both. The device 7 includes: a parsing unit 701, a query unit 702, and a generating unit 703.

[0093] The parsing unit 701 is used to parse the register attribute table file of the chip, and determine each functional module included in the chip and the register included in each functional module according to the parsing result;

[0094] A query unit 702 is used to query the associated register description template document according to the model of the chip; wherein the register description template document includes: a register list display area and a register description display area; the register list display area is divided into a plurality of list display sub-areas according to the number of parsed functional modules, and each list display sub-area includes: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into a plurality of description display sub-areas according to the number of parsed functional modules, and each description display sub-area includes fields of each register in the functional module: name, offset address, default value, register bit sequence number, register bit domain, register bit read and write attributes and register bit default value;

[0095] The generation unit 703 is used to extract the field values ​​corresponding to each field in the register list display area and the register description display area in the register attribute table file, and to fill the read field values ​​into the register description template document to generate the register description document of the chip.

[0096] In one or more possible embodiments, the register attribute table file includes: a control panel sub-table, a memory allocation sub-table, and an attribute sub-table of each functional module included in the chip.

[0097] The control panel sub-table includes a function module list and a trigger button, wherein the function module list includes each function module included in the chip and the registers included in each function module, and the trigger button is used to execute the register table of the parsing chip based on the user's trigger operation;

[0098] The memory allocation sub-table includes: bus information, boundary address information, size information, peripheral information, and module name information;

[0099] The attribute subtable includes: offset, register name, register description, bit, field, RW read / write, default value, and description.

[0100] In one or more possible embodiments, a designated area in the attribute subtable is locked, and the designated area is skipped when extracting field values ​​in the attribute subtable.

[0101] In one or more possible embodiments, data verification is performed on the read field value, and filling is performed after passing the verification.

[0102] In one or more possible embodiments, the description display sub-area of ​​the function module is provided with a hyperlink address of the word list display sub-area associated with the function module.

[0103] In one or more possible embodiments, the VBA code added in the register attribute table file is called to extract the corresponding field value, and the VBA code in the register description template document is called to generate the register description document.

[0104] In one or more possible embodiments, it further includes:

[0105] Configuration unit, used to edit register attribute table file in Excel document and save the edited register table;

[0106] Edit the register description template document in the word document, and save the edited register description template document.

[0107] It should be noted that, when the device 4 provided in the above embodiment executes the method for generating a chip register description document, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above functions. In addition, the device for generating a chip register description document provided in the above embodiment and the embodiment of the method for generating a chip register description document belong to the same concept, and the implementation process thereof is detailed in the method embodiment, which will not be repeated here.

[0108] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0109] The present application also provides a computer storage medium, which can store multiple instructions, and the instructions are suitable for being loaded and executed by a processor as described above. Figure 1 The method steps of the embodiment shown in the figure can be found in the specific implementation process. Figure 2 The specific description of the illustrated embodiment will not be repeated here.

[0110] The present application also provides a computer program product, which stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the method for generating a chip register description document as described in the above embodiments.

[0111] See also Figure 8 , which is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application. Figure 8As shown, the terminal device 800 may include: at least one processor 801 , at least one network interface 804 , a user interface 803 , a memory 805 , and at least one communication bus 802 .

[0112] The communication bus 802 is used to realize the connection and communication between these components.

[0113] The user interface 803 may include a display screen (Display) and a camera (Camera), and the optional user interface 803 may also include a standard wired interface and a wireless interface.

[0114] The network interface 804 may optionally include a standard wired interface or a wireless interface (such as a WI-FI interface).

[0115] Among them, the processor 801 may include one or more processing cores. The processor 801 uses various interfaces and lines to connect various parts within the entire terminal device 800, and executes various functions and processes data of the terminal device 800 by running or executing instructions, programs, code sets or instruction sets stored in the memory 805, and calling data stored in the memory 805. Optionally, the processor 801 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 801 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU) and a modem. Among them, the CPU mainly processes the operating system, user interface and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen; the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 801, and it can be implemented separately through a chip.

[0116] Among them, the memory 805 may include a random access memory (Random Access Memory, RAM) and may also include a read-only memory (Read-Only Memory). Optionally, the memory 805 includes a non-transitory computer-readable storage medium. The memory 805 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 805 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned method embodiments, etc.; the data storage area may store data involved in the above-mentioned method embodiments, etc. The memory 805 may optionally be at least one storage device located away from the aforementioned processor 801. As Figure 8 As shown, the memory 805 as a computer storage medium may include an operating system, a network communication module, a user interface module, and an application program.

[0117] exist Figure 8 In the terminal device 800 shown in FIG. 1 , the user interface 803 is mainly used to provide an input interface for the user and obtain the data input by the user; and the processor 801 can be used to call the application stored in the memory 805 and specifically execute the following steps: Figure 1 The specific process can be referred to Figure 1 As shown, no further description is given here.

[0118] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only storage memory, or a random access memory, etc.

[0119] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

Claims

1. A method for generating a chip register description document, characterized in that: include: Parsing the register attribute table file of the chip, and determining each functional module included in the chip and the registers included in each functional module according to the parsing result; Query the associated register description template document according to the model of the chip; wherein the register description template document includes: a register list display area and a register description display area; the register list display area is divided into a plurality of list display sub-areas according to the number of parsed functional modules, and each list display sub-area includes: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into a plurality of description display sub-areas according to the number of parsed functional modules, and each description display sub-area includes fields of each register in the functional module: name, offset address, default value, serial number of register bit, domain of register bit, read and write attributes of register bit and default value of register bit; The field values ​​corresponding to the fields in the register list display area and the register description display area are extracted from the register attribute table file, and the register description document of the chip is generated after the read field values ​​are filled into the register description template document.

2. The method according to claim 1, characterized in that The register attribute table file includes: a control panel sub-table, a memory allocation sub-table, and an attribute sub-table of each functional module included in the chip. The control panel sub-table includes a function module list and a trigger button, wherein the function module list includes each function module included in the chip and the registers included in each function module, and the trigger button is used to execute the register table of the parsing chip based on the user's trigger operation; The memory allocation sub-table includes: bus information, boundary address information, size information, peripheral information, and module name information; The attribute subtable includes: offset, register name, register description, bit, field, RW read / write, default value, and description.

3. The method according to claim 2, characterized in that The designated area in the attribute subtable is locked, and the designated area is skipped when extracting field values ​​in the attribute subtable.

4. The method according to claim 1, 2 or 3, characterized in that: Perform data verification on the read field value and fill it after passing the verification.

5. The method according to claim 1, characterized in that The description display sub-area of ​​the functional module is provided with a hyperlink address of the word list display sub-area associated with the functional module.

6. The method according to claim 1, characterized in that The VBA code added in the register attribute table file is called to extract the corresponding field value, and the VBA code in the register description template document is called to generate a register description document.

7. The method according to claim 1, characterized in that Before parsing the register attribute table file of the chip and determining the functional modules included in the chip and the registers included in the functional modules according to the parsing results, the method further includes: Edit the register attribute table file in the Excel document and save the edited register table; Edit the register description template document in the word document, and save the edited register description template document.

8. A device for generating a chip register description document, characterized in that: include: A parsing unit, used for parsing a register attribute table file of a chip, and determining each functional module included in the chip and the registers included in each functional module according to the parsing result; A query unit, used for querying the associated register description template document according to the model of the chip; wherein the register description template document comprises: a register list display area and a register description display area; the register list display area is divided into a plurality of list display sub-areas according to the number of parsed functional modules, each list display sub-area comprising: fields of each register in the functional module: base address, offset, instance address, name default value and description; the register description display area is divided into a plurality of description display sub-areas according to the number of parsed functional modules, each description display sub-area comprising fields of each register in the functional module: name, offset address, default value, serial number of register bit, domain of register bit, read and write attributes of register bit and default value of register bit; A generating unit is used to extract the field values ​​corresponding to each field in the register list display area and the register description display area in the register attribute table file, and to generate a register description document of the chip after filling the read field values ​​into the register description template document.

9. A computer storage medium, characterized in that The computer storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor and executing the method steps according to any one of claims 1 to 7.

10. A terminal device, characterized in that: include: A processor and a memory; wherein the memory stores a computer program, and the computer program is suitable for being loaded by the processor and executing the method steps as claimed in any one of claims 1 to 7.

Images