A Binary Data Processing Method, Device, Medium, and Product

Abstract

This application relates to the field of computer technologies, and particularly to a binary data processing method, device, medium, and product. In this method, in the case where the quantity of data to be stored is greater than the capacity of a partial area applied for from the memory, an electronic device may re-apply to the memory for an area with a capacity greater than the previously applied area, so as to ensure that the re-applied area is sufficient to store the data to be stored. In this way, the situation of application crashes can be reduced.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to a binary data processing method, device, medium, and product. Background Art

[0002] During the running of an application, the application can apply to the memory for an area with a fixed storage capacity (such as 8 KB) to store data. For example, data read from an external memory, data to be processed by a processor, data to be written to an external memory, etc. However, as the application runs, the amount of data to be stored will increase. When the amount of data to be stored is greater than the fixed storage capacity, the area with the fixed storage capacity will no longer be able to store data, which will cause the application to crash. Summary of the Invention

[0003] To solve the problem that the application will crash when data cannot be stored in an area with a fixed storage capacity, embodiments of this application provide a binary data processing method, device, medium, and product, including:

[0004] In a first aspect, an embodiment of this application provides a binary data processing method applied to an electronic device. The method includes: obtaining a first instruction, where the first instruction indicates writing first data with a first number of bytes into a first writable sub-region, and the first writable sub-region is a writable sub-region in a first region of the memory; obtaining the number of bytes corresponding to the first writable sub-region; comparing the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region; when the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determining a second region from the memory, where the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region; and writing the first data into the second region.

[0005] In some optional implementation manners of the first aspect, determining a second region from the memory includes: determining a first candidate number of bytes, where the first candidate number of bytes is the sum of a preset number of bytes and the number of bytes corresponding to the first writable sub-region; comparing the size of the first number of bytes with the first candidate number of bytes; when the first number of bytes is less than or equal to the first candidate number of bytes, determining a second region from the memory according to the first candidate number of bytes; or when the first number of bytes is greater than the first candidate number of bytes, updating the first candidate number of bytes according to the preset number of bytes until the first number of bytes is less than or equal to the updated first candidate number of bytes, determining the updated first candidate number of bytes as the second candidate number of bytes, and determining a second region from the memory according to the second candidate number of bytes.

[0006] In some alternative implementations of the first aspect, the second region includes a second writable sub-region. Determining the second region from the memory according to the second candidate number of bytes includes: using the second candidate number of bytes as the number of bytes corresponding to the second writable sub-region, and determining the second region from the memory.

[0007] In some alternative implementations of the first aspect, the first region further includes a first readable sub-region, the second region includes a second writable sub-region and a second readable sub-region. Writing the first data into the second region includes: writing the data in the first readable sub-region into the second readable sub-region, and writing the first data into the second writable sub-region.

[0008] In some alternative implementations of the first aspect, writing the first data into the second writable sub-region includes: obtaining first index information corresponding to the second writable sub-region, where the first index information represents the number of offset bytes between the start address of the second writable sub-region and the start address of the second region; starting from the first address corresponding to the first index information in the second writable sub-region, writing the first data into the second writable sub-region.

[0009] In some alternative implementations of the first aspect, the method further includes: updating the index information corresponding to the second writable sub-region from the first index information to the second index information according to the first number of bytes, where the second index information represents the sum of the number of offset bytes represented by the first index information and the first number of bytes.

[0010] In some alternative implementations of the first aspect, the second region includes a second readable sub-region, and the method further includes: obtaining a second instruction for instructing to read second data of a second number of bytes from the second readable sub-region; determining the read type of the second instruction; in the case where the read type of the second instruction is a sequential read type, processing the second readable sub-region in a first manner; in the case where the read type of the second instruction is a random read type, processing the second readable sub-region in a second manner.

[0011] In some alternative implementations of the first aspect, processing the second readable sub-region in the first manner includes: obtaining third index information corresponding to the second readable sub-region, where the third index information represents the number of offset bytes between the start address of the second readable sub-region and the start address of the second region; reading second data of a second number of bytes from the second readable sub-region according to the third index information; updating the index information corresponding to the second readable sub-region from the third index information to the fourth index information; where the fourth index information represents the sum of the number of offset bytes represented by the third index information and the second number of bytes.

[0012] In some alternative implementations of the first aspect, processing the second readable sub-region using the second method includes: obtaining third index information corresponding to the second readable sub-region, and obtaining read index information from the second instruction; reading second data of a second number of bytes from the second readable sub-region according to the read index information; and maintaining the index information corresponding to the second readable sub-region as the third index information.

[0013] In some alternative implementations of the first aspect, the second region includes a second readable sub-region, and the method further includes: obtaining the number of bytes corresponding to the second readable sub-region; comparing the number of bytes corresponding to the first region with the number of bytes corresponding to the second readable sub-region; and when the number of bytes corresponding to the first region is greater than the number of bytes corresponding to the second readable sub-region, reducing the second region to a third region, where the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region.

[0014] In some alternative implementations of the first aspect, reducing the second region to a third region includes: obtaining a third number of bytes of third data stored in the second readable sub-region; when the third number of bytes is non-zero, determining the third region from the memory according to the number of bytes corresponding to the first region, where the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the first region; and when the third number of bytes is zero, reducing the second region to a third region according to the number of bytes corresponding to the second region, where the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the second region.

[0015] In some alternative implementations of the first aspect, when the third number of bytes is non-zero, the third region includes a third readable sub-region and a third writable sub-region, where the number of bytes corresponding to the third readable sub-region is the same as the number of bytes corresponding to the second readable sub-region.

[0016] In some alternative implementations of the first aspect, the method further includes: writing the third data into the third readable sub-region.

[0017] In some alternative implementations of the first aspect, when the third number of bytes is zero, the third region includes a third writable sub-region, and the number of bytes corresponding to the third writable sub-region is the same as the number of bytes corresponding to the second region.

[0018] In a second aspect, the present application provides an electronic device, including: a memory for storing instructions executed by one or more processors of the electronic device, and a processor, which is one of the one or more processors of the electronic device, for executing the binary data processing method mentioned in the first aspect or any one of the first aspect of the present application.

[0019] In a third aspect, the present application provides a readable storage medium having instructions stored thereon, and when the instructions are executed on an electronic device, the electronic device executes the binary data processing method mentioned in the first aspect or any one of the first aspects of the present application.

[0020] In a fourth aspect, an embodiment of the present application provides a computer program product, the computer program product includes computer instructions, and when executed by an electronic device, the electronic device executes the computer program code of the binary data processing method mentioned in the first aspect or any one of the first aspects of the present application.

[0021] The embodiments of the present application have the following technical effects: When the quantity of data to be stored is greater than the capacity of the buffer area applied for from the memory, the electronic device can re-apply for a buffer area with a capacity greater than the previously applied buffer area from the memory, so as to ensure that the re-applied buffer area is sufficient to store the data to be stored. In this way, the situation of application program crashes can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 According to some embodiments of the present application, a schematic diagram of an application scenario is shown;

[0023] Figure 2 According to some embodiments of the present application, a flowchart of a first binary data processing method is shown;

[0024] Figure 3 According to some embodiments of the present application, a schematic diagram of a first region 300 is shown;

[0025] Figure 4 According to some embodiments of the present application, a comparison schematic diagram of a first region and a second region is shown;

[0026] Figure 5 According to some embodiments of the present application, a flowchart of a process of copying data in a first region to a second region is shown;

[0027] Figure 6 According to some embodiments of the present application, a schematic diagram of updating index information corresponding to a first writable sub-region is shown;

[0028] Figure 7 According to some embodiments of the present application, a flowchart of a second binary data processing method is shown;

[0029] Figure 8 According to some embodiments of the present application, a flowchart of a third binary data processing method is shown;

[0030] Figure 9According to some embodiments of the present application, a schematic diagram of another method for updating index information corresponding to the first writable sub-region is shown;

[0031] Figure 10 According to some embodiments of the present application, a schematic flowchart of a fourth binary data processing method is shown;

[0032] Figure 11 According to some embodiments of the present application, a comparison schematic diagram between a second region and a third region is shown

[0033] Figure 12 According to some embodiments of the present application, another comparison schematic diagram between a second region and a third region is shown;

[0034] Figure 13 According to some embodiments of the present application, a schematic diagram of the hardware structure of an electronic device is shown. Detailed implementation manners

[0035] Embodiments of the present application include but are not limited to a binary data processing method, device, medium, and product.

[0036] It can be understood that the binary data processing method mentioned in the embodiments of the present application can be applied to an electronic device. Among them, the electronic device can be called a terminal, user equipment (UE), mobile terminal (MT), etc. In some specific implementation manners, the electronic device can be a smart phone, tablet computer, smart watch, smart TV, earphone, smart speaker, router, smart camera, smart door lock, smart bulb, etc., which have a buffer.

[0037] It can be understood that the binary data processing method mentioned in the embodiments of the present application can be applied to an electronic device with a HarmonyOS system.

[0038] As Figure 1 shown, a schematic diagram of an application scenario is shown. As Figure 1 shown, the electronic device 100 may include a processor 110 and a memory 120. During the running of an application, the processor 110 may apply for a partial region from the memory 120 as a buffer to store data. Thus, if the processor 110 needs to use this data, it can directly read it from the buffer. In this way, repeated access can be avoided, the waiting time of the processor 110 can be reduced, and thus the processing efficiency of the electronic device 100 can be improved.

[0039] As mentioned above, when the quantity of the data to be stored is greater than the capacity of the applied buffer, the buffer will no longer be able to store data, which will cause the application to crash.

[0040] Therefore, an embodiment of the present application provides a binary data processing method. In this method, when the quantity of data to be stored is greater than the capacity of the buffer area applied for from the memory, the electronic device can re-apply to the memory for a buffer area with a capacity greater than the previously applied buffer area, so as to ensure that the re-applied buffer area is sufficient to store the data to be stored. In this way, the situation of application crashes can be reduced.

[0041] Moreover, the buffer area can include a writable sub-region, and the writable sub-region can have a corresponding writable index to represent the offset between the starting address of the writable sub-region and the starting address of the buffer area. Therefore, after writing the data to be stored into the writable sub-region in the buffer area, it is necessary to update the writable index corresponding to the writable sub-region. In this way, it can be clear which areas in the buffer area already have data and which areas have no data that can be written, so that not only can the data be accurately stored in chronological order or in the order of event occurrence, but also data loss caused by data overwriting can be prevented.

[0042] The binary data processing method mentioned in the embodiment of the present application will be introduced below.

[0043] It can be understood that during the running of the application, the electronic device can obtain a write instruction (hereinafter referred to as the first instruction). Based on the scenario of obtaining the first instruction, the data processing method mentioned in the embodiment of the present application will be introduced below.

[0044] As Figure 2 shown, a schematic flowchart of a binary data processing method is shown. This method can be executed by an electronic device. Specifically, it can be executed by an electronic device with a HarmonyOS system. Specifically as Figure 2 shown, this binary data processing method can include:

[0045] S201: Obtain a first instruction, where the first instruction instructs to write first data with a first number of bytes into a first writable sub-region, and the first writable sub-region is a writable sub-region in a first region of the memory.

[0046] It can be understood that the first region can be a buffer area. This buffer area can store the data that the electronic device will use soon. For example, when the user opens a music application, the buffer area can store the audio data of the music to be played currently.

[0047] In some specific implementation manners, during the running of the application, the electronic device can obtain a first instruction, and this first instruction can be an instruction instructing to write first data into the first writable sub-region in the first region. Among them, the data volume of the first data can be the first number of bytes, for example, the first number of bytes is a KB. And the first data can be the data to be used soon mentioned above, specifically such as binary data.

[0048] As Figure 3 shown, a schematic diagram of a first region 300 is shown. The first region 300 may include a first writable sub-region (also referred to as a writable data area) 310, a first readable sub-region (also referred to as a readable data area) 320, and a first discarded sub-region (also referred to as a discarded data area) 330.

[0049] It can be understood that each sub-region in the first region 300 has a corresponding start address and end address. The start address of the first discarded sub-region 330 may be the start address of the first region 300, the end address of the first discarded sub-region 330 may be the start address of the first readable sub-region 320, the end address of the first readable sub-region 320 may be the start address of the first writable sub-region 310, and the end address of the first writable sub-region 310 may be the end address of the first region 300.

[0050] Moreover, the start address of the first region 300 has a corresponding index information, usually denoted as the start index, such as "0", and the end address of the first region 300 also has a corresponding index information, usually denoted as the maximum index (length). Also, the start address of the first readable sub-region 320 has a corresponding index information, denoted as the read index (readerIndex), and this read index can represent the offset byte number between the start address of the first readable sub-region 320 and the start address of the first region 300. The start address of the first writable sub-region 310 has a corresponding index information, denoted as the written index (writerIndex), and this written index can represent the offset byte number between the start address of the first writable sub-region 310 and the start address of the first region 300.

[0051] S202: Obtain the number of bytes corresponding to the first writable sub-region.

[0052] It can be understood that the electronic device can update the number of bytes corresponding to each sub-region stored in real time according to the read and write conditions of each sub-region in the first region 300. For example, when obtaining the first instruction, the electronic device can obtain that the number of bytes corresponding to the first writable sub-region 310 as shown in Figure 3 is X1 KB.

[0053] Similarly, the number of bytes corresponding to the first region 300 that the electronic device can obtain may be X KB, such as 8 KB. The number of bytes corresponding to the first readable sub-region 320 may be X2 KB, and the number of bytes corresponding to the first discarded sub-region 330 may be X3 KB, that is, X = X1 + X2 + X3.

[0054] S203: Compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region.

[0055] It can be understood that after obtaining the number of bytes corresponding to the first writable sub-region 310, the electronic device can compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region 310 to determine whether the capacity of the first writable sub-region 310 is sufficient to store the first data of the first number of bytes.

[0056] When it is determined that the first number of bytes is less than or equal to the number of bytes corresponding to the first writable sub-region 310, the electronic device can determine that the capacity of the first writable sub-region 310 is sufficient to store the first data of the first number of bytes. When it is determined that the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region 310, the electronic device can determine that the capacity of the first writable sub-region 310 is insufficient to store the first data of the first number of bytes.

[0057] S204: When the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, where the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region.

[0058] It can be understood that when the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region 310, that is, a > X1, which means that the capacity of the first writable sub-region 310 is insufficient to store the first data of the first number of bytes, the electronic device can expand the capacity of the first region 300. In some specific implementation manners, the electronic device can re-apply for a second region from the memory, and the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region 300.

[0059] Such as Figure 4 shown, a comparison schematic diagram of a first region 300 and a second region 400 is shown. Figure 4 The first region 300 shown in (a) can include a first writable sub-region 310, a first readable sub-region 320, and a first discarded sub-region 330. Figure 4 The second region 400 shown in (b) can include a second writable sub-region 410, a second readable sub-region 420, and a second discarded sub-region 430. Wherein, the number of bytes corresponding to the first region 300 can be X KB, the number of bytes corresponding to the second region 400 can be Y KB, and X < Y.

[0060] In some optional implementation manners, the electronic device can determine the number of bytes corresponding to the second region 400 as the sum of the preset number of bytes and the number of bytes corresponding to the first region 300. Wherein, the preset number of bytes can be a value set by the user according to multiple experiments, such as 2KB, 4KB, etc., which is not limited in the embodiments of the present application. And the electronic device can determine the second region 400 from the memory according to the number of bytes corresponding to the second region 400.

[0061] For example, if the preset number of bytes is 2 KB and the number of bytes corresponding to the first region 300 is X KB mentioned above, the electronic device can determine the number of bytes corresponding to the second region 400 as the sum of the preset number of bytes and the number of bytes corresponding to the first region 300, i.e., (2 + X) KB. In this way, the electronic device can expand the first region 300 so that the expanded second region is sufficient to store the first data of the first number of bytes.

[0062] To avoid frequent memory applications caused by frequent expansion, the electronic device can determine whether the capacity of the expanded region is sufficient to store the first data of the first number of bytes if the capacity of the preset number of bytes is expanded. If the capacity of the expanded region is not sufficient to store the first data of the first number of bytes, it can then determine whether the capacity of the expanded region is sufficient to store the first data of the first number of bytes if the capacity is expanded by twice the preset number of bytes, until it is determined that the capacity of the expanded region is sufficient to store the first data of the first number of bytes, and then expand the first region 300.

[0063] In some alternative implementation manners, the electronic device can determine the first candidate number of bytes as the sum of the preset number of bytes and the number of bytes corresponding to the first writable sub-region 310. For example, if the preset number of bytes is 2 KB and the number of bytes corresponding to the first writable sub-region 310 is X1 KB mentioned above, the electronic device can determine the sum of the preset number of bytes and the number of bytes corresponding to the first writable sub-region 310, i.e., (2 + X1) KB, as the first candidate number of bytes. Then, the electronic device can compare the magnitudes of the first number of bytes and the first candidate number of bytes.

[0064] In the case where the first number of bytes is less than or equal to the first candidate number of bytes, the electronic device can determine the second region 400 from the memory according to the first candidate number of bytes.

[0065] In some ways of determining the second region, the electronic device can determine the number of bytes corresponding to the second region 400 as the sum of the preset number of bytes and the number of bytes corresponding to the first region 300. Moreover, the electronic device can determine the second region 400 from the memory according to the number of bytes corresponding to the second region 400.

[0066] For example, if the preset number of bytes is 2 KB and the number of bytes corresponding to the first region 300 is X KB mentioned above, the electronic device can determine the number of bytes corresponding to the second region 400 as the sum of the preset number of bytes and the number of bytes corresponding to the first region 300, i.e., (2 + X) KB.

[0067] In some other ways of determining the second region, the electronic device may use the first candidate number of bytes as the number of bytes corresponding to the second writable sub-region 410 in the second region 400, and determine the sum of the first candidate number of bytes, the number of bytes corresponding to the first readable sub-region 320, and the number of bytes corresponding to the first discarded sub-region 330 as the number of bytes corresponding to the second region 400. Moreover, the electronic device may determine the second region 400 from the memory according to the number of bytes corresponding to the second region 400.

[0068] For example, if the first candidate number of bytes is (2 + X1) KB, the number of bytes corresponding to the first writable sub-region 310 is X2 KB mentioned above, and the number of bytes corresponding to the first discarded sub-region 330 is X3 KB mentioned above, then the electronic device may determine the sum of the first candidate number of bytes, the number of bytes corresponding to the first readable sub-region 320, and the number of bytes corresponding to the first discarded sub-region 330, i.e., (2 + X1) + X2 + X3, as the number of bytes corresponding to the second region.

[0069] When the first number of bytes is greater than the first candidate number of bytes, i.e., a > (2 + X1), the electronic device may update the first candidate number of bytes according to a preset number of bytes to obtain the updated first candidate number of bytes. Moreover, the electronic device may compare the first number of bytes with the updated first candidate number of bytes. If the first number of bytes is still greater than the updated first candidate number of bytes, the electronic device needs to repeatedly execute the steps of updating the first candidate number of bytes according to the preset number of bytes and comparing the first number of bytes with the updated first candidate number of bytes until the first number of bytes is less than or equal to the updated first candidate number of bytes, and then the electronic device may determine the updated first candidate number of bytes as the second candidate number of bytes. Moreover, the electronic device may determine the second region 400 from the memory according to the second candidate number of bytes.

[0070] In some ways of determining the second region, the electronic device may use the second candidate number of bytes as the number of bytes corresponding to the second writable sub-region 410 in the second region 400, and determine the sum of the second candidate number of bytes, the number of bytes corresponding to the first readable sub-region 320, and the number of bytes corresponding to the first discarded sub-region 330 as the number of bytes corresponding to the second region 400. Moreover, the electronic device may determine the second region 400 from the memory according to the number of bytes corresponding to the second region 400.

[0071] For example, the preset number of bytes is 2 KB, and the first candidate number of bytes is (2 + X1) KB mentioned above. When the first number of bytes is greater than the first candidate number of bytes, that is, a > (2 + X1), the electronic device updates the first candidate number of bytes according to the preset number of bytes to obtain the updated first candidate number of bytes (4 + X1) KB. If the first number of bytes is less than or equal to the updated first candidate number of bytes (4 + X1) KB, the electronic device may use the updated first candidate number of bytes (4 + X1) KB as the second candidate number of bytes. Moreover, if the number of bytes corresponding to the first readable sub-region 320 is X2 KB mentioned above, and the number of bytes corresponding to the first discarded sub-region 330 is X3 KB mentioned above, the electronic device may determine the sum of the second candidate number of bytes, the number of bytes corresponding to the first readable sub-region 320, and the number of bytes corresponding to the first discarded sub-region 330, i.e., (4 + X1) + X2 + X3, as the number of bytes corresponding to the second region.

[0072] In this way, based on the above method, the second region 400 as shown in Figure 4 (b) can be determined. Among them, the number of bytes corresponding to the second region 400 is Y KB, the number of bytes corresponding to the second writable sub-region 410 may be Y1 KB, the number of bytes corresponding to the second readable sub-region 420 may be Y2 KB, and the number of bytes corresponding to the second discarded sub-region 430 may be Y3 KB. That is, Y = Y1 + Y2 + Y3. Moreover, Y1 > X1, Y2 = X2, and Y3 = X3.

[0073] S205: Write the first data into the second region.

[0074] It can be understood that after determining the second region 400 from the memory, the electronic device may write the first data into the second writable sub-region 410.

[0075] In addition, as shown in Figure 5 , a schematic flowchart of copying the data in the first region 300 to the second region 400 is shown. The electronic device may write the data in the first readable sub-region 320 into the second readable sub-region 420, and write the data in the first discarded sub-region 330 into the second discarded sub-region 430, so as to implement copying all the data in the first region 300 to the newly applied second region 400 in the memory. That is, the starting address of the first region 300 may be called the data copy starting point, and the ending address of the first region 300 may be called the data copy ending point. Moreover, the region added by the second writable sub-region 410 in the second region 400 compared with the first writable sub-region 310 in the first region 300 may be called the newly added writable data area.

[0076] In some ways of writing the first data into the second writable sub-region, the electronic device can obtain the first index information corresponding to the second writable sub-region 410, and the first index information can represent the number of offset bytes between the starting address of the second writable sub-region 410 and the starting address of the second region 400. Moreover, the electronic device can write the first data into the second writable sub-region 410 starting from the starting address of the second writable sub-region 410.

[0077] Moreover, similarly, each sub-region in the second region 400 has a corresponding starting address and ending address. The starting address of the second discarded sub-region 430 can be the starting address of the second region 400, the ending address of the second discarded sub-region 430 can be the starting address of the second readable sub-region 420, the ending address of the second readable sub-region 420 can be the starting address of the second writable sub-region 410, and the ending address of the second writable sub-region 410 can be the ending address of the second region 400.

[0078] In addition, the starting address of the second region 400 has corresponding index information, usually denoted as the starting index, such as "0", and the ending address of the second region 400 also has corresponding index information, usually denoted as the maximum index (length). Moreover, the starting address of the second readable sub-region 420 has corresponding index information (hereinafter referred to as the third index information corresponding to the second readable sub-region 420), denoted as the read index (readerIndex), and the read index can represent the number of offset bytes between the starting address of the second readable sub-region 420 and the starting address of the second region 400. The starting address of the second writable sub-region 410 has corresponding index information (hereinafter referred to as the first index information corresponding to the second writable sub-region 410), denoted as the written index (writerIndex), and the written index can represent the number of offset bytes between the starting address of the second writable sub-region 410 and the starting address of the second region 400.

[0079] It can be understood that in the HarmonyOS system, the readable and writable binary buffer container can include ArrayBuffer and SharedArrayBuffer. Among them, ArrayBuffer is a general-purpose, fixed-length existing binary data buffer that only stores data and does not record the read and write positions. SharedArrayBuffer is also a general-purpose, fixed-length existing binary data buffer mainly used for sharing data between multiple threads, focusing on the concurrent access and synchronization of data by multiple threads, and itself does not have the function of recording read and write positions.

[0080] Therefore, in the embodiment of the present application, after writing the first data into the second writable sub-region 410, the electronic device may update the index information corresponding to the second writable sub-region 410. Specifically, the electronic device may update the index information corresponding to the second writable sub-region 410 from the first index information to the second index information. Wherein, the second index information may represent the sum of the offset bytes represented by the first index information and the first number of bytes. For example, if the first index information corresponding to the second writable sub-region 410 is n1, and the first number of bytes of the first data is a KB mentioned above, then the second index information corresponding to the second writable sub-region 410 is n1 + a.

[0081] S206: When the first number of bytes is less than or equal to the number of bytes corresponding to the first writable sub-region, write the first data into the first writable sub-region.

[0082] It can be understood that when the first number of bytes is less than or equal to the number of bytes corresponding to the first writable sub-region 310, that is, a ≤ X1, that is, when the capacity of the first writable sub-region 310 is sufficient to store the first data of the first number of bytes, the electronic device may obtain the index information corresponding to the first writable sub-region 310, and this index information may represent the offset bytes between the starting address of the first writable sub-region 310 and the starting address of the first region 300. And, the electronic device may write the first data into the first writable sub-region 310 starting from the starting address of the first writable sub-region 310.

[0083] Next, the electronic device may update the index information corresponding to the first writable sub-region 310 to obtain the updated index information corresponding to the first writable sub-region 310, and this updated index information may represent the sum of the index information corresponding to the first writable sub-region 310 and the first number of bytes. For example, if the index information corresponding to the first writable sub-region 310 is n2, and the first number of bytes of the first data is a KB mentioned above, then the updated index information corresponding to the first writable sub-region 310 is n2 + a.

[0084] Specifically, as Figure 6 shown, the index information corresponding to the first writable sub-region 310 represents Figure 6 the offset bytes between the address corresponding to the written index (i.e., the index information) outlined by the dashed line in (a) and the starting address of the first region 300, and the updated index information corresponding to the first writable sub-region 310 represents Figure 6 the address corresponding to the written index (i.e., the updated index information) outlined by the solid line in (b).

[0085] In the embodiment of the present application, when the capacity of the writable sub-region in the buffer area applied by the application program to the memory is not sufficient to store the data to be written, by re-applying for a buffer area with a larger capacity, that is, expanding the buffer area, the situation of the application program crashing can be reduced.

[0086] It can be understood that during the running of the application, the electronic device can not only obtain write instructions, but also obtain read instructions (hereinafter referred to as the second instructions).

[0087] Based on the scenario of obtaining the first instruction first and then the second instruction, the data processing method mentioned in the embodiments of the present application will be introduced below.

[0088] As Figure 7 shown, a schematic flowchart of a second binary data processing method is shown. This method can be executed by an electronic device. Specifically, it can be executed by an electronic device with a HarmonyOS. As Figure 7 shown, this binary data processing method may include:

[0089] S701: Obtain a first instruction, where the first instruction instructs to write first data with a first number of bytes into a first writable sub-region, and the first writable sub-region is a writable sub-region in a first region of the memory.

[0090] S702: Obtain the number of bytes corresponding to the first writable sub-region.

[0091] S703: Compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region.

[0092] S704: When the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, where the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region.

[0093] S705: Write the first data into the second region.

[0094] It can be understood that the specific implementation manners of S701 to S705 can refer to Figure 2 S201 to S205 therein, which will not be elaborated here.

[0095] S706: Obtain a second instruction, where the second instruction is used to instruct to read second data with a second number of bytes from a second readable sub-region, and the second readable sub-region is a readable sub-region in a second region of the memory.

[0096] In some specific implementation manners, during the running of the application, the electronic device can obtain a second instruction, and the second instruction can be an instruction to instruct to read second data from a second readable sub-region 420 in a second region 400 as shown in Figure 4 (b) therein, where the data volume of the second data can be the second number of bytes, for example, the second number of bytes is b KB.

[0097] S707: Determine the read type of the second instruction.

[0098] It can be understood that the data in the second writable sub-region can be audio data, video data, etc., and these data are stored in chronological order. Therefore, the second instruction can be a sequential read instruction. For example, the second instruction can indicate to read the second data of the second byte count from the second writable sub-region in the playback order of video frames.

[0099] However, when it is necessary to analyze, count, or verify the data in the second readable sub-region and not all data is processed sequentially, the second instruction can be a random read instruction. Or, when verifying whether some data in the second readable sub-region meets the query conditions, the second instruction can be a random read instruction. In this way, this part of the data can be randomly accessed instead of sequentially traversing all the data in the second readable sub-region. Or, when some data in the second readable sub-region is incorrect or lost, in order to locate and repair this data, the second instruction can be a random read instruction.

[0100] After obtaining the second instruction, the electronic device can obtain the byte count corresponding to the second readable sub-region 420, such as Y2 mentioned above, and determine whether the byte count corresponding to the second readable sub-region 420 is greater than the second byte count. In the case where the byte count corresponding to the second readable sub-region 420 is greater than or equal to the second byte count, the read type of the second instruction can be determined. In the case where the byte count corresponding to the second readable sub-region 420 is less than the second byte count, it can be determined that the second readable sub-region 420 is empty and no more data can be read.

[0101] It can be understood that the second instruction can include read index information. Therefore, after obtaining the second instruction, the electronic device can first determine the read index information from the second instruction and obtain the third index information corresponding to the second readable sub-region 420. Then, the electronic device can compare the size of the read index information and the third index information to determine the read type of the second instruction.

[0102] In the case where the read index information is equal to the third index information, it can be determined that the read type of the second instruction is the sequential read type. In the case where the read index information is greater than the third index information, it can be determined that the read type of the second instruction is the random read type. In the case where the read index information is greater than the second index information, it can be determined that the second instruction is an incorrect instruction, and the electronic device can report an error. In the case where the sum of the read index information and the second byte count is greater than the second index information, it can be determined that the second instruction is an incorrect instruction, and the electronic device can report an error.

[0103] S708: In the case where the read type of the second instruction is the sequential read type, the second readable sub-region is processed in the first manner.

[0104] It can be understood that when the read index information is equal to the third index information and the sum of the read index information and the second number of bytes is less than the second index information, it can be determined that the read type of the second instruction is the sequential read type. In this way, the electronic device can process the second readable sub-region 420 in the first manner.

[0105] In some ways of processing the second readable sub-region in the first manner, the electronic device can obtain the third index information corresponding to the second readable sub-region 420. Among them, the third index information can represent the offset number of bytes between the start address of the second readable sub-region 420 and the start address of the second region 400. Then, the electronic device can read the second data of the second number of bytes from the second readable sub-region 420 according to the third index information.

[0106] Moreover, the electronic device can update the index information corresponding to the second readable sub-region 420 from the third index information to the fourth index information. Among them, the fourth index information can represent the sum of the offset number of bytes represented by the third index information and the second number of bytes. For example, if the third index information corresponding to the second readable sub-region 420 is m1 and the second number of bytes of the second data is b KB mentioned above, then when the read type of the second instruction is the sequential read type, the fourth index information corresponding to the second readable sub-region 420 is m1 + b. And because the capacity of the second region 400 is limited, when the electronic device sequentially reads the second data of the second number of bytes from the second readable sub-region 420, the capacity occupied by the second data is no longer valuable for the second instruction. Therefore, the capacity occupied by the second data, that is, the capacity corresponding to the difference between the third index information and the fourth index information, can be determined as the newly added capacity of the second discarded sub-region 430. In this way, the efficiency of managing the second region 400 can be improved, and the second data can be prevented from being wrongly read again, resulting in an error reported by the application program. For example, repeated reading of the same video frame causes the application program to freeze. And if the capacity occupied by the second data is not determined as the newly added capacity of the second discarded sub-region 430, the second region 400 will soon be full of data and no new data can be written.

[0107] S709: When the read type of the second instruction is the random read type, process the second readable sub-region in the second manner.

[0108] It can be understood that when the read index information is greater than the third index information and the sum of the read index information and the second number of bytes is less than the second index information, it can be determined that the read type of the second instruction is the random read type.

[0109] In some ways of processing the second readable sub-region in the second manner, the electronic device can obtain the reading index information in the second instruction, and read the second data of the second number of bytes from the second readable sub-region according to the reading index information. Then, the electronic device can keep the index information corresponding to the second readable sub-region as the third index information. For example, if the third index information corresponding to the second readable sub-region 420 is m1, and the second number of bytes of the second data is b KB mentioned above, then when the reading type of the second instruction is the random reading type, the fourth index information corresponding to the second readable sub-region 420 is m1. When the reading type of the second instruction is the random reading type, the second data will be used again. Therefore, there is no need to update the third index information corresponding to the second readable sub-region 420, nor to determine the capacity occupied by the second data as the newly added capacity of the second discarded sub-region 430.

[0110] S710: When the first number of bytes is less than or equal to the number of bytes corresponding to the first writable sub-region, write the first data into the first writable sub-region.

[0111] It can be understood that the specific implementation of S710 can refer to Figure 2 S206 in, which will not be elaborated here.

[0112] In the embodiments of the present application, by determining different ways to process the readable sub-region according to different reading types of the reading instruction. For example, updating the index information corresponding to the readable sub-region or keeping the index information corresponding to the readable sub-region can avoid the situation where the read data is incorrect due to the incorrect index information corresponding to the readable sub-region when the subsequent reading instruction is the sequential reading type.

[0113] It can be understood that the electronic device can obtain the reading instruction not only after expanding the capacity of the first region 300, but also after not expanding the capacity of the first region 300.

[0114] Next, based on obtaining the reading instruction after not expanding the capacity of the first region 300, the binary data processing method mentioned in the embodiments of the present application will be introduced.

[0115] As Figure 8 shown, a schematic flowchart of a third binary data processing method is shown. This method can be executed by an electronic device, specifically, by an electronic device with a HarmonyOS system. As Figure 8 shown, this binary data processing method may include:

[0116] S801: Obtain a first instruction, where the first instruction indicates writing the first data of the first number of bytes into the first writable sub-region, and the first writable sub-region is a writable sub-region in the first region of the memory.

[0117] S802: Obtain the number of bytes corresponding to the first writable sub-region.

[0118] S803: Compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region.

[0119] S804: When the first number of bytes is less than or equal to the number of bytes corresponding to the first writable sub-region, write the first data into the first region.

[0120] It can be understood that the specific implementation manners of S801 to S804 can refer to Figure 2 S201, S202, S203, and S206 in

[0121] S805: Obtain a second instruction, where the second instruction is used to indicate reading second data of a second number of bytes from a first readable sub-region, and the first readable sub-region is a readable sub-region in a first region of a memory.

[0122] S806: Determine the reading type of the second instruction.

[0123] It can be understood that the specific implementation manners of S805 to S806 can refer to Figure 7 S706 to S707 in

[0124] S807: When the reading type of the second instruction is a sequential reading type, process the first readable sub-region in a first manner.

[0125] It can be understood that in some manners of processing the first readable sub-region in a first manner, the electronic device can obtain the index information corresponding to the first readable sub-region 320. This index information can represent the number of offset bytes between the start address of the first readable sub-region 320 and the start address of the first region 300. Then, the electronic device can read the second data of the second number of bytes from the first readable sub-region 320 according to the index information corresponding to the first readable sub-region 320.

[0126] Moreover, the electronic device can update the index information corresponding to the first readable sub-region 320 to obtain the updated index information corresponding to the first readable sub-region 320. The updated index information can represent the sum of the index information corresponding to the first writable sub-region 310 and the first number of bytes. For example, if the index information corresponding to the first writable sub-region 310 is n3 and the first number of bytes of the first data is a KB mentioned above, the updated index information corresponding to the first writable sub-region 310 is n3 + a. Moreover, since the capacity of the first region 300 is limited, after the electronic device sequentially reads the second data of the second number of bytes from the first readable sub-region 320, the capacity occupied by the second data is no longer valuable for the second instruction. Therefore, the capacity occupied by the second data can be determined as the newly added capacity of the first discarded sub-region 330. In this way, the efficiency of managing the first region 300 can be improved, and the second data can be prevented from being misread again, resulting in an error in the application program. For example, repeated reading of the same video frame causes the application program to freeze. Moreover, if the capacity occupied by the second data is not determined as the newly added capacity of the first discarded sub-region 330, the first region 300 will soon be full of data and no new data can be written.

[0127] Specifically, as Figure 9 shown, the index information corresponding to the first writable sub-region 310 represents Figure 9 the offset number of bytes between the address corresponding to the written index (i.e., the index information) enclosed by the dashed line in (a) and the starting address of the first region 300. The updated index information corresponding to the first writable sub-region 310 represents Figure 9 the address corresponding to the written index (i.e., the updated index information) enclosed by the solid line in (b).

[0128] S808: When the read type of the second instruction is the random read type, the first readable sub-region is processed in the second manner.

[0129] In some ways of processing the first readable sub-region in the second manner, the electronic device can obtain the read index information in the second instruction and read the second data of the second number of bytes from the first readable sub-region 320 according to the read index information. Then, the electronic device can keep the index information corresponding to the first readable sub-region 320. When the read type of the second instruction is the random read type, the second data will be used again. Therefore, it is not necessary to update the third index information corresponding to the first readable sub-region 320, nor is it necessary to determine the capacity occupied by the second data as the newly added capacity of the first discarded sub-region 330.

[0130] It can be understood that the specific implementation manners of S805 to S808 can refer to Figure 7 S706 to S709 therein, which will not be elaborated here.

[0131] In the embodiments of the present application, by determining different ways to process the readable sub-region according to different read types of the read instruction, for example, updating the index information corresponding to the readable sub-region or saving the index information corresponding to the readable sub-region, it is possible to avoid the situation where the read data is incorrect due to incorrect index information corresponding to the readable sub-region when the subsequent read instruction is of the sequential read type.

[0132] It can be understood that after expanding the capacity of the first region 300, in order to reduce memory waste, it is possible to determine whether the second region 400 meets the shrinkage condition, and when the second region 400 meets the shrinkage condition, the second region can be shrunk. As Figure 10 shown, a flowchart of a fourth binary data processing method is shown. This method can be executed by an electronic device, specifically, by an electronic device with a HarmonyOS. As Figure 10 shown, this binary data processing method may include:

[0133] S1001: Obtain a first instruction, where the first instruction indicates writing first data of a first number of bytes into a first writable sub-region, and the first writable sub-region is a writable sub-region in a first region of the memory.

[0134] S1002: Obtain the number of bytes corresponding to the first writable sub-region.

[0135] S1003: Compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region.

[0136] S1004: When the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, where the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region.

[0137] S1005: Write the first data into the second region.

[0138] It can be understood that the specific implementation manners of S1001 to S1005 can refer to Figure 2 S201 to S205 therein, which will not be elaborated here.

[0139] S1006: Obtain the number of bytes corresponding to the second readable sub-region.

[0140] It can be understood that the electronic device can update the number of bytes corresponding to each sub-region stored in real time according to the read and write situations of each sub-region in the second region. For example, when obtaining the second instruction, the electronic device can obtain Figure 4 as shown in (b) therein, the number of bytes corresponding to the second readable sub-region 420 can be Y2 KB.

[0141] S1007: Compare the number of bytes corresponding to the first region with the number of bytes corresponding to the second readable sub-region.

[0142] It can be understood that the more data is read from the buffer, that is, the larger the second discarded sub-region 430 in the second region 400, the more serious the memory waste.

[0143] Therefore, after obtaining the number of bytes corresponding to the second readable sub-region 420, the electronic device can determine whether the second region 400 meets the condition for capacity reduction based on the comparison between the number of bytes corresponding to the first region 300 and the number of bytes corresponding to the second readable sub-region 420. Since the number of bytes corresponding to the region after capacity reduction needs to be less than or equal to the number of bytes corresponding to the second region. For example, the number of bytes corresponding to the region after capacity reduction can be the number of bytes corresponding to the first region. And to ensure that all the data in the second writable sub-region 410 can be copied to the region after capacity reduction, the capacity reduction condition can be that the number of bytes corresponding to the first region 300 is greater than the number of bytes corresponding to the second readable sub-region 420.

[0144] It can be understood that the capacity reduction condition can also be that the number of bytes corresponding to the second discarded sub-region 430 is greater than a first threshold, and the first threshold can be 6 KB for example, which is not specifically limited in the embodiments of the present application.

[0145] S1008: When the number of bytes corresponding to the first region is greater than the number of bytes corresponding to the second readable sub-region, reduce the capacity of the second region to a third region, where the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region.

[0146] To avoid memory waste caused by capacity expansion, when it is determined that the second region 400 meets the capacity reduction condition, that is, the number of bytes corresponding to the first region 300 is greater than the number of bytes corresponding to the second readable sub-region 420, the electronic device can reduce the capacity of the second region to reduce memory waste.

[0147] It can be understood that the electronic device can obtain the number of third bytes of the third data stored in the second readable sub-region 420, and adopt different capacity reduction methods according to whether the number of third bytes is zero. Among them, the third data can be all the data in the second readable sub-region 420. In some specific implementation manners, the electronic device can re-apply for a third region from the memory, and the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region. The electronic device can also reset the read index and write index of the second region 400 to achieve rapid capacity reduction of the second region 400.

[0148] In some ways of determining the third region, when the number of bytes in the third region is non-zero, that is, not all the data in the second region 400 has been read, the electronic device can determine the third region from the memory according to the number of bytes corresponding to the first region. The number of bytes corresponding to the third region is less than the number of bytes corresponding to the second region, and the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the first region.

[0149] As Figure 11 shown, a comparison schematic diagram of the second region 400 and the third region 1100 is shown. Figure 11 The second region 400 shown in (a) may include a second writable sub-region 410, a second readable sub-region 420, and a second discarded sub-region 430. The third region 1100 may include a third writable sub-region 1110 and a third readable sub-region 1120. Among them, the number of bytes corresponding to the second region may be Y mentioned above, the number of bytes corresponding to the third region 1100 may be Z, and Z = X < Y.

[0150] And, similarly, each sub-region in the third region 1100 has a corresponding start address and end address. The start address of the third readable sub-region 1120 may be the start address of the third region 1100, the end address of the third readable sub-region 1120 may be the start address of the third writable sub-region 1110, and the end address of the third writable sub-region 1110 may be the end address of the third region 1100.

[0151] In addition, the start address of the third region 1100 has corresponding index information, usually denoted as the start index, such as "0", and the end address of the third region 1100 also has corresponding index information, usually denoted as the maximum index (length) after shrinkage.

[0152] And, the start address of the third readable sub-region 1120 has corresponding index information, denoted as the read index (readerIndex), and this read index can represent the offset number of bytes between the start address of the third readable sub-region 1120 and the start address of the third region 1100. Here, in the case just after shrinkage, since the start address of the third region 1100 is the same as the start address of the third readable sub-region 1120, the start index coincides with the read index.

[0153] When the number of bytes in the third region is zero, that is, all the data in the second region 400 has been read, the electronic device can reset the read index and write index of the second region 400 according to the number of bytes corresponding to the second region. For example, both the read index and write index of the second region 400 can be reset to "0" to reduce the second region to the third region. In this way, the reuse of the second discarded sub-region 430 can be achieved, thereby realizing the rapid reduction of the second region 400. The number of bytes corresponding to this third region is the same as the number of bytes corresponding to the second region.

[0154] As Figure 12 shown, a comparative schematic diagram of another second region 400 and third region 1100 is shown. Figure 12 The second region 400 shown in (a) can include a second writable sub-region 410, a second readable sub-region 420 (where there is no readable data in the second readable sub-region 420), and a second discarded sub-region 430. The third region 1100 can include a third writable sub-region 1110. Among them, the number of bytes corresponding to the second region can be Y mentioned above, and the number of bytes corresponding to the third region 1100 can be Z, and Z = Y > X.

[0155] And, similarly, the third writable sub-region 1110 in the third region 1100 has corresponding start and end addresses. The start address of the third writable sub-region 1110 is the start address of the third region 1100, and the end address of the third writable sub-region 1110 is the end address of the third region 1100.

[0156] In addition, the start address of the third region 1100 (i.e., the start address of the third writable sub-region 1110) has corresponding index information, usually denoted as the start index, such as "0", and the end address of the third region 1100 (i.e., the end address of the third writable sub-region 1110) also has corresponding index information, usually denoted as the maximum index (length) after reduction.

[0157] It can be understood that the binary data processing method provided by the embodiments of the present application can be applied to an electronic device. The following is an exemplary introduction to the hardware structure of the electronic device to which the binary data processing method provided by the embodiments of the present application is applicable.

[0158] As Figure 13As shown, the electronic device 100 may include a processor 110, an external memory interface 1320, an internal memory 1321, a universal serial bus (USB) interface 1330, a charging management module 1340, a power management module 1341, a battery 1342, an antenna, a wireless communication module 1350, an audio module 1360, a speaker 1360A, a receiver 1360B, a microphone 1360C, a headphone interface 1360D, a camera 1370, a display screen 1380, etc.

[0159] It can be understood that the structure schematically shown in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or combine certain components, or split certain components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0160] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or integrated in one or more processors.

[0161] The controller may generate operation control signals according to the instruction operation code and timing signals to complete the control of fetching and executing instructions. The processor 110 may control the fetching and execution of instructions through the controller to implement the binary data processing method provided in the embodiments of the present application. For example, the processor 110 may control the fetching and execution of instructions through the controller to implement the above Figure 2 、 Figure 7 、 Figure 8 or Figure 10 each step corresponding to the implementation in the processes shown.

[0162] A memory can also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store the instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to use the instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0163] The wireless communication function of the electronic device can be implemented through an antenna, a wireless communication module 1350, a modulation and demodulation processor, a baseband processor, etc.

[0164] The antenna is used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device can be used to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization rate of the antennas. For example, the antenna can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0165] The wireless communication module 1350 can provide solutions for wireless communications applied to the electronic device, including wireless local area networks (WLANs) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite systems (GNSSs), frequency modulation (FM), near field communication (NFC), infrared technology (IR), etc. The wireless communication module 1350 can be one or more devices integrating at least one communication processing module. The wireless communication module 1350 receives electromagnetic waves via the antenna, performs frequency modulation and filtering processing on the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 1350 can also receive the signals to be sent from the processor 110, perform frequency modulation on them, amplify them, and convert them into electromagnetic waves via the antenna for radiation.

[0166] The electronic device implements the display function through a GPU, a display screen 1380, an application processor, etc. The GPU is a microprocessor for image processing, and is connected to the display screen 1380 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs, which execute program instructions to generate or change display information.

[0167] The display screen 1380 is used to display images, videos, etc. The display screen 1380 includes a display panel. The display panel can adopt a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Mini-LED, a MicroLED, a Micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device may include one or N display screens 1380, where N is a positive integer greater than 1.

[0168] In some cases, the embodiments disclosed in the present application can be implemented in hardware, firmware, software, or any combination thereof.

[0169] The embodiments disclosed in the present application can also be implemented as instructions carried or stored on one or more transient or non-transient machine-readable (e.g., computer-readable) storage media, which can be read and executed by one or more processors. For example, the instructions can be distributed via a network or via other computer-readable media. Thus, the machine-readable media can include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), including but not limited to, floppy disks, optical disks, optical discs, magneto-optical discs, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic or optical cards, flash memory, or tangible machine-readable memories for transmitting information in the form of electrical, optical, acoustic, or other propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.) using the Internet. Therefore, the machine-readable media includes any type of machine-readable media suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).

[0170] The embodiments of the present application can be implemented as a computer program or program code executed on a programmable system, which includes at least one processor, a storage system (including volatile and non-volatile memories and / or storage elements), at least one input device, and at least one output device.

[0171] Program code can be applied to the input instructions to perform the various functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, a processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application specific integrated circuit, or a microprocessor.

[0172] The program code can be implemented in a high-level procedural language or an object-oriented programming language to communicate with the processing system. When needed, the program code can also be implemented in an assembly language or a machine language. In fact, the mechanisms described in this application are not limited to the scope of any particular programming language. In any case, the language can be a compiled language or an interpreted language.

[0173] The above describes the possible hardware structure of an electronic device. It can be understood that the structure illustrated in the embodiments of this application does not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device can include more or fewer components than shown in the figure, or combine certain components, or split certain components, or have different component arrangements. The illustrated components can be implemented in hardware, software, or a combination of software and hardware.

[0174] In the drawings, some structural or method features may be shown in a specific arrangement and / or order. However, it should be understood that such a specific arrangement and / or order may not be required. Instead, in some embodiments, these features can be arranged in a manner and / or order different from that shown in the illustrative drawings. Additionally, including a structural or method feature in a particular figure does not imply that such a feature is required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.

[0175] It should be noted that in the examples and the specification of this patent, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising one" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0176] Although the present application has been illustrated and described by reference to certain embodiments thereof, those of ordinary skill in the art should understand that various changes may be made therein in form and detail without departing from the scope of the present application.

Claims

1. A binary data processing method, characterized in that, Applied to an electronic device, the method includes: Obtain a first instruction, where the first instruction indicates writing first data of a first number of bytes into a first writable sub-region, and the first writable sub-region is a writable sub-region in a first region of the memory; Obtain the number of bytes corresponding to the first writable sub-region; Compare the size of the first number of bytes with the number of bytes corresponding to the first writable sub-region; In the case where the first number of bytes is greater than the number of bytes corresponding to the first writable sub-region, determine a second region from the memory, where the number of bytes corresponding to the second region is greater than the number of bytes corresponding to the first region; Write the first data into the second region; The determining the second region from the memory includes: Determine a first candidate number of bytes, where the first candidate number of bytes is the sum of a preset number of bytes and the number of bytes corresponding to the first writable sub-region; Compare the size of the first number of bytes with the first candidate number of bytes; In the case where the first number of bytes is less than or equal to the first candidate number of bytes, determine the second region from the memory according to the first candidate number of bytes; or, The second region includes a second writable sub-region, In the case where the first number of bytes is greater than the first candidate number of bytes, update the first candidate number of bytes according to the preset number of bytes until the first number of bytes is less than or equal to the updated first candidate number of bytes, determine the updated first candidate number of bytes as the second candidate number of bytes, use the second candidate number of bytes as the number of bytes corresponding to the second writable sub-region, and determine the second region from the memory.

2. The method according to claim 1, wherein The first region further includes a first readable sub-region, the second region includes a second writable sub-region and a second readable sub-region, The writing the first data into the second region includes: Write the data in the first readable sub-region into the second readable sub-region, and write the first data into the second writable sub-region.

3. The method according to claim 2, characterized in that The writing the first data into the second writable sub-region includes: Obtain first index information corresponding to the second writable sub-region, where the first index information represents the offset number of bytes between the starting address of the second writable sub-region and the starting address of the second region; Starting from a first address corresponding to the first index information in the second writable sub-region, write the first data into the second writable sub-region.

4. The method according to claim 3, wherein The method further includes: According to the first number of bytes, update the index information corresponding to the second writable sub-region from the first index information to second index information, where the second index information represents the sum of the offset number of bytes represented by the first index information and the first number of bytes.

5. The method according to claim 1, wherein The second region includes a second readable sub-region, The method further includes: Obtain a second instruction, where the second instruction is used to indicate reading second data of a second number of bytes from the second readable sub-region; Determine the reading type of the second instruction; In the case where the reading type of the second instruction is a sequential reading type, process the second readable sub-region in a first manner; When the read type of the second instruction is a random read type, the second readable sub-region is processed in a second manner.

6. The method according to claim 5, wherein The processing of the second readable sub-region in the first manner includes: Obtaining third index information corresponding to the second readable sub-region, where the third index information represents the number of offset bytes between the start address of the second readable sub-region and the start address of the second region; Reading the second data of the second byte count from the second readable sub-region according to the third index information; Updating the index information corresponding to the second readable sub-region from the third index information to fourth index information; where the fourth index information represents the sum of the number of offset bytes represented by the third index information and the second byte count.

7. The method according to claim 5, wherein The processing of the second readable sub-region in the second manner includes: Obtaining third index information corresponding to the second readable sub-region and obtaining read index information from the second instruction; Reading the second data of the second byte count from the second readable sub-region according to the read index information; Maintaining the index information corresponding to the second readable sub-region as the third index information.

8. The method according to claim 1, characterized in that, The second region includes a second readable sub-region, The method further includes: Obtaining the number of bytes corresponding to the second readable sub-region; Comparing the number of bytes corresponding to the first region with the number of bytes corresponding to the second readable sub-region; When the number of bytes corresponding to the first region is greater than the number of bytes corresponding to the second readable sub-region, reducing the second region to a third region, where the number of bytes corresponding to the third region is less than or equal to the number of bytes corresponding to the second region.

9. The method according to claim 8, wherein The determining of the third region from the memory includes: Obtaining the third byte count of the third data stored in the second readable sub-region; When the third byte count is non-zero, determining the third region from the memory according to the number of bytes corresponding to the first region, where the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the first region; When the third byte count is zero, reducing the second region to a third region according to the number of bytes corresponding to the second region, where the number of bytes corresponding to the third region is the same as the number of bytes corresponding to the second region.

10. The method according to claim 9, wherein When the third byte count is non-zero, the third region includes a third readable sub-region and a third writable sub-region, where the number of bytes corresponding to the third readable sub-region is the same as the number of bytes corresponding to the second readable sub-region.

11. The method according to claim 10, wherein The method further includes: Writing the third data into the third readable sub-region.

12. The method according to claim 9, wherein When the third byte count is zero, the third region includes a third writable sub-region, and the number of bytes corresponding to the third writable sub-region is the same as the number of bytes corresponding to the second region.

13. An electronic device, characterized in that, Includes: A memory for storing instructions executed by one or more processors of the electronic device, and a processor, which is one of the one or more processors of the electronic device, for executing the binary data processing method according to any one of claims 1-12.

14. A readable storage medium, characterized in that, Instructions are stored on the readable storage medium, and when the instructions are executed on the electronic device, the electronic device executes the binary data processing method according to any one of claims 1-12.

15. A computer program product, characterized in that, The computer program product includes computer instructions, and when executed by the electronic device, the electronic device executes the computer program code of the binary data processing method according to any one of claims 1-12.

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