Method for generating logic table and related device
By identifying the target text information and port information in the circuit schematic diagram, the logical table of the RF path is generated, which solves the problems of long periods and error-proneness of manually configured RF paths, and realizes automated configuration, improving efficiency and accuracy.
Patent Information
- Application Number
- CN202411279695.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-12
- Publication Date
- 2025-02-18
AI Technical Summary
In the prior art, configuring RF paths requires manual identification and sorting of complex schematic diagrams and data manuals, resulting in long work cycles and prone to errors.
By identifying the target text information in the circuit schematic, determining the target devices and ports associated with the band, finding the port parameter information, generating a logical table, and realizing automated configuration.
Reduces work cycles, improves work efficiency, and ensures the accuracy and correctness of logical tables.
Smart Images
Figure CN119476145A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of image and text recognition, and in particular to a method for generating a logic table and a related device. Background Art
[0002] The current work of configuring RF channels basically relies on manual identification and sorting of schematic diagrams and related data manuals. The staff first analyzes the schematic diagram to obtain the relationship between each device and the connection relationship between the ports, further sorts out the logic table, and finally configures the RF channel according to the logic table. Often the schematic diagram is complex and the related data manuals range from dozens of pages to thousands of pages, which makes the above manual sorting process long. In order to ensure the correctness of the sorted logic table, it is also necessary to check it after the RF channel is configured. If there is an error, the staff is further required to proofread the logic table according to the schematic diagram or reorganize the logic table, which once again prolongs the work cycle. Summary of the invention
[0003] In order to solve the above technical problems, the present application provides a method for generating a logic table and related devices for improving the working efficiency of circuit configuration.
[0004] The technical solution provided in this application is described below:
[0005] The first aspect of the present application provides a method for generating a logic table, comprising:
[0006] Identify target text information in a circuit schematic diagram, wherein the target text information is text information associated with a band;
[0007] Determining a target device associated with the band in the circuit schematic according to the target text information;
[0008] Identifying a target port of the target device in the circuit schematic;
[0009] Searching for parameter information of the target port through a preset hardware product specification;
[0010] A logic table of the band is generated according to the band, the target device, the target port, and parameter information of the target port.
[0011] Optionally, before identifying the target text information in the circuit schematic diagram, the method further includes:
[0012] The circuit schematic diagram is preprocessed, and the preprocessing includes at least one of the following: grayscale, binarization and noise removal.
[0013] Optionally, generating a logic table of the band according to the band, the target device, the target port, and parameter information of the target port includes:
[0014] Integrate the band, the target device, the target port, and parameter information of the target port to obtain channel description information of the band;
[0015] The path description information of the band is input into the target model to obtain the logic table of the band.
[0016] Optionally, after generating the logic table of the band according to the band, the target device, the target port, and the parameter information of the target port, the method further includes:
[0017] Inputting the logic table into a path configuration model for simulation and obtaining simulation results;
[0018] The correctness of the logic table is detected according to the simulation result.
[0019] Optionally, the band is a single band, and determining a target device associated with the band in the circuit schematic according to the target text information includes:
[0020] Determine the complete path from input to output of the band corresponding to the text information of the band in the circuit schematic according to the association algorithm;
[0021] The target device and the connection point passed by the complete path are determined.
[0022] Optionally, the band is a plurality of bands, and determining the target device associated with the band in the circuit schematic according to the target text information comprises:
[0023] The target text information is distinguished according to the name of each band to obtain text information of each band;
[0024] Determine the complete path from input to output of the band corresponding to the text information of each band in the circuit schematic according to the association algorithm;
[0025] The target device and the connection point passed by the complete path are determined.
[0026] Optionally, the determining the target device and the connection point passed through on the complete path includes:
[0027] Visually display the complete path;
[0028] In response to a modification instruction for the complete path, obtaining the modified complete path;
[0029] The target device and the connection point passed by the modified complete path are determined.
[0030] A second aspect of the present application provides a device for generating a logic table, including:
[0031] A text recognition unit is used to recognize target text information in a circuit schematic diagram, wherein the target text information is text information associated with a band;
[0032] A determination unit, configured to determine a target device associated with the band in the circuit schematic according to the target text information;
[0033] An identification port unit, used for identifying a target port of the target device in the circuit schematic;
[0034] A search unit, used to search for parameter information of the target port through a preset hardware product specification;
[0035] A generating unit is used to generate a logic table of the band according to the band, the target device, the target port, and parameter information of the target port.
[0036] A third aspect of the present application provides an electronic device, the device comprising:
[0037] Processor, memory, input-output unit, and bus;
[0038] The processor is connected to the memory, the input and output unit, and the bus;
[0039] The memory stores a program, and the processor calls the program to execute the first aspect and the optional method for generating a logic table in any one of the first aspect.
[0040] A fourth aspect of the present application provides a computer-readable storage medium, on which a program is stored. When the program is executed on a computer, the method for generating a logic table according to the first aspect and any optional item in the first aspect is executed.
[0041] It can be seen from the above technical solutions that this application has the following advantages:
[0042] The method for generating a logic table of the present application first identifies the target text information in the circuit schematic diagram, where the target text information is text information associated with the band; then determines the target device associated with the band in the circuit schematic diagram based on the target text information; then identifies the target port of the target device in the circuit schematic diagram; further searches for the parameter information of the target port through the preset hardware product specification; and finally generates the logic table of the band based on the band, target device, target port, and parameter information of the target port. Thus, the logic table is automatically generated, the work cycle is reduced, and the work efficiency is improved. And because of the characteristics of the schematic diagram itself with black text on a white background, there are few interference factors, so that the accuracy and correctness of the recognition are guaranteed. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] In order to more clearly illustrate the technical solutions in the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0044] Figure 1 A flow chart of an embodiment of a method for generating a logic table provided in the present application;
[0045] Figure 2 A flowchart of another embodiment of the method for generating a logic table provided by the present application;
[0046] Figure 3 A flowchart of another embodiment of the method for generating a logic table provided by the present application;
[0047] Figure 4 A flowchart of another embodiment of the method for generating a logic table provided by the present application;
[0048] Figure 5 A flowchart of another embodiment of the method for generating a logic table provided by the present application;
[0049] Figure 6 A flowchart of another embodiment of the method for generating a logic table provided by the present application;
[0050] Figure 7 A schematic diagram of the structure of an embodiment of a device for generating a logic table provided by the present application;
[0051] Figure 8 A schematic diagram of the structure of an embodiment of an electronic device provided in this application. DETAILED DESCRIPTION
[0052] It should be noted that the method for generating a logic table provided in the present application can be applied to a terminal, a system, or a server. For example, the terminal can be a smart phone or a computer, a tablet computer, a smart TV, a smart watch, a portable computer terminal, or a fixed terminal such as a desktop computer. For the convenience of explanation, the present application uses a terminal as an example for explanation.
[0053] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0054] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.
[0055] Optical Character Recognition (OCR) technology refers to the technology that electronic devices use optical methods to convert text in paper documents into black and white dot matrix image files, and use recognition software to convert the text in the image into text format for further editing and processing by word processing software. OCR technology converts images, thereby reducing the storage volume of image data, and the recognized text can be reused and analyzed, which can also save manpower and time for manual recognition and sorting and keyboard input.
[0056] See also Figure 1 The method for generating a logic table according to the first aspect of the present invention may include, but is not limited to:
[0057] Step S101, identifying target text information in a circuit schematic diagram, where the target text information is text information associated with a band;
[0058] Step S102, determining a target device associated with a band in a circuit schematic according to the target text information;
[0059] Step S103, identifying a target port of a target device in a circuit schematic diagram;
[0060] Step S104, searching for parameter information of the target port through a preset hardware product specification;
[0061] Step S105, generating a logic table of the band according to the band, target device, target port, and parameter information of the target port.
[0062] The method for generating a logic table of the present application first identifies the target text information in the circuit schematic diagram, where the target text information is text information associated with the band; then determines the target device associated with the band in the circuit schematic diagram based on the target text information; then identifies the target port of the target device in the circuit schematic diagram; further searches for the parameter information of the target port through the preset hardware product specification; and finally generates the logic table of the band based on the band, target device, target port, and parameter information of the target port. This allows the logic table to be automatically generated, reduces the work cycle, and improves work efficiency. And because of the characteristics of the schematic diagram itself with black text on a white background, there are few interference factors, so that the accuracy and correctness of the recognition are guaranteed.
[0063] In step S101 of some embodiments, target text information in the circuit schematic is identified, and the target text information is text information associated with the band. Because the circuit schematic is concise and the lines and text information are clear, the technology used to identify the target text information in the circuit schematic in this embodiment can be OCR image and text recognition technology. The information of the circuit schematic is identified and extracted using OCR image and text recognition technology, and further merged and organized with the content in the hardware product specification book, which can assist the staff in configuring the circuit, reduce the pressure of configuration work, and improve the work efficiency of the staff. It should be noted that there can be multiple bands, and different bands correspond to different target text information, that is, each band has a corresponding device combination.
[0064] The circuit schematic diagram illustrates the band carried by the circuit in the diagram, that is, it shows which devices in the circuit schematic diagram a certain band passes through. Therefore, the target text information in the circuit schematic diagram, that is, the text information associated with the band, can be extracted through simple text recognition. The text information associated with the band contains the name of the band and the frequency range of the band, etc., which is convenient for the subsequent classification of other information of the circuit schematic diagram into the classification of the band. It should be noted that before identifying the target text information in the circuit schematic diagram in step S101, the circuit schematic diagram can also be preprocessed to reduce factors in the circuit schematic diagram that interfere with text recognition or image recognition, and further improve the accuracy of image and text recognition and subsequent organization and conversion into a logic table. The preprocessing operation includes at least one of the following methods: grayscale, binarization and denoising.
[0065] In step S102 of some embodiments, the target device associated with the band is determined in the circuit schematic according to the target text information. In step S101, the target text information in the circuit schematic is obtained by text recognition, and then in step S102, the device represented by the target text information that passes through the band is determined, that is, the target device associated with the band. The target devices are sorted out first to facilitate the subsequent sorting of the associations between the target devices and to avoid multiple target devices being mixed and classified into the wrong band classification. It should be noted that when there is only one device passing through the band, the target device is a single device; when there are multiple devices passing through the band, the target device is a combination of multiple devices.
[0066] Reference Figure 2 When the band is a single band, step S102 determines the target device associated with the band in the circuit schematic according to the target text information, and specifically includes, but is not limited to, the following:
[0067] Step S201, determining the complete path from input to output of the band corresponding to the text information of the band in the circuit schematic according to the association algorithm;
[0068] Step S202, determining the target devices and connection points passed through on the complete path.
[0069] In steps S201 to S202 of some embodiments, the complete path from input to output of the band corresponding to the text information of the band is first determined in the circuit schematic according to the association algorithm; then the target devices and connection points passed on the complete path are determined. The association algorithm gradually tracks the propagation path of the signal in the circuit based on the connection logic and signal flow direction rules of the circuit. First, the signal input point is located in the circuit schematic, and the input point may be an antenna interface, a signal source, or other device port that can introduce the band signal. Then, during the tracking process, the association algorithm considers various target devices (such as filters, amplifiers, mixers, etc.) that the signal may pass through, as well as the processing effects of these target devices on the signal (such as filtering, amplification, frequency conversion, etc.). At the same time, the association algorithm also determines the actual flow direction of the signal based on the connection mode and signal characteristics (such as frequency, phase, amplitude, etc.) between the target devices. Further through continuous iteration and calculation, the association algorithm can finally determine the complete path of the band signal from the input point to the output point. This path contains all the components and connecting lines involved in signal processing, which fully reflects the propagation and processing process of the band signal in the circuit.
[0070] After determining the complete path of the band signal, the next step is to identify and determine all the target devices passing through this path and the connection points between them. Check each target device on the path one by one along the complete path determined in step S201. At the same time, record the position of each target device on the path and the connection relationship between them. Among them, the connection point refers to the connection between target devices or between the target device and the input and output points. These connection points may be physical connection points such as wires, pins, solder joints, or logical connection points (such as signal intersection points, branch points, etc.). When recording the connection points, it is necessary to clarify the specific location and connection method of each connection point for subsequent analysis and design work. Thereby clearly understanding the propagation path of a single band signal in the circuit and the specific information of each target device and connection point on the path.
[0071] Reference Figure 3 When there are multiple bands, step S102 determines the target device associated with the band in the circuit schematic according to the target text information, and specifically includes, but is not limited to, the following:
[0072] Step S301, distinguishing the target text information according to the name of each band, and obtaining the text information of each band;
[0073] Step S302, determining the complete path from input to output of the band corresponding to the text information of each band in the circuit schematic according to the association algorithm;
[0074] Step S303, determining the target devices and connection points passed through on the complete path.
[0075] In steps S301 to S303 of some embodiments, the target text information is first distinguished according to the name of each band to obtain the text information of each band; then the complete path from input to output of the band corresponding to the text information of each band is determined in the circuit schematic according to the association algorithm; and then the target devices and connection points passed on the complete path are determined. When performing logic table conversion on the circuit schematics corresponding to multiple bands at the same time, it is necessary to first distinguish each band and the corresponding circuit schematic to avoid information and data confusion during conversion, and then gradually determine the complete path from input to output corresponding to each band. Specifically, the association arrangement of each complete path in steps S302 to S303 is similar to steps S201 to S202, and will not be repeated here.
[0076] Reference Figure 4 The target devices and connection points determined on the complete path in step S202 or step S303 may specifically include, but are not limited to, the following:
[0077] Step S401, visually displaying the complete path;
[0078] Step S402, responding to the modification instruction for the complete path, obtaining a modified complete path;
[0079] Step S403, determining the target devices and connection points passed by the modified complete path.
[0080] In steps S401 to S403 of some embodiments, after the complete path is determined, a graphical user interface (GUI) technology can be used to use the circuit schematic as a background image, and a transparent layer for drawing the path is superimposed on it. Then, the propagation path of the band signal from input to output is drawn on the transparent layer. The path can be represented by lines of different colors to distinguish different signal flows or processing stages. At the same time, corresponding identifiers or icons can be marked at key nodes of the path (such as ports, connection points, etc. of the target device) for quick identification.
[0081] In the actual design process, the complete path of the band signal can be modified according to actual needs. For example, the modification instructions issued by the user through the GUI can be monitored, such as click, drag, delete and other operations. When the user chooses to modify a path segment or node, the modified complete path is automatically calculated and generated according to the user's operation type and operation location. For example, if the user wants to add a new target device to the path, the user can be allowed to drag and drop the device icon to the appropriate position, and automatically connect the port of the device to the path. If the user needs to delete a path segment or node, the system will update the display of the path according to the deletion operation to ensure the continuity and integrity of the path.
[0082] After obtaining the modified complete path, because the modification operation may change the direction of the path or add / delete target devices, thereby affecting the distribution of target devices and connection points on the path, it is necessary to redetermine all target devices passed by the path and the connection points between them. Specifically, traverse the modified complete path, and identify all target devices involved in signal processing based on the node and connection line information on the path. Then record the key information such as the position, model, function, etc. of each target device on the path. And redetermine the connection point information between the target devices, including the location of the connection point, the connection method (such as series, parallel, etc.) and the signal conversion or processing process that may be involved.
[0083] In step S103 of some embodiments, the target port of the target device in the circuit schematic is identified. Most electronic components have multiple input and output ports, and the ports used in different circuits are also different. Therefore, the OCR image recognition technology mentioned in step S101 can be used to identify which port of the target device the circuit line in the circuit schematic is specifically connected to, and obtain the port information of the target device. The port information includes the port name and port location, etc.
[0084] In step S104 of some embodiments, the parameter information of the target port is searched through a preset hardware product specification. The hardware product information of multiple electronic components in the circuit schematic is recorded in the hardware product specification. The product information corresponding to each target device can be found in the hardware product specification, thereby determining the mapping relationship between the port information of the target device and the product information of the target device. First, search the device corresponding to the target port in the hardware product specification according to the target port; then obtain all the parameter information of the device; finally, associate the parameter information with the target port so that the target port and the parameter information form a unique mapping relationship. The parameter information obtained in step S104 includes the port name and port location, etc.
[0085] In step S105 of some embodiments, a logical table of the band is generated according to the parameter information of the band, the target device, the target port, and the target port. In step S105, the parameter information of the band, the target device, the target port, and the target port is input into the target model, so that the target model generates a logical table of the band. The structure and content of the band logic table are designed according to actual needs, usually including the frequency band range and frequency band number of the band, the model of the target device, the number and function description of the target port, and other corresponding information (such as impedance, frequency response range, port connection relationship, etc.). It should be noted that if there are multiple bands, a logical table of each band corresponding to the circuit schematic diagram is generated.
[0086] Reference Figure 5 In step S105, the logic table of the band generated according to the band, target device, target port, and parameter information of the target port may specifically include, but is not limited to, the following:
[0087] Step S501, integrating the band, target device, target port, and parameter information of the target port to obtain channel description information of the band;
[0088] Step S502, input the channel description information of the band into the target model to obtain the logical table of the band.
[0089] In steps S501 to S502 of some embodiments, the band, target device, target port, and parameter information of the target port are first integrated to obtain the path description information of the band; then the path description information of the band is input into the target model to obtain the logic table of the band. The target model can be an AI sorting model, which can sort scattered information data into a logic table according to the logic table writing rules, thereby realizing the conversion of the schematic diagram into a logic table. The information in the logic table includes band name, signal classification, device name, pin number, pin name, hexadecimal setting, etc.
[0090] See also Figure 6In order to ensure that the logic table output by the target model in step S105 is correct and avoid affecting the subsequent actual configuration of the circuit due to errors in the logic table, simulation can be performed on the logic table, which may include, but is not limited to, the following:
[0091] Step S601, inputting the logic table into the path configuration model for simulation and obtaining simulation results;
[0092] Step S602: Check the correctness of the logic table according to the simulation result.
[0093] In steps S601 to S602 of some embodiments, the logic table is input into the channel configuration model for simulation, and the simulation results are obtained; then the correctness of the logic table is detected based on the simulation results. After the existing manual logic table workflow is completed, the logic table can only be detected whether it is wrong after the logic table configuration is completed, thereby lengthening the cycle to a greater extent. After the present application obtains the logic table through image and text recognition technology and AI model arrangement, the logic table is input into the channel configuration model for simulation. The channel configuration model configures the circuit according to the logic table and obtains the simulation results. The correctness of the logic table is detected by whether the simulation results meet expectations, thereby greatly reducing the cycle of RF configuration work.
[0094] The above embodiment describes the method for generating a logic table provided by the present application. The following describes the device and storage medium for generating a logic table provided by the present application:
[0095] See also Figure 7 , Figure 7 An embodiment of a device for generating a logic table provided in the present application includes:
[0096] The text recognition unit 701 is used to recognize target text information in the circuit schematic diagram, where the target text information is text information associated with the band;
[0097] A determination unit 702, configured to determine a target device associated with a band in a circuit schematic according to the target text information;
[0098] The port identification unit 703 is used to identify the target port of the target device in the circuit schematic diagram;
[0099] A search unit 704 is used to search for parameter information of a target port through a preset hardware product specification;
[0100] The generating unit 705 is used to generate a logic table of the band according to the band, the target device, the target port, and the parameter information of the target port.
[0101] In this embodiment, the target text information in the circuit schematic is first identified, and the target text information is text information associated with the band; then the target device associated with the band is determined in the circuit schematic according to the target text information; then the target port of the target device in the circuit schematic is identified; further, the parameter information of the target port is searched through the preset hardware product specification; finally, the logic table of the band is generated according to the band, target device, target port, and parameter information of the target port. Thus, the logic table is automatically generated, the working cycle is reduced, and the working efficiency is improved. And because of the characteristics of the schematic itself with black text on a white background, there are few interference factors, so that the accuracy and correctness of the recognition are guaranteed.
[0102] Optionally, before recognizing the text unit 701, the method further includes:
[0103] The preprocessing unit 706 is used to preprocess the circuit schematic diagram, and the preprocessing includes at least one of the following: grayscale, binarization and noise removal.
[0104] Optionally, the generating unit 705 is specifically configured to:
[0105] Integrate the band, target device, target port, and parameter information of the target port to obtain the channel description information of the band;
[0106] Input the channel description information of the band into the target model to obtain the logical table of the band.
[0107] Optionally, after the generating unit 705, the method further includes:
[0108] The simulation unit 707 is used to input the logic table into the path configuration model for simulation and obtain simulation results;
[0109] The detection unit 708 is used to detect the correctness of the logic table according to the simulation result.
[0110] Optionally, the band is a single band, and the determining unit 702 is specifically configured to:
[0111] Determine the complete path from input to output of the band corresponding to the text information of the band in the circuit schematic according to the association algorithm;
[0112] Determine the target devices and connection points along the complete path.
[0113] Optionally, the band is a plurality of bands, and the determining unit 702 is specifically configured to:
[0114] The target text information is distinguished according to the name of each band to obtain the text information of each band;
[0115] Determine the complete path from input to output of the band corresponding to the text information of each band in the circuit schematic according to the association algorithm;
[0116] Determine the target devices and connection points along the complete path.
[0117] Optionally, the determining unit 702 is specifically configured to:
[0118] Visualize the complete path;
[0119] Responding to the modification instruction for the complete path, obtaining the modified complete path;
[0120] Determine the target devices and connection points on the modified complete path.
[0121] This application also provides an electronic device, see Figure 8 , the electronic device comprises:
[0122] Processor 801, memory 802, input and output unit 803, bus 804;
[0123] The processor 801 is connected to the memory 802, the input and output unit 803 and the bus 804;
[0124] The memory 802 stores a program, and the processor 801 calls the program to execute the following steps: Figures 1 to 6 The method for generating a logic table as shown in any of the embodiments.
[0125] The present application also relates to a computer-readable storage medium, on which a program is stored, wherein when the program is run on a computer, the computer executes Figures 1 to 6 The method for generating a logic table as shown in any of the embodiments.
[0126] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0127] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.
[0128] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0129] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0130] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), disk or optical disk and other media that can store program code.
Claims
1. A method for generating a logic table, characterized in that: The method comprises: Identify target text information in a circuit schematic diagram, wherein the target text information is text information associated with a band; Determining a target device associated with the band in the circuit schematic according to the target text information; Identifying a target port of the target device in the circuit schematic; Searching for parameter information of the target port through a preset hardware product specification; A logic table of the band is generated according to the band, the target device, the target port, and parameter information of the target port.
2. The method according to claim 1, characterized in that Before the target text information in the circuit schematic is identified, the method further includes: The circuit schematic diagram is preprocessed, and the preprocessing includes at least one of the following: grayscale, binarization and noise removal.
3. The method according to claim 1, characterized in that The step of generating a logic table of the band according to the band, the target device, the target port, and parameter information of the target port includes: Integrate the band, the target device, the target port, and parameter information of the target port to obtain channel description information of the band; The path description information of the band is input into the target model to obtain the logic table of the band.
4. The method according to claim 1, characterized in that After generating the logic table of the band according to the band, the target device, the target port, and the parameter information of the target port, the method further includes: Inputting the logic table into a path configuration model for simulation and obtaining simulation results; The correctness of the logic table is detected according to the simulation result.
5. The method according to claim 1, characterized in that The band is a single band, and determining the target device associated with the band in the circuit schematic according to the target text information includes: Determine the complete path from input to output of the band corresponding to the text information of the band in the circuit schematic according to the association algorithm; The target device and the connection point passed by the complete path are determined.
6. The method according to claim 1, characterized in that The band is a plurality of bands, and determining the target device associated with the band in the circuit schematic according to the target text information comprises: The target text information is distinguished according to the name of each band to obtain text information of each band; Determine the complete path from input to output of the band corresponding to the text information of each band in the circuit schematic according to the association algorithm; The target device and the connection point passed by the complete path are determined.
7. The method according to claim 5 or 6, characterized in that The determining of the target device and the connection point passed through on the complete path includes: Visually display the complete path; In response to a modification instruction for the complete path, obtaining the modified complete path; The target device and the connection point passed by the modified complete path are determined.
8. A device for generating a logic table, characterized in that: include: A text recognition unit is used to recognize target text information in a circuit schematic diagram, wherein the target text information is text information associated with a band; A determination unit, configured to determine a target device associated with the band in the circuit schematic according to the target text information; An identification port unit, used for identifying a target port of the target device in the circuit schematic; A search unit, used to search for parameter information of the target port through a preset hardware product specification; A generating unit is used to generate a logic table of the band according to the band, the target device, the target port, and parameter information of the target port.
9. An electronic device, characterized in that: The electronic device comprises: Processor, memory, input-output unit, and bus; The processor is connected to the memory, the input and output unit, and the bus; The memory stores a program, and the processor calls the program to execute the method according to any one of claims 1 to 7.
10. A computer-readable storage medium having a program stored thereon, wherein the program, when executed on a computer, performs the method according to any one of claims 1 to 7.