Gate-controlled pixel driving circuit and Vth compensation method thereof

Abstract

The invention discloses a grid-controlled pixel driving circuit which comprises a first transistor, a second transistor and a third transistor, a first source drain electrode of the first transistor is coupled to a data signal line, a second source drain electrode of the first transistor is coupled to a pre-storage capacitor and a grid electrode of the second transistor, and the grid electrode of the first transistor is coupled to a control signal line; a first source drain electrode of the second transistor is coupled to a reference signal line, and a second source drain electrode of the second transistor is coupled to a first source drain electrode of the third transistor; the grid electrode of the third transistor is coupled to the transfer signal line, and the second source drain electrode is coupled to the pixel capacitor and the holding capacitor.

Description

Technical Field

[0001] The present invention relates to the field of pixel driving technology, and in particular to a gate-controlled pixel driving circuit and a Vth compensation method thereof. Background Art

[0002] In traditional field sequential or color sequential display driving technology, the backlight can only be turned on after all screen data is written and the liquid crystal is deflected to a stable state, otherwise the screen will be chaotic. Therefore, the data writing and liquid crystal deflection time will greatly compress the backlight turn-on time, resulting in difficulties in improving the brightness of the display, as well as difficulties in improving the refresh rate and resolution, increased power consumption and increased backlight material costs. Therefore, how to speed up the liquid crystal driving time and increase the backlight turn-on time is a very important issue.

[0003] Taking the traditional pre-storage driving circuit using charge sharing as an example, the pre-storage capacitor Cst is at least of the same order of magnitude as the pixel capacitor Clc. In some high-refresh products, it is even dozens of times larger than Clc, which greatly reduces the pixel aperture ratio. Since the size of Clc is related to the deflection of the liquid crystal, which is related to the voltage, and the response of the liquid crystal takes time, the shorter the charging time, the less time Clc has to react to the target potential capacitor, and Cst is required to continuously supply power to it.

[0004] In summary, the conventional pre-storage pixel driving circuit has the problem of low aperture ratio. Summary of the invention

[0005] In view of this, the present invention provides a gate-controlled pixel driving circuit, which solves the problem of low aperture ratio in the traditional pre-storage pixel driving circuit by improving the circuit structure and driving timing.

[0006] To solve the above problems, the technical solution of the present invention is to adopt a gate-controlled pixel driving circuit, including: a first transistor (M1), a second transistor (M2) and a third transistor (M3), wherein the first source and drain of the first transistor are coupled to the data signal line, the second source and drain are coupled to the pre-storage capacitor and the gate of the second transistor, and the gate is coupled to the control signal line; the first source and drain of the second transistor are coupled to the reference signal line, and the second source and drain are coupled to the first source and drain of the third transistor; the gate of the third transistor is coupled to the transfer signal line, and the second source and drain are coupled to the pixel capacitor and the holding capacitor.

[0007] Optionally, the driving timing of the pixel driving circuit is configured as follows: in the backlight-on stage, the control signal jumps to a high potential, the first transistor is turned on, and after the data signal is stored in the pre-storage capacitor, the control signal jumps back to a low potential; in the backlight-off stage, the transfer signal jumps to a high potential, the reference signal jumps to a low potential, the second transistor and the third transistor are turned on, the second transistor operates in a linear region and after the pixel capacitor is reset based on the reference signal, the reference signal jumps to a high potential, the second transistor operates in a saturation region and transmits the data signal to the pixel capacitor, the transfer signal jumps to a low potential, the reference signal jumps to a low potential for the second time, the second transistor operates in a linear region, the third transistor is turned off, and after the second transistor resets the potential at the second source and drain of the second transistor for the second time based on the reference signal, the reference signal jumps to a normal potential.

[0008] Optionally, the pixel driving circuit disposed outside the pixel display area further includes a detection signal line, and the detection signal line is coupled to the second source and drain of the second transistor and the first source and drain of the third transistor.

[0009] Optionally, the pixel driving circuit arranged in the pixel display area also includes a fourth transistor, the gate of the fourth transistor is coupled to the reset signal line, the first source and drain are coupled to the global signal line, and the second source and drain are coupled to the pixel capacitor and the holding capacitor.

[0010] Optionally, one end of the pre-storage capacitor, the pixel capacitor and the holding capacitor away from the transistor is coupled to a common signal.

[0011] Accordingly, the present invention provides a Vth compensation method for a gate-controlled pixel driving circuit, which is applied to the above-mentioned pixel driving circuit, comprising: in the pre-calibration working stage of the pixel driving circuit, obtaining the threshold voltage change data of the third transistor that affects the liquid crystal grayscale voltage; generating a voltage compensation curve that changes with time based on the threshold voltage change data; and generating a data signal based on the voltage compensation curve and the target grayscale voltage.

[0012] Optionally, in the case where the pixel driving circuit arranged outside the pixel display area includes a detection signal line, the compensation method also includes: generating a threshold voltage change rate based on the threshold voltage change data; generating multiple monitoring time points with varying time intervals based on the threshold voltage change rate; at the monitoring time points, obtaining the measured threshold voltage of the third transistor through the detection signal line; and correcting the voltage compensation curve based on the measured threshold voltage.

[0013] Optionally, at the monitoring time point, the measured threshold voltage of the third transistor is obtained through the detection signal line, including: in the previous frame of the monitoring time point, the pixel driving circuit arranged outside the pixel display area writes the test voltage to the pre-storage capacitor through the data signal line, at this time, the pixel driving circuit arranged in the pixel display area normally writes the data signal for display; in the current frame of the detection time point, when the transfer signal jumps to a high potential, the measured voltage is obtained based on the detection signal line; and the measured threshold voltage is generated based on the measured voltage and the test voltage.

[0014] Optionally, the test voltage is configured such that the test voltages of the pixel driving circuits in adjacent columns outside the pixel display area have the same absolute value and opposite polarities. The primary improvement of the present invention is the gate-controlled pixel driving circuit provided. By setting a pre-storage capacitor in cooperation with the transistor, the grayscale voltage of the next frame is stored by the pre-storage capacitor during the backlight emission time of the current frame, so that all pixels can synchronously realize the grayscale voltage when the backlight is turned off, which greatly reduces the writing time of the pixel voltage and relatively increases the backlight emission time. Moreover, since the pixel driving circuit does not require a pre-storage capacitor for charge sharing and only needs to use its stored potential as a gate control signal, its capacitance value is very small and does not need to occupy too much aperture ratio, thus solving the problem of low aperture ratio in traditional pre-storage pixel driving circuits.

[0015] At the same time, the present invention achieves the voltage reversal of both ends of the liquid crystal capacitor with the frame through the linear region reset and the driving timing of the saturation region writing, thereby avoiding the liquid crystal polarization problem, eliminating the residual data of the previous frame through the first reset, and ensuring the writing of the pixel voltage with reversed polarity, and then reducing the gate-source-drain voltage difference of the driving transistor through the second reset, thereby increasing the stability of the device, reducing Vth drift, improving the accuracy of grayscale voltage, and improving the accuracy of grayscale display of the picture.

[0016] Furthermore, the present invention constructs a voltage compensation curve to achieve further compensation of the grayscale voltage through a peripheral processing unit, thereby further improving the accuracy of the grayscale voltage and the accuracy of the grayscale display of the picture. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a simplified circuit diagram of a pixel driving circuit of the present invention; Figure 2 is a simplified driving timing diagram of the pixel driving circuit of the present invention; Figure 3 is a simplified circuit diagram of a pixel driving circuit outside a preferred pixel display area of ​​the present invention; Figure 4 is a simplified circuit diagram of a pixel driving circuit in a preferred pixel display area of ​​the present invention; Figure 5 It is a simplified driving timing diagram of a pixel driving circuit in a preferred pixel display area of ​​the present invention; Figure 6 It is a schematic diagram of the threshold voltage variation data of the present invention. DETAILED DESCRIPTION

[0018] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0019] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0021] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0023] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0024] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0025] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0026] Specifically, Figure 1 As shown, the present invention includes: a first transistor M1, a second transistor M2 and a third transistor M3, wherein the first source and drain of the first transistor M1 are coupled to the data signal line Data, the second source and drain are coupled to the pre-storage capacitor Cst1 and the gate of the second transistor M2, and the gate is coupled to the control signal line Scan; the first source and drain of the second transistor M2 are coupled to the reference signal line Vst, the second source and drain are coupled to the first source and drain of the third transistor M3; the gate of the third transistor M3 is coupled to the transfer signal line Tran, and the second source and drain are coupled to the pixel capacitor Clc and the holding capacitor Cst2.

[0027] Further, such as Figure 2 As shown, the driving timing of the pixel driving circuit can be configured as: In the backlight-on stage, the control signal jumps to a high potential, the first transistor M1 is turned on, and after the data signal is stored in the pre-storage capacitor Cst1 , the control signal jumps back to a low potential.

[0028] In the backlight off stage, the transfer signal jumps to a high potential, the reference signal jumps to a low potential, the second transistor M2 and the third transistor M3 are turned on, the second transistor M2 operates in the linear region and after the pixel capacitor is reset based on the reference signal, the reference signal jumps to a high potential, the second transistor M2 operates in the saturation region and transmits the data signal to the pixel capacitor Clc, the transfer signal jumps to a low potential, the reference signal jumps to a low potential for the second time, the second transistor M2 operates in the linear region, the third transistor M3 is turned off, the second transistor M2 resets the potential at the second source and drain of the second transistor M2 for the second time based on the reference signal, and then the reference signal jumps to a normal potential.

[0029] The present invention sets a pre-storage capacitor in cooperation with a transistor so that during the backlight emission time of the current frame, the grayscale voltage of the next frame is stored by the pre-storage capacitor, so that when the backlight is turned off, all pixels synchronously realize the grayscale voltage, which greatly reduces the writing time of the pixel voltage and relatively increases the backlight emission time. Moreover, since the pixel driving circuit does not need the pre-storage capacitor for charge sharing and only needs to use the stored potential as the gate control signal, its capacitance value is very small and does not need to occupy too much aperture ratio, thus solving the problem of low aperture ratio in the traditional pre-storage pixel driving circuit.

[0030] In addition, the present invention achieves the voltage reversal of the two ends of the liquid crystal capacitor with the frame through the linear region reset and the saturation region writing driving timing, thereby avoiding the liquid crystal polarization problem, and eliminating the residual data of the previous frame through the first reset, and ensuring the writing of the pixel voltage with reversed polarity, and then ensuring the same column of pixel driving crystal when the positive and negative frames are switched through the second reset. The Vds of the tube is 0, which is beneficial to the stability of the device, reduces Vth drift, improves the accuracy of grayscale voltage, and improves the accuracy of grayscale display of the picture.

[0031] It should be noted that the high potential of the control signal and the transfer signal is defined as a potential that can turn on the transistor, and the low potential of the control signal and the transfer signal is defined as a potential that can turn off the transistor; the high potential of the reference signal is defined as a potential higher than Vop-max, the normal potential is defined as the same as the common signal Com, and the low potential is defined as lower than the common signal Com.

[0032] Further, such as Figure 3 As shown, the pixel driving circuit disposed outside the pixel display area further includes a detection signal line Signal, and the detection signal line Signal is coupled to the second source and drain of the second transistor M2 and the first source and drain of the third transistor M3. The present invention can monitor the Vth drift characteristics of the circuit device without affecting the in-plane aperture ratio and the in-plane display by disposing the detection line outside the AA area (pixel display area), and pre-compensate the written data signal by calculating through the peripheral data processing unit (T-con).

[0033] Further, such as Figure 4 As shown, the pixel driving circuit arranged in the pixel display area also includes a fourth transistor M4, the gate of the fourth transistor M4 is coupled to the reset signal line Reset, the first source and drain are coupled to the global signal line Ref, and the second source and drain are coupled to the pixel capacitor Clc and the holding capacitor Cst2.

[0034] Specifically, Figure 5 As shown, the driving timing of the pixel driving circuit including the fourth transistor M4 is configured as follows: In the backlight-on stage, the control signal jumps to a high potential, the first transistor is turned on, and after the data signal is stored in the pre-storage capacitor, the control signal jumps back to a low potential.

[0035] In the backlight off stage, the reset signal jumps to a high potential, the fourth transistor is turned on and resets the pixel capacitor based on the global signal, the reset signal jumps back to a low potential, after the fourth transistor, the transfer signal and the reference signal jump to a high potential, the second transistor operates in the saturation region and transmits the data signal to the pixel capacitor, the transfer signal jumps to a low potential, the reference signal jumps to a low potential twice, the second transistor operates in the linear region, the third transistor is turned off, the second transistor resets the potential at the second source and drain of the second transistor twice based on the reference signal, and then the reference signal jumps to a normal potential.

[0036] Furthermore, one end of the pre-storage capacitor Cst1 , the pixel capacitor Clc and the holding capacitor Cst2 away from the transistor is coupled to a common signal Com.

[0037] Accordingly, the present invention provides a Vth compensation method for a gate-controlled pixel driving circuit, which is applied to the above-mentioned pixel driving circuit, comprising: S1: In the pre-calibration working stage of the pixel driving circuit, the threshold voltage change data of the third transistor M3 affecting the grayscale voltage of the liquid crystal is obtained.

[0038] Furthermore, a method for obtaining the threshold voltage change data of the third transistor M3 that affects the grayscale voltage of the liquid crystal may be: Figure 6 As shown, after the driving panel has gone through the factory aging stage, a pixel driving circuit or a row of pixel driving circuits outside the AA area of ​​the panel can be pre-powered on, with the power-on time being t0-t3, and the threshold voltage change data can be continuously acquired; or, all pixel driving circuits outside the AA area of ​​a driving panel in a batch of driving panels can be pre-powered on, with the power-on time being t0-t3, and the threshold voltage change data can be continuously acquired.

[0039] Furthermore, there may be slight differences in the threshold voltage change data obtained for each pixel driving circuit. The reason is that during the layout preparation process, slight differences exist due to the limitations of the preparation process. At this time, the average of the threshold voltage change data of multiple participating pixel driving circuits can be taken. Subsequent unevenness problems can be compensated by Demura at the software level.

[0040] S2: generating a voltage compensation curve that varies with time based on the threshold voltage variation data.

[0041] Furthermore, a method for generating a voltage compensation curve that varies with time may be: Figure 6 As shown, based on the threshold voltage change data, a threshold voltage change curve vth=nt is constructed. 1 / m , where t = (Vth / n) m , m>1, n<1, the voltage compensation curve can be generated by the threshold voltage change curve.

[0042] S3: generating a data signal based on the voltage compensation curve and the target grayscale voltage.

[0043] Further, the second gate of the third transistor M3 is coupled to the first reference signal line Ref1 and the second gate of the fourth transistor M4 is coupled to the second reference signal line Ref2, wherein the second source and drain of the third transistor M3 are both coupled to one end of the pixel capacitor Clc, and the second source and drain of the fourth transistor M4 are both coupled to the other end of the pixel capacitor Clc.

[0044] Specifically, in the case where the pixel driving circuit disposed outside the pixel display area includes a detection signal line Signal, the compensation method further includes: S4: Generate a threshold voltage change rate based on the threshold voltage change data.

[0045] Further, the method for generating the threshold voltage change rate is: based on the formula vth=nt 1 / m Construct threshold voltage change rate (n / m)*t 1 / m-1 , where m and n are obtained by fitting the threshold voltage variation data.

[0046] S5: Generate a plurality of monitoring time points with varying time intervals based on the threshold voltage change rate.

[0047] Further, the method for generating multiple monitoring time points with varying time intervals includes: generating multiple monitoring time points with varying time intervals based on a preset change rate threshold and the threshold voltage change rate (such as Figure 6As shown, as an example, t1, t2 and t3 can be used as monitoring time points), that is, when a fixed rate of change is preset, the time point required for the threshold voltage change is determined, and this time point is the detection time point. Here, the present invention utilizes the device characteristics of the TFT itself. Since the change of the threshold voltage Vth of the TFT is regionally gentle, setting monitoring time points with the same time interval will cause the following problems: if the time interval is set too short, the computing load and bandwidth pressure of T-con and driver IC will be unnecessarily increased in the later stage of TFT operation; if the time interval is set too long, the monitoring effect will be poor in the early stage of TFT operation (Vth changes greatly). Therefore, the present invention utilizes the device characteristics of the TFT itself, constructs the threshold voltage change rate to characterize the threshold voltage trend, and characterizes the length of the required monitoring time interval, and makes full use of the device characteristics to optimize the monitoring and compensation methods, thereby avoiding the above-mentioned problems.

[0048] S6: At the monitoring time point, obtaining the measured threshold voltage of the third transistor (M3) through the detection signal line (Signal).

[0049] Furthermore, the S6 includes: in the previous frame of the monitoring time point, the pixel driving circuit arranged outside the pixel display area writes the test voltage into the pre-storage capacitor Cst1 through the data signal line Data, and at this time, the pixel driving circuit arranged in the pixel display area normally writes the data signal for display; in the current frame of the detection time point, when the transfer signal jumps to a high potential, the measured voltage is obtained based on the detection signal line; and the measured threshold voltage is generated based on the measured voltage and the test voltage.

[0050] Furthermore, the test voltage is configured such that the test voltages of the pixel driving circuits in adjacent columns outside the pixel display area have the same absolute value and opposite polarity.

[0051] S7: Correcting the voltage compensation curve based on the measured threshold voltage, that is, the correction formula vth=nt 1 / m n and m in the figure, thereby performing secondary compensation for Vth, further improving the accuracy of the grayscale voltage and the accuracy of the grayscale display of the picture.

[0052] Furthermore, the brightness compensation of the backlight source can be performed on a partition basis based on the measured threshold voltage without modifying the voltage compensation curve, thereby avoiding the computing power load problem that may be caused by modifying the voltage compensation curve in real time. The above is a gate-controlled pixel driving circuit and a Vth compensation method thereof provided in an embodiment of the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

[0053] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to the function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention. The steps of the method or algorithm described in conjunction with the embodiments disclosed herein can be directly implemented with a software module executed by a hardware or processor, or a combination of the two. The software module can be placed in a random access memory, a memory, a read-only memory, an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the technical field.

Claims

1. A gate-controlled pixel driving circuit, characterized in that: include: A first transistor (M1), a second transistor (M2) and a third transistor (M3), wherein The first source and drain of the first transistor (M1) are coupled to a data signal line (Data), the second source and drain are coupled to a pre-storage capacitor (Cst1) and a gate of the second transistor (M2), and the gate is coupled to a control signal line (Scan); The first source and drain of the second transistor (M2) are coupled to the reference signal line (Vst), and the second source and drain are coupled to the first source and drain of the third transistor (M3); The gate of the third transistor (M3) is coupled to the transfer signal line (Tran), and the second source and drain are coupled to the pixel capacitor (Clc) and the holding capacitor (Cst2).

2. The pixel driving circuit according to claim 1, characterized in that: The driving timing of the pixel driving circuit is configured as follows: In the backlight on stage, the control signal jumps to a high potential, the first transistor (M1) is turned on, and after the data signal is stored in the pre-storage capacitor (Cst1), the control signal jumps back to a low potential; In the backlight off stage, the transfer signal jumps to a high potential, the reference signal jumps to a low potential, the second transistor (M2) and the third transistor (M3) are turned on, the second transistor (M2) operates in a linear region and resets the pixel capacitor (Clc) based on the reference signal, the reference signal jumps to a high potential, the second transistor (M2) operates in a saturation region and transmits the data signal to the pixel capacitor (Clc), The transfer signal jumps to a low potential, the reference signal jumps to a low potential for the second time, the second transistor (M2) operates in a linear region, the third transistor (M3) is turned off, and after the second transistor (M2) resets the potential at the second source and drain of the second transistor (M2) for the second time based on the reference signal, the reference signal jumps to a normal potential.

3. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit disposed outside the pixel display area further includes a detection signal line (Signal), wherein the detection signal line (Signal) is coupled to the second source and drain of the second transistor (M2) and the first source and drain of the third transistor (M3).

4. The pixel driving circuit according to claim 1, characterized in that: The pixel driving circuit arranged in the pixel display area also includes a fourth transistor (M4), the gate of the fourth transistor (M4) is coupled to a reset signal line (Reset), the first source and drain are coupled to a global signal line (Ref), and the second source and drain are coupled to the pixel capacitor (Clc) and the holding capacitor (Cst2).

5. The pixel driving circuit according to claim 1, characterized in that: One end of the pre-storage capacitor (Cst1), the pixel capacitor (Clc) and the holding capacitor (Cst2) away from the transistor is coupled to a common signal (Com).

6. A Vth compensation method for a gate-controlled pixel driving circuit, applied to any pixel driving circuit in claims 1-5, characterized in that: include: In a pre-calibration working stage of the pixel driving circuit, obtaining threshold voltage change data of the third transistor (M3) affecting the grayscale voltage of the liquid crystal; generating a voltage compensation curve that varies with time based on the threshold voltage variation data; A data signal is generated based on the voltage compensation curve and a target grayscale voltage.

7. The Vth compensation method according to claim 6, characterized in that: In the case where the pixel driving circuit disposed outside the pixel display area includes a detection signal line (Signal), the compensation method further includes: generating a threshold voltage change rate based on the threshold voltage change data; generating a plurality of monitoring time points with varying time intervals based on the threshold voltage change rate; At the monitoring time point, obtaining the measured threshold voltage of the third transistor (M3) through the detection signal line (Signal); The voltage compensation curve is corrected based on the measured threshold voltage.

8. The Vth compensation method according to claim 7, characterized in that: At the monitoring time point, obtaining the measured threshold voltage of the third transistor (M3) through the detection signal line (Signal), comprising: In a frame before the monitoring time point, the pixel driving circuit disposed outside the pixel display area writes the test voltage into the pre-storage capacitor (Cst1) through the data signal line (Data), and at this time, the pixel driving circuit disposed in the pixel display area normally writes the data signal for display; In the current frame at the detection time point, when the transfer signal jumps to a high potential, obtaining a measured voltage based on the detection signal line; A measured threshold voltage is generated based on the measured voltage and the test voltage.

9. The Vth compensation method according to claim 8, characterized in that: The test voltage is configured as: The test voltages of the pixel driving circuits in adjacent columns outside the pixel display area are of the same absolute value and opposite polarity.

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