An impedance matching device for bonding and packaging of a superconducting quantum chip and a quantum processor

Abstract

The present invention discloses a bonding and packaging impedance matching device for a superconducting quantum chip and a quantum processor, which relates to the field of superconducting quantum technology and includes a PCB board, bonding wires, and a chip. Pad-to-ground capacitors are provided in both the PCB board and the chip; the transmission line of the PCB board is connected to the transmission line of the chip through the bonding wires, and the bonding wires act as inductors to form a low-pass filter with the two pad-to-ground capacitors to reduce the reflectivity at the bonding wire; the two pad-to-ground capacitors are independently provided, and the capacitance size is adjusted by changing the pad shape; the bonding and packaging impedance matching device and the quantum processor solve the reflection problem at the chip packaging; at the same time, there is no need to introduce external chip capacitors and add additional matching circuits, so the space of the chip and the PCB board is greatly saved.

Description

Technical Field

[0001] The present invention relates to the field of superconducting quantum technology, and in particular to a bonding and packaging impedance matching device for a superconducting quantum chip and a quantum processor. Background Art

[0002] In superconducting quantum computing, in order to achieve signal fan-in and fan-out, aluminum bonding wires with a length of 1-2 mm and a diameter of 25 microns are usually used to transmit signals from a printed circuit board (PCB) / chip to the chip / PCB.

[0003] However, since the bonding wire itself has an inductance of 1 nH / mm, this will cause an on-chip reflection of about -10 dB, which in turn affects the performance of the entire microwave system.

[0004] For the read control line: impedance mismatch at the package will form a standing wave on the chip, resulting in different load impedances seen by the read cavities at different positions looking outwards, and thus causing the energy dissipation rate (kappa) of the read cavities to deviate from the design value, resulting in large fluctuations and affecting the reading of superconducting qubits in the experiment.

[0005] For the XYZ control lines: reflections at the package will cause amplitude and phase distortion of the control pulses of the qubits, affecting the fidelity of the qubit gates.

[0006] Therefore, the relatively large inductive impedance of the bonding wire is the root cause of impedance mismatch at the package. How to solve this root cause is the main research direction for solving impedance matching and is also a difficult problem. Summary of the Invention

[0007] Based on the technical problems existing in the background art, the present invention proposes a bonding and packaging impedance matching device for a superconducting quantum chip and a quantum processor, which solves the reflection problem at the chip package; at the same time, there is no need to introduce external patch capacitors and add additional matching circuits, thus greatly saving the space of the chip and the PCB board.

[0008] A bonding and packaging impedance matching device for a superconducting quantum chip proposed by the present invention includes a PCB board, a bonding wire, and a chip, and pad-to-ground capacitors are provided in both the PCB board and the chip;

[0009] The transmission line of the PCB board is connected to the transmission line of the chip through a bonding wire. The bonding wire acts as an inductor and forms a low-pass filter with two pad-to-ground capacitors to reduce the reflectivity at the bonding wire.

[0010] Further, the two pad-to-ground capacitors are independently provided, and the capacitance is adjusted by changing the pad shape.

[0011] Further, when the bonding wire has an inductance of 1 nH / mm, the transmission line of the chip has an impedance of 50 ohms, and the transmission line of the PCB board has an impedance of 50 ohms, the capacitance of the two pads to the ground is set to 0.1 pF to 0.3 pF.

[0012] A quantum processor includes the impedance matching device for bonding and packaging of the superconducting quantum chip as described above.

[0013] The advantages of the impedance matching device for bonding and packaging of a superconducting quantum chip and the quantum processor provided by the present invention are as follows: In the structure of the present invention, the impedance matching device for bonding and packaging of a superconducting quantum chip and the quantum processor solve the reflection problem at the chip packaging fundamentally by adjusting the capacitance of the pad to the ground in the design; at the same time, there is no need to introduce external patch capacitors and add additional matching circuits, so the space of the chip and the PCB board is greatly saved; its design is flexible and the pad shape can be changed flexibly according to the change of requirements; the result is robust and insensitive to the fluctuation of the bonding wire parameters within the range of 3 times the standard deviation. Description of the Drawings

[0014] Figure 1 is a schematic structural diagram of the present invention;

[0015] Figure 2 is a schematic CLC structure diagram of impedance matching for superconducting quantum packaging;

[0016] Figure 3 is a schematic ADS lumped element modeling diagram for verifying the impedance matching effect of the C-L-C structure;

[0017] Figure 4 is Figure 3 a schematic diagram of the simulation result corresponding to the ADS lumped element modeling of

[0018] Figure 5 is a schematic diagram of the capacitance of the chip pad to the ground and the distance from the ground;

[0019] Figure 6 is a simulation curve diagram corresponding to adjusting the gap in the middle of the chip after fixing the gap in the middle of the PCB board;

[0020] Among them, 1 - chip, 2 - bonding wire, 3 - PCB board, 4 - capacitance of the chip pad to the ground, 5 - capacitance of the PCB pad to the ground. Detailed Embodiments

[0021] Next, the technical solution of the present invention will be described in detail through specific embodiments. Many specific details are set forth in the following description in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed below.

[0022] As Figures 1 to 6 shown, a bonding and packaging impedance matching device for a superconducting quantum chip and a quantum processor proposed by the present invention includes a chip 1, bonding wires 2, and a PCB board 3. Pad-to-ground capacitors are respectively arranged in the chip 1 and the PCB board 3. The pads of the chip 1 are connected to the pads of the PCB board 3 through the bonding wires 2. The bonding wires 2 act as inductors to form a low-pass filter with two pad-to-ground capacitors (C-L-C structure) to reduce the reflectivity caused at the bonding wires 2. Among them, the pad-to-ground capacitor is specifically the chip pad-to-ground capacitor 4 and the PCB pad-to-ground capacitor 5, that is, the chip pad-to-ground capacitor 4, the bonding wires 2, and the PCB pad-to-ground capacitor 5 form a C-L-C structure, as Figure 2 shown.

[0023] As Figure 4 shown, based on the current mainstream packaging method in the field of superconducting quantum computing, two to multiple bonding wires are used to connect the transmission lines of the chip with a 50-ohm impedance to the transmission lines of the PCB board. The large inductive impedance of the bonding wires is the fundamental reason for the impedance matching at the packaging. Therefore, in this embodiment, the impedance matching of the bonding between the bonding wires 2 and the chip 1 and the PCB board 3 is realized by setting the pad-to-ground capacitors, reducing the reflectivity at the bonding, reducing the fluctuations of the read cavity, and reducing the influence brought by signal distortion, thereby ensuring the reading of superconducting qubits.

[0024] As Figure 2 shown, in a lumped circuit, by setting appropriate capacitance C and inductance L, a low-pass filter with a low reflection coefficient S11 can be obtained, as Figure 3 shown. Inspired by this, as Figure 2 and 3 show, taking the bonding wires 2 as inductors, appropriate pad-to-ground capacitors (4 and 5) of the chip 1 and the PCB board 3 in the superconducting quantum processor can be set according to different values of the bonding inductance to achieve an effect similar to that of a low-pass filter at 6-8 GHz, thereby reducing the reflectivity.

[0025] Considering the microwave parasitic effect at high frequencies of 6 - 8 GHz, the pad - to - ground capacitance of the chip 1 in superconducting quantum computing is increased from nearly 0 fF to dozens of fF or more. At the same time, the morphology parameters of the bonding wire 2 are determined by an automatic bonder, and the pad shapes of the chip 1 and the PCB board 3 and the pad - to - ground capacitance are optimized through HFSS simulation software to reduce the in - chip reflectivity to - 20 dB or lower.

[0026] Explore the influence of changing the chip pad - to - ground capacitance 4 on the microwave impedance matching at 4 - 8 GHz: The non - circuit part is defined as the ground, as Figure 5 shown. When the bonding wire 2 and the PCB pad - to - ground capacitance 5 are fixed, by changing the gap size between the pad ( Figure 5 of the chip 1) and the ground, the chip pad - to - ground capacitance 4 is changed, and thus the HFSS simulation result diagram ( Figure 6 ) is obtained. Among them, the pad on the PCB board 3 is selected as circular, the pad diameter is 0.26 mm, the diameter of the isolation hole of the pad on the power - plane layer is 0.6 mm, the distance between the two solder joints of the bonding wire 2 and the pad is 1 mm, and the double - root bonding wire 2 with a pitch of 90 um is trapezoidal with a height of 131 um. The angle between the bonding wire 2 and the chip 1 is 28°, and the angle between the bonding wire 2 and the PCB board 3 is 11°. The excitation is applied to the coplanar waveguide (Coplanar Waveguide, CPW) with a 50 - ohm impedance on both sides of the chip 1 and the PCB board 3, and then the in - chip reflection coefficient dB(S11) at the chip 1 end varying with the gap is obtained. In this example, without changing the PCB pad - to - ground capacitance 5 and the bonding wire 2, only the change in the chip pad - to - ground capacitance 4 caused by the change in the gap in the chip 1 is used to illustrate the influence of changing the pad - to - ground capacitance on the microwave impedance matching at 4 - 8 GHz. From Figure 6 the simulation results, it can be seen that in this example, as the gap gradually becomes larger, the chip pad - to - ground capacitance 4 (see Table 1) gradually becomes smaller, the low - pass effect gradually becomes worse, the in - chip reflectivity increases, and the impedance matching effect gradually becomes worse.

[0027] Table 1 Results table of chip pad - to - ground capacitance at different gaps in the chip

[0028]

[0029] For exploring the influence of changing the PCB pad - to - ground capacitance 5 on the microwave impedance matching at 4 - 8 GHz, by analogy with exploring the influence of changing the chip pad - to - ground capacitance 4 on the microwave impedance matching at 4 - 8 GHz, the process is basically the same. At this time, when the bonding wire 2 and the chip pad - to - ground capacitance 4 are fixed, by changing the gap size between the pad on the PCB board 3 and the ground, the PCB pad - to - ground capacitance 5 is changed, and thus the HFSS simulation result is obtained.

[0030] In this embodiment, by setting pad-to-ground capacitors in both the chip 1 and the PCB board 3, the reflection problem at the chip package is fundamentally solved; at the same time, there is no need to introduce external surface-mounted capacitors and add additional matching circuits, thus greatly saving the space of the chip and the PCB board; its design is flexible and the pad shape can be flexibly changed according to requirements; the result is robust and insensitive to the fluctuations of the bond wire parameters within 3 times the standard deviation.

[0031] In addition, there are also some other impedance matching methods, such as stub matchers and impedance transformers that need to determine the impedance value of the bond wire. However, it is not easy to determine the impedance value of the bond wire, which affects the implementation of this matching method. Another common way to reduce the in-chip reflectivity is to use the method of crossing ground wires to wrap the signal wires, so as to reduce the magnitude of the loop inductance formed between the bond wire and the ground and achieve the reduction of the in-chip reflectivity. The closer the distance between the ground wire and the signal wire, the smaller the loop area formed, and the smaller the loop inductance. However, the disadvantage of this method is that the ground wire is easy to contact the signal wire. In a superconducting quantum processor, since both the signal wire and the ground wire are made of aluminum wire, when the ground wire contacts the signal wire at extremely low temperatures, the dense oxide layer structure on the surface of superconducting aluminum will form a Josephson junction, thus affecting the microwave performance of the circuit.

[0032] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution and inventive concept of the present invention, makes equivalent substitutions or changes, and should be covered by the protection scope of the present invention.

Claims

1. A bonding and packaging impedance matching device for a superconducting quantum chip, characterized in that It includes a PCB board (3), bonding wires (2), and a chip (1). Pad-to-ground capacitors are provided in both the PCB board (3) and the chip (1). The transmission line of the PCB board (3) is connected to the transmission line of the chip (1) through the bonding wires (2). The bonding wires (2) act as inductors and form a low-pass filter with the two pad-to-ground capacitors to reduce the reflectivity at the bonding wires (2). The pad-to-ground capacitors are specifically the chip pad-to-ground capacitor (4) and the PCB pad-to-ground capacitor (5). The chip pad-to-ground capacitor (4), the bonding wires (2), and the PCB pad-to-ground capacitor (5) form a C-L-C structure. When the bonding wires (2) and the PCB pad-to-ground capacitor (5) are fixed, the chip pad-to-ground capacitor (4) is changed by varying the size of the gap between the pads on the chip (1) and the ground. When the bonding wires (2) and the chip pad-to-ground capacitor (4) are fixed, the PCB pad-to-ground capacitor (5) is changed by varying the size of the gap between the pads on the PCB board (3) and the ground.

2. The impedance matching device for bonding and packaging of the superconducting quantum chip according to claim 1, wherein, The two pad-to-ground capacitors are set independently, and the capacitance is adjusted by changing the pad shape respectively.

3. The impedance matching device for bonding and packaging of the superconducting quantum chip according to claim 1, characterized in that When the bonding wires (2) act as inductors with 1 nH / mm, the transmission line of the chip (1) has an impedance of 50 ohms, and the transmission line of the PCB board (3) has an impedance of 50 ohms, the two pad-to-ground capacitors are set to 0.1 pF to 0.3 pF.

4. A quantum processor, characterized in that, It includes a bonding and packaging impedance matching device for a superconducting quantum chip as described in any one of claims 1 to 3.

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