Deep trench isolation structure and process method

Abstract

The application discloses a deep trench isolation structure and a manufacturing process method thereof. The deep trench isolation structure comprises the following steps: a first conductive type substrate is provided; a second conductive type injection layer is formed on the substrate; a second conductive type deep well is formed on the injection layer; a shallow trench isolation structure is formed on the surface of the deep well; a second conductive type well region is formed outside the shallow trench isolation structure; a deep trench is formed in the shallow trench isolation structure by etching; and a segmented filling material is filled in the deep trench. The lower part of the deep trench is filled with silicon oxide, and the upper part of the deep trench is filled with polysilicon. The filling material in the deep trench is divided into two segments with different materials. The lower part of the deep trench is filled with silicon oxide, and the upper part of the deep trench is filled with polysilicon. The DTI polysilicon bottom is shortened to below the injection layer by further optimizing the structure. The DTI polysilicon bottom can pull up a higher peak electric field in the depletion region, thereby improving the breakdown voltage of the device.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor device design and manufacturing, and particularly to a deep trench isolation structure.

[0002] The present application also relates to a manufacturing process of the deep trench isolation structure. BACKGROUND

[0003] Deep trench isolation (DTI) structure is an isolation technology in integrated circuit manufacturing, which forms a deep trench with a large depth, usually reaching the silicon substrate, to effectively prevent punch-through between adjacent devices.

[0004] A deep trench isolation (DTI) structure is shown in FIG. 1, which includes a deep trench filled with a filler. The DTI trench penetrates through a P-type epitaxial layer 103 and an N-type buried layer 102 into a P-type substrate 101. A shallow trench isolation (STI) region 104, an N-well 107, and an N-type heavily doped region 108 as a lead-out region are formed on the surface of the substrate. A P-type implanted region 106 at the bottom of the DTI trench prevents punch-through between the N-type regions on both sides. The N-type regions on both sides of the DTI are led out through the N-type heavily doped region 108, with one end connected to a high potential and the other end connected to a low potential. Figure 1 The filler in the DTI deep trench of the existing structure is polysilicon, which can pull up a peak electric field at the bottom of the polysilicon, thereby improving the breakdown voltage. As shown in FIG. 2, the depletion region at the high potential end of this structure is located above the bottom of the DTI polysilicon, which cannot pull up an effective peak electric field, and the improvement of the breakdown voltage BV is limited.

[0005] Figure 9 The present application aims to provide a deep trench isolation structure. SUMMARY

[0006] The present application aims to provide a deep trench isolation structure.

[0007] The present application also provides a process method of the deep trench isolation structure.

[0008] To solve the above problems, the present application provides a manufacturing process of a deep trench isolation structure, which includes the following process steps:

[0009] A first conductive type semiconductor substrate is provided, and a second conductive type ion implantation is performed on the first conductive type semiconductor substrate to form a second conductive type implanted layer;

[0010] A first conductive type epitaxial layer is grown, and then a second conductive type ion implantation is performed in the epitaxial layer to form a second conductive type deep well in the first conductive type epitaxial layer;

[0011] ​The first photoetching and etching are performed to form a shallow trench isolation structure on the surface of the epitaxial layer;

[0012] High aspect ratio etching is performed in the shallow trench isolation structure to form a deep trench, the area of the deep trench is smaller than that of the shallow trench isolation structure; ion implantation is performed in the bottom of the deep trench to form a first conductive type of bottom implantation region; the deep trench is filled twice, first, a silicon oxide layer is filled in the lower part of the deep trench; then, the remaining part of the deep trench is filled with polysilicon.

[0013] The second photoetching opens an ion implantation window and performs ion implantation to form a second conductive type of well region outside the shallow trench isolation structure.

[0014] Further, the semiconductor substrate is a silicon substrate, a germanium-silicon substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate.

[0015] Further, the implantation layer is a second conductive type of heavy doping implantation to form a buried layer structure.

[0016] Further, the first photoetching and etching are completed synchronously by using an active region photoetching and filling process; the shallow trench isolation structure is filled with a silicon oxide material.

[0017] Further, the filling depth of the polysilicon in the deep trench needs to exceed the depth of the implantation layer, that is, the polysilicon column filled in the deep trench exceeds the implantation layer to reach the substrate.

[0018] Further, it further comprises selectively performing source-drain ion implantation to form a second conductive type of heavy doping region as a lead-out region in the well region; the source-drain ion implantation is synchronously shared implantation when the source-drain ion implantation process is performed by using an active region.

[0019] The deep trench isolation structure comprises a second conductive type of implantation layer on a first conductive type of substrate, and a second conductive type of deep well on the implantation layer.

[0020] The deep well has a shallow trench isolation structure on the surface, and a second conductive type of well region outside the shallow trench isolation structure.

[0021] The deep trench is formed by etching in the shallow trench isolation structure; the deep trench has a segmented filling material; the lower part of the deep trench is filled with a silicon oxide material, and the upper part of the deep trench is filled with a polysilicon material.

[0022] The bottom of the deep trench further has a first conductive type of bottom implantation region.

[0023] The downward filling depth of the polysilicon in the upper part of the deep trench exceeds the injection layer of the second conductive type to the substrate layer, i.e. the filling height of the silicon oxide does not exceed the injection layer.

[0024] Further, the first conductive type is P type and the second conductive type is N type, and when a device of opposite type is made, the first conductive type and the second conductive type are reversed.

[0025] The deep trench isolation structure of the present application is filled with two different materials in the deep trench, the lower part of the deep trench is of silicon oxide material, and the upper part of the deep trench is of polysilicon material. The present application further optimizes the structure, shortens the bottom of the DTI polysilicon to below the injection layer, and raises a higher peak electric field in the depletion region, thereby improving the breakdown voltage of the device. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a cross-sectional view of the existing DTI structure.

[0027] Figures 2 to 7 is a process step schematic diagram of the present application.

[0028] Figure 8 is a structure schematic diagram of the present application.

[0029] Figure 9 is a breakdown voltage simulation curve diagram of the present application and the existing structure.

[0030] Figure 10 is a process step flowchart of the present application.

[0031] 101-P type substrate, 102-N type buried layer, 103-N type deep well on P type epitaxial layer, 104-shallow trench isolation, 105-deep trench isolation (polysilicon filling), 105-2-deep trench isolation (silicon dioxide filling), 106-P type injection, 107-N well, 108-N type heavily doped region. DETAILED DESCRIPTION

[0032] The specific embodiments of the present application are described below in conjunction with the accompanying drawings, which clearly and completely describe the technical solutions in the present application, but the present application is not limited to the following embodiments. Obviously, the described embodiments are part of the embodiments of the present application, not all. According to the following description and claims, the advantages and characteristics of the present application will be more apparent. It should be noted that the drawings are very simplified and use non-precise ratios, only for the purpose of convenient and clear assistance in describing the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0033] The application can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, the embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size and relative sizes of layers and regions can be exaggerated for clarity. Like reference numerals designate like elements throughout the specification. In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships as shown by the drawings, and are merely used for the purpose of facilitating description of the present application and simplifying the description, and therefore cannot be construed as indicating or implying that a device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be understood as limiting the present application. In addition, the terms "first", "second", "third", are used only for the purpose of description and should not be construed as indicating or implying relative importance.

[0034] The deep trench isolation structure according to the present application has a structure as shown in Figure 8 The N-type implantation layer 102 is used as a buried layer. A P-type epitaxial layer is deposited on the buried layer 102 and N-type ion implantation is performed to form an N-type deep well 103.

[0035] The deep well 103 has a shallow trench isolation structure 104 on its surface. An N-type well region 107 is provided outside the shallow trench isolation structure. The N-type well region 107 has a heavily doped N-type region 108 as a lead-out region.

[0036] The shallow trench isolation structure has an etched deep trench. The deep trench is filled with a segmented filling material. The lower part of the deep trench is filled with silicon oxide 105-2, and the upper part of the deep trench is filled with polysilicon 105.

[0037] The bottom of the deep trench also has a P-type bottom implantation region 106. The P-type bottom implantation region 106 prevents the N-type regions on both sides of the deep trench from being penetrated.

[0038] In the deep trench, the filling material, the downward filling depth of the upper polysilicon 105 needs to exceed the N-type buried layer 102 to the substrate layer 101, i.e. the upward filling height of the silicon oxide 105-2 does not exceed the buried layer 102.

[0039] The well region 107 also has a heavily doped N-type region as a lead-out region 108.

[0040] The manufacturing process of the deep trench isolation structure described above includes the following process steps:

[0041] First, a P-type semiconductor substrate 101 is provided, which can be made of silicon, silicon-germanium, gallium arsenide, gallium nitride, silicon carbide, or the like. An N-type impurity ion, such as phosphorus or arsenic, is implanted into the P-type semiconductor substrate to form an N-type implantation layer as a buried layer 102, as shown in Figure 2 .

[0042] A P-type epitaxial layer is regrown on the buried layer 102, and then a high-energy N-type ion is implanted into the P-type epitaxial layer to form an N-type deep well 103 in the P-type epitaxial layer, as shown in Figure 3 .

[0043] A first photolithography and etching are performed to form a shallow trench isolation structure 104 on the surface of the epitaxial layer, as shown in Figure 4 . The shallow trench is filled with silicon oxide. This step is synchronized with the active region photolithography, that is, the same step is shared, including the filling process.

[0044] High-aspect-ratio etching is performed in the shallow trench isolation structure to form a deep trench. The area of the deep trench is smaller than that of the shallow trench isolation structure, and the depth of the deep trench penetrates the buried layer and reaches a certain distance in the substrate layer. Then, ion implantation is performed in the bottom of the deep trench to form a P-type bottom implantation region 106 in the substrate layer, which prevents the N-type regions on both sides of the deep trench from being penetrated. After the bottom implantation region 106 is completed, the deep trench is filled.

[0045] The deep trench is filled twice. First, a silicon oxide layer 105-2 is filled in the lower part of the deep trench, and then a polysilicon 105 is filled to fill the remaining part of the upper part of the deep trench. It should be noted that the filling height of the silicon oxide 105-2 in the deep trench does not exceed the bottom surface of the buried layer 102, that is, the silicon oxide 105-2 is located in the substrate layer and does not reach the filling height of the buried layer. The polysilicon 105 penetrates the buried layer 102 and fills the deep trench from the substrate layer 101 upwards, as shown in Figure 5 .

[0046] A second photolithography is performed to open an ion implantation window and perform ion implantation to form an N-type well region 107 outside the shallow trench isolation structure, as shown in Figure 6 .

[0047] Selective source-drain ion implantation is performed to form an N-type heavily doped region as a lead-out region 108 in the well region 107; the source-drain ion implantation is shared simultaneously with the active region source-drain ion implantation process. The lead-out region 108 has a high-voltage side and a low-voltage side, achieving isolation. As shown in Figure 7and Figure 8 as shown.

[0048] When a device of the opposite type is to be made, the doping types of the various components are reversed.

[0049] The deep trench isolation structure of the present application divides the filling in the deep trench into two segments of different materials, the lower part of the deep trench is of silicon oxide material, and the upper part of the deep trench is of polysilicon material. The present application further optimizes the structure, shortens the bottom of the DTI polysilicon to below the N-type buried layer, and raises a higher peak electric field in the depletion region, thereby improving the breakdown voltage of the device. Figure 9 As shown, the simulation shows that the boundary electric field intensity of the longitudinal electric field depletion region is obviously improved, and the breakdown voltage of the new structure is improved by 20%.

[0050] The above is only the preferred embodiment of the present application, and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for manufacturing a deep trench isolation structure, comprising: The process comprises the following steps: ​ providing a semiconductor substrate of a first conductive type, implanting ions of a second conductive type on the semiconductor substrate of the first conductive type to form an implant layer of the second conductive type; growing an epitaxial layer of the first conductive type, and implanting ions of the second conductive type in the epitaxial layer to form deep wells of the second conductive type in the epitaxial layer of the first conductive type; performing first photoetching and etching to form shallow trench isolation structures on the surface of the epitaxial layer; performing high-aspect-ratio etching in the shallow trench isolation structures to form deep trenches, the area of the deep trenches being smaller than that of the shallow trench isolation structures, and implanting ions in the bottom of the deep trenches to form a bottom implant region of the first conductive type; filling the deep trenches in two steps, first filling the lower part of the deep trenches with silicon oxide, and then filling the remaining part of the deep trenches with polysilicon, the filling depth of the polysilicon in the deep trenches exceeding the depth of the implant layer, i.e. the polysilicon in the deep trenches reaches the substrate; 2. The process method of manufacturing a deep trench isolation structure as claimed in claim 1, wherein: performing second photoetching to open an ion implantation window and implanting ions to form a well region of the second conductive type outside the shallow trench isolation structures.

3. The process method of manufacturing a deep trench isolation structure as claimed in claim 1, wherein: The semiconductor substrate can be a silicon substrate, a germanium-silicon substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate.

4. The process method of manufacturing a deep trench isolation structure as claimed in claim 1, wherein: The implant layer is a heavily doped implant layer of the second conductive type, forming a buried layer structure.

5. The process method of manufacturing a deep trench isolation structure as claimed in claim 1, wherein: The first photoetching and etching are performed simultaneously with the active region photoetching and filling process, and the shallow trench isolation structures are filled with silicon oxide.

6. The process for manufacturing a deep trench isolation structure according to any one of claims 1 to 5, wherein: The process further comprises selectively performing source-drain ion implantation to form a heavily doped region of the second conductive type in the well region as a lead-out region, and the source-drain ion implantation is performed simultaneously with the source-drain ion implantation process for the active region.

7. A deep trench isolation structure manufactured by the process of claim 1, wherein: The first conductive type is P-type, and the second conductive type is N-type; when a device of the opposite type is to be manufactured, the first conductive type and the second conductive type are reversed. The semiconductor substrate comprises a silicon substrate, a germanium-silicon substrate, a gallium arsenide substrate, a gallium nitride substrate or a silicon carbide substrate. The deep trenches have a bottom implant region of the first conductive type to prevent the second conductive type regions on both sides of the deep trenches from being penetrated. The well region further comprises a heavily doped region formed by simultaneous implantation with the source-drain implantation of the active region as a lead-out region.

8. The deep trench isolation structure of claim 7, wherein: The polysilicon in the upper part of the deep trenches has a downward filling depth exceeding the implant layer of the second conductive type to the substrate, i.e. the filling height of the silicon oxide does not exceed the implant layer.

9. The deep trench isolation structure of claim 7, wherein: ​ 10. The deep trench isolation structure of claim 7, wherein: ​ 11. The deep trench isolation structure of claim 7, wherein: ​ 12. The deep trench isolation structure of any of claims 7 to 11, wherein: The first conductive type is P type, and the second conductive type is N type; when making opposite type devices, the first conductive type and the second conductive type are reversed.

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