Test structure and test method

Abstract

A test structure and test method, the method comprising: a transistor structure located in an active area, comprising a gate structure located on top of a substrate, and a source and a drain located in the substrate on both sides of the gate structure; a source plug located on the source and electrically connected to the source; a drain plug located on the drain; metal lines located above the transistor structure and above the tops of the source and drain plugs, the metal lines comprising a metal line to be tested, a source interconnect line, and a drain interconnect line, the source interconnect line and the drain interconnect line being used to load a current signal; a test signal line located above the source interconnect line and the drain interconnect line, the test signal line being electrically connected to the source interconnect line and the drain interconnect line, respectively, the test signal line being used to measure a voltage signal, and the source interconnect line and the drain interconnect line being used to load a current signal, so as to accurately obtain the thermal coupling coefficient of the transistor structure to the metal line to be tested.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a test structure and a test method. Background Art

[0002] With the continuous development of semiconductor technology, the degree of integration of devices in integrated circuits is getting higher and higher, resulting in the size of individual devices on the chip becoming smaller and smaller, and the distance between adjacent metal wires becoming smaller and smaller, resulting in increasingly serious heat problems between adjacent metal wires.

[0003] Currently, the impact of temperature changes in metal lines on electromigration reliability needs to be improved. Summary of the Invention

[0004] The problem solved by the embodiments of the present invention is to provide a test structure and a test method, which optimize the performance of the test structure.

[0005] To solve the above problems, an embodiment of the present invention provides a test structure, comprising: a substrate, the substrate including an active area; a transistor structure, located in the active area, including a gate structure located on top of the substrate, and a source and a drain located in the substrate on both sides of the gate structure; a source plug, located on the source and electrically connected to the source; a drain plug, located on the drain and electrically connected to the drain; a metal line, located above the transistor structure and above the tops of the source plug and the drain plug, the metal line including a metal line to be tested, a source interconnect line, and a drain interconnect line, the source interconnect line is electrically connected to the source plug, the drain interconnect line is electrically connected to the drain plug, and the source interconnect line and the drain interconnect line are used to load a current signal; a test signal line, located above the source interconnect line and the drain interconnect line, the test signal line is electrically connected to the source interconnect line and the drain interconnect line, respectively, and the test signal line is used to measure a voltage signal.

[0006] Optionally, the test structure further includes: a first interconnection via located between the top of the source plug and the source interconnection line, and between the top of the drain plug and the drain interconnection line.

[0007] Optionally, the material of the first interconnection via includes one or more of aluminum, copper and cobalt.

[0008] Optionally, the source interconnection line is also electrically connected to the drain plug, and the drain interconnection line is also electrically connected to the source plug.

[0009] Optionally, the test structure further includes: a second interconnection via located between the top of the source plug and the drain interconnection line, and between the top of the drain plug and the source interconnection line.

[0010] Optionally, the material of the second interconnection via includes one or more of aluminum, copper and cobalt.

[0011] Optionally, the test signal line includes a first test signal line and a second test signal line, the first signal test line is located above the source interconnection line and electrically connected to the source interconnection line, and the second signal test line is located above the drain interconnection line and electrically connected to the drain interconnection line.

[0012] Optionally, the first test signal line and the second test signal line are respectively located on two sides of the gate structure.

[0013] Optionally, the test structure further includes: a third interconnection via located between the first test signal line and the source interconnection line, and between the second test signal line and the drain interconnection line.

[0014] Optionally, the material of the third interconnection via includes one or more of aluminum, copper and cobalt.

[0015] Optionally, the test structure also includes: a third test signal line, a fourth test signal line, a fifth test signal line and a sixth test signal line, all of which are located above the metal line to be tested; the third test signal line is located at one end of the metal line to be tested and electrically connected to the metal line to be tested; the fourth test signal line is located at the other end of the metal line to be tested and electrically connected to the metal line to be tested; the fifth test signal line is located at one end of the metal line to be tested and electrically connected to the metal line to be tested, and the fifth test signal line and the third test signal line are located on the same side of the metal line to be tested; the sixth test signal end is located at the other end of the metal line to be tested and electrically connected to the metal line to be tested, and the sixth test signal end and the fourth test signal line are located on the same side of the metal line to be tested; wherein, the third test signal line and the fourth test signal line are used to measure voltage signals, and the fifth test signal line and the sixth test signal end are used to load current signals.

[0016] Optionally, the first test signal line, the second test signal line, the third test signal line, the fourth test signal line, the fifth test signal line and the sixth test signal line are all located in the same layer.

[0017] Optionally, the metal line to be tested is located between the source interconnection line and the drain interconnection line.

[0018] Optionally, the metal line to be tested, the source interconnection line and the drain interconnection line are located in the same layer.

[0019] Optionally, along a direction parallel to the substrate and perpendicular to the extension direction of the metal line, the distance between the source interconnection line and the metal line to be tested is 10 nanometers to 1 micron; the distance between the drain interconnection line and the metal line to be tested is 10 nanometers to 1 micron.

[0020] Correspondingly, an embodiment of the present invention also provides a testing method, including: providing the test structure provided by the embodiment of the present invention; loading different current signals on the source interconnection line and the drain interconnection line; after loading different current signals on the source interconnection line and the drain interconnection line, obtaining the voltage measurement value between the test signal lines; obtaining the temperature value and resistance value corresponding to the metal line to be tested under different current signals; and obtaining the thermal coupling coefficient of the transistor structure corresponding to the metal line to be tested under different resistance values ​​based on different current signals, the voltage measurement values ​​corresponding to different current signals, and the temperature values.

[0021] Optionally, the step of loading different current signals on the source interconnection line and the drain interconnection line includes: loading zero potential on the source interconnection line and loading positive potential on the drain interconnection line; or, loading negative potential on the source interconnection line and loading zero potential on the drain interconnection line.

[0022] Optionally, the test signal line includes a first test signal line and a second test signal line, and the step of obtaining the voltage measurement value between the first test signal line and the second test signal line includes: connecting the first test signal line to one end of the voltmeter; connecting the first test signal line to the other end of the voltmeter; and using the voltmeter to obtain the voltage measurement value between the first test signal line and the second test signal line.

[0023] Optionally, according to the formula α=(T-β*I 2 ) / R th *V*I, obtain the thermal coupling coefficient of the transistor structure to the metal line under test at different resistance values; where α represents the thermal coupling coefficient of the transistor structure to the metal line under test; R th represents the equivalent thermal resistance of the transistor structure; V represents the voltage difference between the test signal lines; I represents the current value passing through the transistor structure; β represents the resistance value of the source interconnection line and the drain interconnection line themselves, and the product of the thermal coupling coefficient of the source interconnection line and the drain interconnection line to the metal line to be tested; T represents the temperature of the metal line to be tested.

[0024] Optionally, in the step of providing a test structure, the test structure further includes: a third test signal line, a fourth test signal line, a fifth test signal line and a sixth test signal line, all of which are located above the metal line to be tested; the third test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested; the fourth test signal line is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested; the fifth test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested, and the fifth test signal line and the third test signal line are located on the same side of the metal line to be tested; the sixth test signal line is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested, and the sixth test signal line The signal end and the fourth test signal line are located on the same side of the metal line to be tested; wherein, the third test signal line and the fourth test signal line are used to measure the voltage signal, and the fifth test signal line and the sixth test signal end are used to load the current signal; the steps of obtaining the temperature value and resistance value corresponding to the metal line to be tested under different current signals include: loading the current signal on the fifth test signal line and the sixth test signal line; measuring the voltage signal of the metal line to be tested through the third test signal line and the fourth test signal line; obtaining the resistance value corresponding to the metal line to be tested under different current signals through the voltage signal and the current signal; and measuring the temperature value corresponding to the metal line to be tested under different current signals through a temperature measuring instrument.

[0025] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0026] In the test structure provided by an embodiment of the present invention, a test signal line is located above the source interconnect line and the drain interconnect line, and the test signal line is electrically connected to the source interconnect line and the drain interconnect line, respectively. The test signal line is used to measure a voltage signal, and the source interconnect line and the drain interconnect line are used to load a current signal. When the test signal line, the source interconnect line, and the drain interconnect line form a Kelvin test structure, there is no need to use an external power supply device to connect the source interconnect line and the drain interconnect line in the test structure, thereby effectively reducing the probability of a voltage drop in the active area due to voltage division by other circuit structures. As a result, the voltage measurement value between the test signal lines is the voltage signal of the transistor structure in the active area, which correspondingly improves the accuracy of the power of the transistor structure in the active area, thereby accurately obtaining the thermal coupling coefficient of the transistor structure to the metal line to be tested. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a structural diagram corresponding to a test structure;

[0028] Figures 2 to 3 is a structural schematic diagram corresponding to an embodiment of a semiconductor structure of the present invention;

[0029] Figure 4 It is a flowchart of the steps of an embodiment of the testing method of the present invention. DETAILED DESCRIPTION

[0030] The performance of the current test structure needs to be improved. The reasons why its performance needs to be improved are analyzed based on a test structure.

[0031] Figure 1 It is a structural diagram corresponding to a test structure.

[0032] The test structure includes: a substrate 10, which includes an active area 11; a transistor structure located in the active area 11, including a gate structure (not shown) located on the top of the substrate 10, and a source (not shown) and a drain (not shown) located in the substrate 10 on both sides of the gate structure; a source plug 13 located on the source and electrically connected to the source; a drain plug 14 located on the drain and electrically connected to the drain; a metal line (not marked) located above the transistor structure and above the top of the source plug 13 and the drain plug 14, the metal line including a metal line to be tested 16, a source interconnect line 15 and a drain interconnect line 17, the source interconnect line 15 is electrically connected to the source plug 13, and the drain interconnect line 17 is electrically connected to the drain plug 14, and the metal line to be tested 16, the source interconnect line 15 and the drain interconnect line 17 are in the same layer.

[0033] Research has found that the temperature value of the metal wire 16 to be tested is related to the thermal coupling coefficient of the transistor structure in the active area 11 to the metal wire to be tested. In order to accurately obtain the thermal coupling coefficient of the transistor structure to the metal wire to be tested, it is necessary to accurately obtain the voltage value of the transistor structure in the active area 11. In the process of measuring the voltage value of the transistor structure in the active area 11, current technology usually sets a power supply device outside the test structure to provide voltage to the active area 11. However, when the power supply device provides voltage to the active area 11, the external circuit structure (i.e., the power supply line) will divide the voltage, resulting in the actual voltage value of the active area 11 not being the voltage value provided by the power supply device, thereby resulting in inaccurate thermal coupling coefficient of the transistor structure to be obtained.

[0034] In order to solve the technical problem, an embodiment of the present invention provides a test structure, including: a substrate, the substrate including an active area; a transistor structure, located in the active area, including a gate structure located on the top of the substrate, and a source and a drain located in the substrate on both sides of the gate structure; a source plug, located on the source and electrically connected to the source; a drain plug, located on the drain and electrically connected to the drain; a metal line, located above the transistor structure and above the top of the source plug and the drain plug, the metal line including a metal line to be tested, a source interconnect line and a drain interconnect line, the source interconnect line is electrically connected to the source plug, the drain interconnect line is electrically connected to the drain plug, and the source interconnect line and the drain interconnect line are used to load a current signal; a test signal line, located above the source interconnect line and the drain interconnect line, the test signal line is electrically connected to the source interconnect line and the drain interconnect line, respectively, and the test signal line is used to measure a voltage signal.

[0035] In the test structure provided by an embodiment of the present invention, a test signal line is located above the source interconnect line and the drain interconnect line, and the test signal line is electrically connected to the source interconnect line and the drain interconnect line, respectively. The test signal line is used to measure a voltage signal, and the source interconnect line and the drain interconnect line are used to load a current signal. When the test signal line, the source interconnect line, and the drain interconnect line form a Kelvin test structure, there is no need to use an external power supply device to connect the source interconnect line and the drain interconnect line in the test structure, thereby effectively reducing the probability of a voltage drop in the active area due to voltage division by other circuit structures. As a result, the voltage measurement value between the test signal lines is the voltage signal of the transistor structure in the active area, which correspondingly improves the accuracy of the power of the transistor structure in the active area, thereby accurately obtaining the thermal coupling coefficient of the transistor structure to the metal line to be tested.

[0036] In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0037] Figures 2 to 3 : is a schematic structural diagram corresponding to an embodiment of the test structure of the present invention, wherein: Figure 2 is a top view of the test structure, Figure 3 yes Figure 2 Cross-sectional view along the AA direction.

[0038] The test structure includes: a substrate 100 including an active region 101; a transistor structure located in the active region 101, including a gate structure (not shown) located on top of the substrate 100, and a source (not shown) and a drain (not shown) located in the substrate 100 on both sides of the gate structure; a source plug 103 located on and electrically connected to the source; a drain plug 104 located on and electrically connected to the drain; and a metal line (not shown) located above the transistor structure and above the tops of the source plug 103 and the drain plug 104. The metal lines include a metal line to be tested 106, a source interconnection line 105 and a drain interconnection line 107. The source interconnection line 105 is electrically connected to the source plug 103, and the drain interconnection line 107 is electrically connected to the drain plug 104. The source interconnection line 105 and the drain interconnection line 107 are used to load current signals; a test signal line (not marked) is located above the source interconnection line 105 and the drain interconnection line 107. The test signal line is electrically connected to the source interconnection line 105 and the drain interconnection line 107 respectively, and the test signal line is used to measure voltage signals.

[0039] It should be noted that the test signal line is located above the source interconnect line 105 and the drain interconnect line 107, and is electrically connected to the source interconnect line 105 and the drain interconnect line 107, respectively. The test signal line is used to measure voltage signals, while the source interconnect line 105 and the drain interconnect line 107 are used to apply current signals. By making the test signal line, the source interconnect line 105, and the drain interconnect line 107 form a Kelvin test structure, there is no need to use an external power supply device to connect the source interconnect line 105 and the drain interconnect line 107 in the test structure. This effectively reduces the probability of a voltage drop in the active area 101 due to voltage division by other circuit structures. As a result, the voltage measured between the test signal lines is the voltage signal of the transistor structure in the active area 101, which correspondingly improves the accuracy of the power of the transistor structure in the active area 101, thereby accurately obtaining the thermal coupling coefficient of the transistor structure to the metal line under test.

[0040] The test signal line includes a first test signal line 109 and a second test signal line 110. The first signal test line 109 is located above the source interconnection line 105 and is electrically connected to the source interconnection line 105. The second signal test line 110 is located above the drain interconnection line 107 and is electrically connected to the drain interconnection line 107.

[0041] The substrate 100 provides a platform for arranging a test structure.

[0042] In this embodiment, the material of the substrate 100 is silicon. In other embodiments, the material of the substrate can also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium. The substrate can also be other types of substrates such as silicon-on-insulator substrates or germanium-on-insulator substrates.

[0043] The active region 101 is used as a region for forming active devices in the test structure.

[0044] The transistor structure has functions such as signal modulation, rectification, and signal amplification. By setting the transistor structure in the active area 101, it is convenient to set the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 above the transistor. After the current signal is loaded on the source interconnection line 105 and the drain interconnection line 107, the voltage measurement value between the first test signal line 109 and the second test signal line 110 can be obtained.

[0045] As an example, the transistor structure includes a gate structure located on top of the substrate 100 , and a source and a drain located in the substrate 100 on both sides of the gate structure.

[0046] The gate structure is used to control the opening and closing of the conductive channel when the device is working.

[0047] In this embodiment, the gate structure is a metal gate structure.

[0048] As an example, the gate structure includes a gate dielectric layer covering the substrate 100 and a gate electrode layer covering the gate dielectric layer.

[0049] The source is the source of charge in a transistor structure. When the transistor structure is in the on state, a conductive path is formed between the source and drain, and electrons flow from the source to the drain, completing the current transmission. At the same time, the source also plays the role of modulating the gate structure voltage. By controlling the change of the source voltage, the transistor structure is controlled.

[0050] The drain is a charge sink in a transistor structure. When the transistor is in the on state, a conductive path is formed between the drain and the source, allowing electrons to flow from the source to the drain, completing the current transmission. Meanwhile, changes in the drain voltage have little effect on the operating state of the transistor structure, primarily serving to facilitate current flow.

[0051] The source plug 103 is used to be electrically connected to the source, so that the source can be electrically connected to other interconnection lines through the source plug 103 .

[0052] In this embodiment, the material of the source plug 103 includes tungsten.

[0053] The drain plug 104 is used to be electrically connected to the drain, so that the drain can be electrically connected to other interconnection lines through the drain plug 104 .

[0054] In this embodiment, the material of the drain plug 104 includes tungsten.

[0055] In this embodiment, the test structure further includes: a gate plug 102 located on the gate structure and at an end portion of the gate structure, and the gate plug 102 is electrically connected to the gate structure.

[0056] The gate plug 102 is electrically connected to the gate structure, so that the gate structure can be electrically connected to other interconnection lines through the gate plug 102 .

[0057] Specifically, the gate plug 102 is located on the gate structure and at the end position of the gate structure, so that the gate plug 102 can expose the entire area outside the end position of the gate structure, thereby increasing the spatial area for arranging the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 above the gate structure, and reducing the probability of short circuit between the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 and the gate plug 102, thereby improving the performance of the test structure.

[0058] It should be noted that after the current signal is loaded on the source interconnection line 105 and the drain interconnection line 107, the current signal will pass through the source interconnection line 105 and the drain interconnection line 107 themselves, causing the source interconnection line 105 and the drain interconnection line 107 themselves to generate temperature, and the temperature generated by the source interconnection line 105 and the drain interconnection line 107 will cause the temperature of the metal line 106 to be tested to change.

[0059] By setting multiple metal lines above the transistor structure and above the top of the source plug 103 and the drain plug 104, the multiple metal lines include the metal line to be tested 106, the source interconnection line 105 and the drain interconnection line 107, and then loading the current signal on the source interconnection line 105 and the drain interconnection line 107, the voltage measurement value between the first test signal line 109 and the second test signal line 110 is obtained. At the same time, by subsequently obtaining the temperature value and resistance value corresponding to the metal line to be tested 106 under different current signals, the thermal coupling coefficient of the transistor structure to the metal line to be tested 106 under different resistance values ​​can be obtained based on different current signals, the voltage measurement values ​​corresponding to different current signals, and the temperature values.

[0060] As an example, the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 have the same extension direction and are arranged in parallel with each other. After the current signal is subsequently loaded on the source interconnection line 105 and the drain interconnection line 107, the metal line 106 to be tested receives the temperature generated by the source interconnection line 105 and the drain interconnection line 107, and the temperature of the metal line 106 to be tested itself also changes, so that the thermal coupling coefficient of the transistor structure to the metal line 106 to be tested at different resistance values ​​can be obtained based on the current signal and voltage measurement values, as well as the temperature values ​​and resistance values ​​corresponding to the metal line 106 to be tested under different current signals.

[0061] It should be noted that, in this embodiment, the metal line is the first metal layer (M1).

[0062] In this embodiment, the metal line to be tested 106 is located between the source interconnection line 105 and the drain interconnection line 107 .

[0063] Specifically, by setting the metal line 106 to be tested between the source interconnection line 105 and the drain interconnection line 107, both sides of the metal line 106 to be tested can receive the temperature generated by the source interconnection line 105 and the drain interconnection line 107, so that the thermal coupling coefficient of the transistor structure to the metal line 106 to be tested at different resistance values ​​can be obtained based on the current signal and voltage measurement values, as well as the temperature value and resistance value corresponding to the metal line 106 to be tested under different current signals.

[0064] As an example, the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 are in the same layer, so that the temperature generated by the source interconnection line 105 and the drain interconnection line 107 received by the metal line 106 to be tested comes from the same layer.

[0065] It should be noted that, along a direction parallel to the substrate 100 and perpendicular to the extending direction of the metal line, the distance between the source interconnection line 105 and the metal line to be tested 106 should not be too large or too small. If the distance between the source interconnection line 105 and the metal line to be tested 106 is too large, it is easy to cause the temperature generated by the drain interconnection line 107 to have little effect on the metal line to be tested 106, so that the temperature value of the metal line to be tested 106 obtained does not change significantly, and thus the thermal coupling coefficient of the transistor structure corresponding to the metal line to be tested 106 at different resistance values ​​cannot be accurately obtained; if the distance between the source interconnection line 105 and the metal line to be tested 106 is too small, then in the formation process of the source interconnection line 105 and the metal line to be tested, the process difficulty of forming the source interconnection line 105 and the metal line to be tested 106 is increased, making the process window for forming the source interconnection line 105 and the metal line to be tested too small, and increasing the probability of the source interconnection line 105 and the metal line to be tested short-circuiting with each other, thereby affecting the performance of the test structure. Therefore, in this embodiment, along a direction parallel to the substrate 100 and perpendicular to the extending direction of the metal line, the distance between the source interconnection line 105 and the metal line to be tested 106 is 10 nanometers to 1 micrometer.

[0066] It should also be noted that, along a direction parallel to the substrate 100 and perpendicular to the extending direction of the metal line, the distance between the drain interconnection line 107 and the metal line to be tested 106 should not be too large or too small. If the distance between the drain interconnection 107 and the metal line 106 to be tested is too large, it is easy to cause the temperature generated by the drain interconnection 107 to have a small effect on the metal line 106 to be tested, so that the temperature value of the metal line 106 to be tested does not change significantly, and thus the thermal coupling coefficient of the transistor structure corresponding to the metal line 106 to be tested at different resistance values ​​cannot be accurately obtained; if the distance between the drain interconnection 107 and the metal line 106 to be tested is too small, then in the formation process of the drain interconnection 107 and the metal line 106, the process difficulty of forming the drain interconnection 107 and the metal line 106 to be tested is increased, making the process window for forming the drain interconnection 107 and the metal line 106 to be tested too small, and increasing the probability of the drain interconnection 107 and the metal line 106 to be short-circuited with each other, thereby affecting the performance of the test structure. Therefore, in this embodiment, along a direction parallel to the substrate 100 and perpendicular to the extending direction of the metal line, the distance between the drain interconnection line 107 and the metal line to be tested 106 is 10 nanometers to 1 micrometer.

[0067] In this embodiment, the material of the metal wire 106 to be tested includes one or more of aluminum, copper, titanium, tantalum and cobalt.

[0068] Aluminum, copper, titanium, tantalum, and cobalt are all commonly used metal materials for the metal wire 106 to be tested and have high process compatibility.

[0069] As an example, the metal line further includes a gate interconnection line 108 , which is located on top of the gate plug 102 and electrically connected to the gate plug 102 .

[0070] Specifically, the gate interconnection line 108 is located above the end position of the gate structure, so that the gate interconnection line 108 can expose the entire area outside the end position of the gate structure, thereby increasing the spatial area for setting the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 above the gate structure, and reducing the probability of short-circuiting between the metal line 106 to be tested, the source interconnection line 105 and the drain interconnection line 107 and the gate interconnection line 108, thereby improving the performance of the test structure.

[0071] In this embodiment, the extension direction of the gate interconnection line 108 is the same as the extension direction of the metal line to be tested 106, the source interconnection line 105, and the drain interconnection line 107, which can reduce the probability of the gate interconnection line 108 being short-circuited with the metal line to be tested 106, the source interconnection line 105, and the drain interconnection line 107.

[0072] In this embodiment, the test structure further includes: a dielectric layer 180 located on top of the substrate 100 and covering the transistor structure, the source interconnection line 105 , the drain interconnection line 107 and the metal line to be tested 106 .

[0073] The dielectric layer 180 is used to electrically isolate the transistor structure, the source interconnection line 105, the drain interconnection line 107 and the metal line to be tested 106, which can reduce the risk of leakage between the transistor structure, the source interconnection line 105, the drain interconnection line 107 and the metal line to be tested 106, and improve the performance of the test structure.

[0074] In this embodiment, the material of the dielectric layer 180 includes one or more of silicon oxide, silicon nitride, and silicon oxynitride.

[0075] In this embodiment, the test structure further includes: a first interconnection via 130, located between the top of the source plug 103 and the source interconnection line 105, and between the top of the drain plug 104 and the drain interconnection line 107, so that the source plug 103 is electrically connected to the source interconnection line 105 through the first interconnection via 130, and the drain plug 104 is electrically connected to the drain interconnection line 107 through the first interconnection via 130.

[0076] In this embodiment, the material of the first interconnection via 130 includes one or more of aluminum, copper, and cobalt.

[0077] Specifically, aluminum, copper, and cobalt have relatively low resistivity, which is beneficial for lowering the resistance value generated by the first through-hole interconnect structure, and can further improve the accuracy of obtaining the voltage measurement value between the first test signal line 109 and the second test signal line 110 .

[0078] In this embodiment, the first test signal line 109 and the second test signal line 110 are used to measure voltage signals, and the source interconnection line 105 and the drain interconnection line 107 are used to load current signals. The first test signal line 109, the second test signal line 110, the source interconnection line 105 and the drain interconnection line 107 constitute a Kelvin test structure. There is no need to use an external power supply device to connect to the source interconnection line 105 and the drain interconnection line 107 in the test structure, thereby effectively reducing the probability of the active area 101 generating a voltage drop due to voltage division by other circuit structures, so that the voltage measurement value between the first test signal line 109 and the second test signal line 110 is the voltage signal of the transistor structure in the active area 101, which correspondingly improves the accuracy of the power of the transistor structure in the active area 101, thereby accurately obtaining the thermal coupling coefficient of the transistor structure to the metal line to be tested.

[0079] As an example, the extension direction of the first test signal line 109 is perpendicular to the extension direction of the metal line, so that the end position of the first test signal line 109 is opposite to the metal line, which increases the operating space during the subsequent testing of the test structure.

[0080] In this embodiment, the first test signal line 109 is located above the source interconnection line 105, and the second test signal line 110 is located above the drain interconnection line 107. The first test signal line 109 and the second test signal line 110 are both the second metal layer (M2), and the first metal layer and the second metal layer are located in different layers.

[0081] In this embodiment, the first test signal line 109 and the second test signal line 110 are used to measure voltage signals, and the source interconnection line 105 and the drain interconnection line 107 are used to load current signals.

[0082] In other embodiments, the first test signal line and the second test signal line may also be used to load current signals, and the source interconnection line and the drain interconnection line are used to measure voltage signals.

[0083] In this embodiment, the first test signal line 109 and the second test signal line 110 are respectively located on two sides of the gate structure.

[0084] Specifically, the first test signal line 109 and the second test signal line 110 are respectively located on both sides of the gate structure, so that the distance between the first test signal line 109 and the second test signal line 110 meets the size requirements. In the subsequent process of obtaining the voltage measurement value between the first test signal line 109 and the second test signal line 110, the operating space of the first test signal line 109 and the second test signal line 110 can be increased.

[0085] In this embodiment, the test structure further includes: a third interconnection via 134 located between the first test signal line 109 and the source interconnection line 105 , and between the second test signal line 110 and the drain interconnection line 107 .

[0086] The third interconnection via 134 is used to achieve electrical connection between the first test signal line 109 and the source interconnection line 105 , and between the second test signal line 110 and the drain interconnection line 107 .

[0087] In this embodiment, the material of the third interconnection via 134 includes one or more of aluminum, copper, and cobalt.

[0088] Specifically, aluminum, copper, and cobalt have relatively low resistivity, which is beneficial for lowering the resistance value generated by the third through-hole interconnect structure, and can further improve the accuracy of obtaining the voltage measurement value between the first test signal line 109 and the second test signal line 110 .

[0089] In this embodiment, the source interconnection line 105 is also electrically connected to the drain plug 104, and the drain interconnection line 107 is electrically connected to the source plug 103. After the current signal is loaded on the source interconnection line 105 and the drain interconnection line 107, the current signal will flow through the source interconnection line 105, the drain plug 104, the source plug 103 and the drain interconnection line 107. This means that the current signal will not pass through the transistor structure, and the transistor structure itself will not generate temperature. In other words, the transistor structure will not have a temperature impact on the metal line to be tested 106. The metal line to be tested 106 can only receive the temperature generated by the source interconnection line 105 and the drain interconnection line 107.

[0090] In this embodiment, the test structure further includes: a second interconnection via 132 located between the top of the source plug 103 and the drain interconnection line 107 , and between the top of the drain plug 104 and the source interconnection line 105 .

[0091] It should be noted that the second interconnection via 132 is used to achieve electrical connection between the source plug 103 and the drain interconnection line 107 , and between the drain plug 104 and the source interconnection line 105 .

[0092] In this embodiment, the material of the second interconnection via 132 includes one or more of aluminum, copper, and cobalt.

[0093] Specifically, aluminum, copper, and cobalt have relatively low resistivity, which is beneficial for lowering the resistance value generated by the second through-hole interconnect structure, and can further improve the accuracy of obtaining the voltage measurement value between the first test signal line 109 and the second test signal line 110 .

[0094] In this embodiment, the test structure further includes a third test signal line 110 , a fourth test signal line 113 , a fifth test signal line 112 and a sixth test signal line 115 , all of which are located above the metal line 106 to be tested.

[0095] The resistance values ​​of the metal line 106 to be tested corresponding to different current signals are obtained through the third test signal line 110, the fourth test signal line 113, the fifth test signal line 112 and the sixth test signal line 115, so that the thermal coupling coefficient of the transistor structure to the metal line 106 to be tested corresponding to different resistance values ​​can be obtained.

[0096] In this embodiment, the third test signal line 110 is located at one end of the metal line to be tested 106 and is electrically connected to the metal line to be tested 106; the fourth test signal line 113 is located at the other end of the metal line to be tested 106 and is electrically connected to the metal line to be tested 106; the fifth test signal line 112 is located at one end of the metal line to be tested 106 and is electrically connected to the metal line to be tested 106, and the fifth test signal line 112 and the third test signal line 110 are located on the same side of the metal line to be tested 106; the sixth test signal line 115 is located at the other end of the metal line to be tested 106 and is electrically connected to the metal line to be tested 106, and the sixth test signal line 115 and the fourth test signal line 113 are located on the same side of the metal line to be tested 106.

[0097] Specifically, the third test signal line 110 and the fourth test signal line 113 are used to load current signals, and the fifth test signal line 112 and the sixth test signal line 115 are used to measure voltage signals.

[0098] It should be noted that by setting the third test signal line 110 and the fourth test signal line 113 at both ends of the metal line 106 to be tested, the current signal can pass through the entire metal line 106 to be tested. By setting the fifth test signal line 112 on the same side as the third test signal line 110, and setting the sixth test signal line 115 on the same side as the fourth test signal line 113, the voltage values ​​at both ends of the metal line 106 to be tested can be measured.

[0099] As an example, the first test signal line 109, the second test signal line 110, the third test signal line 110, the fourth test signal line 113, the fifth test signal line 112 and the sixth test signal line 115 are all located in the same layer, avoiding the formation of multiple dielectric layers and forming the first test signal line 109, the second test signal line 110, the third test signal line 110, the fourth test signal line 113, the fifth test signal line 112 and the sixth test signal line 115 of different layers in the multiple dielectric layers, thereby reducing the process difficulty of forming the first test signal line 109, the second test signal line 110, the third test signal line 110, the fourth test signal line 113, the fifth test signal line 112 and the sixth test signal line 115.

[0100] Correspondingly, an embodiment of the present invention also provides a testing method.

[0101] In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and easy to understand, the following Figures 2 to 4 The specific embodiments of the present invention are described in detail. Figure 4 It is a flowchart of the steps of an embodiment of the testing method of the present invention.

[0102] refer to Figure 4, execute step S1: provide a test structure provided by an embodiment of the present invention.

[0103] It should be noted that, in this embodiment, the test structure further includes: a third test signal line 110, a fourth test signal line 113, a fifth test signal line 112 and a sixth test signal line 115, all of which are located above the metal line 106 to be tested; the third test signal line 110 is located at one end of the metal line 106 to be tested and is electrically connected to the metal line 106 to be tested; the fourth test signal line 113 is located at the other end of the metal line 106 to be tested and is electrically connected to the metal line 106 to be tested; the fifth test signal line 112 is located at one end of the metal line 106 to be tested and is electrically connected to the metal line 106 to be tested; And it is electrically connected to the metal line 106 to be tested, and the fifth test signal line 112 and the third test signal line 110 are located on the same side of the metal line 106 to be tested; the sixth test signal end is located at the other end of the metal line 106 to be tested and is electrically connected to the metal line 106 to be tested, and the sixth test signal end and the fourth test signal line 113 are located on the same side of the metal line 106 to be tested; wherein, the third test signal line 110 and the fourth test signal line 113 are used to measure voltage signals, and the fifth test signal line 112 and the sixth test signal line 115 are used to load current signals.

[0104] It should also be noted that, in this embodiment, the test signal lines (not labeled) include a first test signal line 109 and a second test signal line 110 .

[0105] For a detailed description of the test structure provided by the embodiment of the present invention, please refer to the above description, which will not be repeated here.

[0106] Executing step S2: loading different current signals on the source interconnection line and the drain interconnection line.

[0107] It should be noted that by loading different current signals on the source interconnection line and the drain interconnection line, a current signal passes through the transistor structure in the active area, which facilitates the subsequent acquisition of a voltage signal of the transistor structure in the active area.

[0108] It should also be noted that by loading different current signals on the source interconnect and the drain interconnect, there is no need to use an external power supply device to connect to the source interconnect and the drain interconnect in the test structure. This can effectively reduce the probability of a voltage drop in the active area due to voltage division by other circuit structures, and can improve the accuracy of obtaining the voltage signal of the transistor structure in the active area.

[0109] In this embodiment, a zero potential is applied to the source interconnection line, and a positive potential is applied to the drain interconnection line; or a negative potential is applied to the source interconnection line, and a zero potential is applied to the drain interconnection line.

[0110] Executing step S3: After loading different current signals on the source interconnection line and the drain interconnection line, obtaining a voltage measurement value between the test signal lines.

[0111] Specifically, by obtaining the voltage measurement value between the test signal lines, the voltage value of the transistor structure in the source region can be accurately obtained, thereby improving the accuracy of obtaining the power of the transistor structure in the active region.

[0112] In this embodiment, the step of obtaining the voltage measurement value between the test signal lines includes: connecting the first test signal line to one end of the voltmeter; connecting the second test signal line to the other end of the voltmeter; and using the voltmeter to obtain the voltage measurement value between the first test signal line and the second signal test line.

[0113] Since the probability of a voltage drop in the active area due to voltage division by other circuit structures can be effectively reduced, the voltage measurement value between the first test loading line and the second test loading line is the voltage value of the transistor structure in the active area, which correspondingly improves the accuracy of the power of the transistor structure in the active area, thereby accurately obtaining the thermal coupling coefficient of the transistor structure to the metal line to be tested.

[0114] Execute step S4: obtain the temperature value and resistance value corresponding to the metal wire to be tested under different current signals.

[0115] Specifically, the temperature value and resistance value corresponding to the metal wire to be tested under different current signals are obtained, and then the thermal coupling coefficient of the transistor structure to the metal wire to be tested under different resistance values ​​can be obtained based on different current signals, voltage measurement values ​​corresponding to different current signals, and temperature values.

[0116] The steps of obtaining the temperature value and resistance value corresponding to the metal wire to be tested under different current signals include: loading the current signal to the fifth test signal line and the sixth test signal line; measuring the voltage signal of the metal wire to be tested through the third test signal line and the fourth test signal line; obtaining the resistance value corresponding to the metal wire to be tested under different current signals through the voltage signal and the current signal; and measuring the temperature value corresponding to the metal wire to be tested under different current signals through a temperature measuring instrument.

[0117] It should be noted that the current signal loaded on the fifth test signal line and the sixth test signal line is the same as the current signal loaded on the source interconnection line and the drain interconnection line, so that the temperature value of the metal line to be tested and the thermal coupling coefficient of the transistor structure to the metal line to be tested at a certain resistance value can be obtained under the same current signal. Accordingly, it is possible to summarize the model and law of the temperature value of the metal line to be tested under different current signals and the thermal coupling coefficient of the transistor structure to the metal line to be tested at different resistance values.

[0118] Executing step S5: obtaining the thermal coupling coefficient of the transistor structure to the metal line to be measured at different resistance values ​​according to different current signals, voltage measurement values ​​corresponding to the different current signals, and temperature values.

[0119] Specifically, under a certain current signal, the transistor structure can measure the voltage test value of the transistor structure. Since the heat generated by the transistor structure will be transmitted to the metal line to be tested, causing the metal line to generate temperature, the temperature value of the metal line to be tested is measured by a temperature measuring instrument. At the same time, under the same current signal, the resistance value of the metal line to be tested can be measured, thereby calculating the thermal coupling coefficient corresponding to the metal line to be tested at a certain resistance value, and then summarizing the temperature value of the metal line to be tested and the model of the thermal coupling coefficient of the transistor structure to the metal line to be tested at different resistance values.

[0120] In this embodiment, the thermal coupling coefficient α corresponding to the metal line to be tested under different resistance values ​​of the transistor structure is obtained. 2 ) / R th *V*I; where α represents the thermal coupling coefficient of the transistor structure to the metal line to be measured; R th represents the equivalent thermal resistance of the transistor structure; V represents the voltage difference between the test signal lines; I represents the current value passing through the transistor structure; β represents the product of the resistance value of the source interconnection line and the drain interconnection line itself and the thermal coupling coefficient of the source interconnection line and the drain interconnection line to the metal line to be tested.

[0121] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A test structure, characterized in that: include: a substrate comprising an active region; a transistor structure located in the active area, comprising a gate structure located on top of the substrate, and a source and a drain located in the substrate on both sides of the gate structure; a source plug, located on the source and electrically connected to the source; a drain plug, located on the drain and electrically connected to the drain; a metal line located above the transistor structure and above the tops of the source plug and the drain plug, the metal line including a metal line to be tested, a source interconnection line, and a drain interconnection line, the source interconnection line being electrically connected to the source plug, the drain interconnection line being electrically connected to the drain plug, and the source interconnection line and the drain interconnection line being used to load a current signal; A test signal line is located above the source interconnection line and the drain interconnection line. The test signal line is electrically connected to the source interconnection line and the drain interconnection line respectively. The test signal line is used to measure a voltage signal.

2. The test structure according to claim 1, wherein: The test structure further includes a first interconnection via located between a top portion of the source plug and a source interconnection line, and between a top portion of the drain plug and a drain interconnection line.

3. The test structure according to claim 2, wherein: The material of the first interconnection via includes one or more of aluminum, copper and cobalt.

4. The test structure according to claim 1, wherein: The source interconnection line is also electrically connected to the drain plug, and the drain interconnection line is electrically connected to the source plug.

5. The test structure according to claim 4, wherein: The test structure further includes a second interconnection via located between a top portion of the source plug and the drain interconnection line, and between a top portion of the drain plug and the source interconnection line.

6. The test structure according to claim 5, wherein: The material of the second interconnection via includes one or more of aluminum, copper and cobalt.

7. The test structure according to claim 1, wherein: The test signal line includes a first test signal line and a second test signal line, the first test signal line is located above the source interconnection line and electrically connected to the source interconnection line, and the second test signal line is located above the drain interconnection line and electrically connected to the drain interconnection line.

8. The test structure according to claim 7, wherein: The first test signal line and the second test signal line are respectively located on two sides of the gate structure.

9. The test structure according to claim 7, wherein: The test structure further includes a third interconnection via located between the first test signal line and the source interconnection line, and between the second test signal line and the drain interconnection line.

10. The test structure according to claim 9, wherein: The material of the third interconnection via includes one or more of aluminum, copper and cobalt.

11. The test structure according to claim 7, wherein: The test structure further includes: a third test signal line, a fourth test signal line, a fifth test signal line and a sixth test signal line, all of which are located above the metal line to be tested; The third test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested; The fourth test signal line is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested; The fifth test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested, and the fifth test signal line and the third test signal line are located on the same side of the metal line to be tested; The sixth test signal terminal is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested, and the sixth test signal terminal and the fourth test signal line are located on the same side of the metal line to be tested; The third test signal line and the fourth test signal line are used to measure voltage signals, and the fifth test signal line and the sixth test signal end are used to load current signals.

12. The test structure according to claim 11, wherein: The first test signal line, the second test signal line, the third test signal line, the fourth test signal line, the fifth test signal line and the sixth test signal line are all located in the same layer.

13. The test structure according to claim 1, wherein: The metal line to be tested is located between the source interconnection line and the drain interconnection line.

14. The test structure according to claim 1, wherein: The metal line to be tested, the source interconnection line and the drain interconnection line are located in the same layer.

15. The test structure according to claim 1, wherein: Along a direction parallel to the substrate and perpendicular to the extending direction of the metal line, the distance between the source interconnection line and the metal line to be tested is 10 nanometers to 1 micron; The distance between the drain interconnection line and the metal line to be tested is 10 nanometers to 1 micron.

16. A detection method, characterized in that: include: Providing a test structure according to any one of claims 1 to 15; applying different current signals to the source interconnection line and the drain interconnection line; After applying different current signals to the source interconnection line and the drain interconnection line, obtaining a voltage measurement value between the test signal lines; Obtaining the temperature value and resistance value of the metal wire to be tested corresponding to different current signals; According to the different current signals, the voltage measurement values ​​corresponding to the different current signals, and the temperature values, the thermal coupling coefficient of the transistor structure to the metal line to be measured under different resistance values ​​is obtained.

17. The testing method according to claim 16, wherein: The step of loading different current signals on the source interconnection line and the drain interconnection line includes: loading zero potential on the source interconnection line and loading positive potential on the drain interconnection line; or loading negative potential on the source interconnection line and loading zero potential on the drain interconnection line.

18. The testing method according to claim 16, wherein: The test signal line includes a first test signal line and a second test signal line, and the step of obtaining the voltage measurement value between the test signal lines includes: connecting the first test signal line to one end of the voltmeter; connecting the second test signal line to the other end of the voltmeter; and using the voltmeter to obtain the voltage measurement value between the first test signal line and the second test signal line.

19. The testing method according to claim 16, wherein: According to the formula α=(T-β*I 2 ) / R th *V*I, obtain the thermal coupling coefficient of the transistor structure to the metal line to be measured at different resistance values; where α represents the thermal coupling coefficient of the transistor structure to the metal line to be measured; R th represents the equivalent thermal resistance of the transistor structure; V represents the voltage difference between the test signal lines; I represents the current value passing through the transistor structure; β represents the product of the resistance value of the source interconnection line and the drain interconnection line themselves and the thermal coupling coefficient of the source interconnection line and the drain interconnection line to the metal line to be tested; T represents the temperature of the metal line to be tested.

20. The testing method according to claim 16, wherein: In the step of providing the test structure, the test structure further includes: a third test signal line, a fourth test signal line, a fifth test signal line and a sixth test signal line, all of which are located above the metal line to be tested; The third test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested; The fourth test signal line is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested; The fifth test signal line is located at one end of the metal line to be tested and is electrically connected to the metal line to be tested, and the fifth test signal line and the third test signal line are located on the same side of the metal line to be tested; The sixth test signal terminal is located at the other end of the metal line to be tested and is electrically connected to the metal line to be tested, and the sixth test signal terminal and the fourth test signal line are located on the same side of the metal line to be tested; Wherein, the third test signal line and the fourth test signal line are used to measure voltage signals, and the fifth test signal line and the sixth test signal end are used to load current signals; The steps of obtaining the temperature value and resistance value corresponding to the metal wire to be tested under different current signals include: loading the current signal to the fifth test signal line and the sixth test signal line; measuring the voltage signal of the metal wire to be tested through the third test signal line and the fourth test signal line; obtaining the resistance value corresponding to the metal wire to be tested under different current signals through the voltage signal and the current signal; and measuring the temperature value corresponding to the metal wire to be tested under different current signals through a temperature measuring instrument.

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