Motor pulse control method

By implementing the motor pulse control method in the microcontroller, the fluctuation of bus voltage in hybrid new energy vehicles is smoothed, the problem of high cost of high capacitance capacitors is solved, and the effect of reducing hardware costs is achieved.

CN119496413APending Publication Date: 2025-02-21CHONGQING JINKANG POWER NEW ENERGY CO LTD
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Patent Information

Application Number
CN202411566195.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-02-21

AI Technical Summary

Technical Problem

In hybrid new energy vehicles, due to the high voltage of the power battery and the large current change rate during the IGBT switch, the bus voltage fluctuates greatly. It is necessary to use a DC-Link capacitor with high withstand voltage and high capacitance value to absorb the operation of the high-frequency switch. pulsating current, however, such capacitors are expensive, increasing hardware costs.

Method used

By implementing the motor pulse control method in the microcontroller, the pulse signals of the first motor and the second motor are obtained, the delay time difference is determined, and the pulse signal is sent to the driving module, so that the edge signal time point is at the other party's level signal period Inside, the bus voltage is superimposed on two approximately opposite pulsating waveforms, and some pulses cancel each other to smooth the bus voltage.

Benefits of technology

Reliance on DC-Link capacitors is reduced, and capacitors with low capacitance value are selected to save hardware costs without changing the hardware structure.

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Abstract

The invention discloses a motor pulse control method, and relates to the technical field of motor control. According to the scheme, loads at least comprise a first motor and a second motor; acquiring a first motor pulse signal and a second motor pulse signal; wherein the first motor pulse signal is used for controlling the running state of the first motor, and the second motor pulse signal is used for controlling the running state of the second motor; determining a delay time difference based on the first motor pulse signal and the second motor pulse signal; and sending the first motor pulse signal to a first motor driving module and sending the second motor pulse signal to a second motor driving module according to the delay time difference, the corresponding edge signal time points in the first motor pulse signal and the second motor pulse signal are in the level signal period of the opposite side. According to the invention, the bus voltage can be smoothed, and the purchase cost of the DC-Link capacitor is reduced.
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Description

Technical Field

[0001] The present invention relates to the technical field of motor control, and more specifically, to a motor pulse control method. Background Art

[0002] In hybrid new energy vehicles, the generator and the motor are two core components that work together to improve fuel efficiency and reduce emissions. The dual-electric motor controller (hereinafter referred to as the controller) occupies an extremely critical position in the three-electric system of hybrid new energy vehicles, controlling the operation of the motor and the generator, and directly determining their key performance parameters such as output power and power generation.

[0003] Figure 1 This is the architecture diagram of the controller's driver part. Figure 1 As shown in the figure, the principle of the controller controlling the generator and the drive motor is to send PWM modulation waves to the two drive chips through the microcontroller chip to control the opening and closing of the full bridge inside the drive module, thereby realizing AC and DC bidirectional. At present, the mainstream drive module has a full bridge composed of IGBT or SIC. A group of DC-Link capacitors are connected in parallel at the high-voltage input end of the drive module, which is mainly used to absorb the high-amplitude pulsating current on the bus when the high-frequency switch is working, prevent it from generating high pulse voltage on the bus loop impedance, ensure the smooth and stable voltage of the power battery, and prevent instantaneous overvoltage from damaging the power devices inside the drive module.

[0004] However, since the power battery voltage of new energy vehicles is generally above 350 volts, the line inductance from the module to the battery end can reach several hundred nanohenries when the IGBT is switched on, and the current change rate when the IGBT is turned off is generally above 5 amperes per nanosecond. The peak voltage on the bus can reach more than 1,000 volts, which has a great impact on the circuit and battery. Therefore, it is necessary to use high-voltage and high-capacitance capacitors for absorption protection. However, DC-Link capacitors of this specification are relatively expensive, resulting in increased costs.

[0005] Therefore, there is an urgent need for a software control method that can smooth the bus voltage and then select low-capacitance capacitors to reduce hardware costs. Summary of the invention

[0006] In view of this, the present invention provides a motor pulse control method, which can smooth the bus voltage and reduce the purchase cost of DC-Link capacitors.

[0007] In order to achieve the above object, the present invention adopts the following technical scheme:

[0008] In a first aspect, the present invention provides a motor pulse control method, wherein the load includes at least a first motor and a second motor; the method includes:

[0009] Acquire a first motor pulse signal and a second motor pulse signal; wherein the first motor pulse signal is used to control the operating state of the first motor, and the second motor pulse signal is used to control the operating state of the second motor;

[0010] determining a delay time difference based on the first motor pulse signal and the second motor pulse signal;

[0011] A first motor pulse signal is sent to the first motor driving module and a second motor pulse signal is sent to the second motor driving module according to the delay time difference, so that the corresponding edge signal time points in the first motor pulse signal and the second motor pulse signal are within the level signal period of each other.

[0012] The method provided by the present invention establishes the signal logic of PWM interleaving control of the motor and the generator, and can realize the dual-motor pulse control strategy without changing the hardware structure, so that the bus voltage is superimposed with two approximately opposite pulsating waveforms, one semiconductor switch element is turned off to generate pulses, and the other semiconductor switch element is turned on to allow the load to absorb the pulses, so that some pulses cancel each other out and smooth the bus voltage. In this way, the dependence on the DC-Link capacitor is reduced, and low-capacitance capacitors are selected to save costs.

[0013] In a possible implementation, determining the delay time difference based on the first motor pulse signal and the second motor pulse signal includes:

[0014] Acquire a first frequency of a first motor pulse signal and a second frequency of a second motor pulse signal;

[0015] A delay time difference is determined based on the first frequency and the second frequency.

[0016] In a possible implementation manner, determining the delay time difference based on the first frequency and the second frequency includes:

[0017] Determine a corresponding target phase difference according to the first frequency and the second frequency;

[0018] The delay time difference is calculated based on the first frequency, the second frequency and the target phase difference.

[0019] In a possible implementation manner, determining the delay time difference based on the first frequency and the second frequency includes:

[0020] Obtaining the delay duration associated with the first frequency and the second frequency from a preset delay table;

[0021] The delay duration is taken as the delay time difference.

[0022] In a possible implementation, sending a first motor pulse signal to a first motor driving module and sending a second motor pulse signal to a second motor driving module according to a delay time difference includes:

[0023] Sending a first motor pulse signal to a first motor driving module and starting timing;

[0024] When the timing duration reaches the duration corresponding to the delay time difference, a second motor pulse signal is sent to the second motor driving module.

[0025] In a possible implementation, sending a first motor pulse signal to a first motor driving module and sending a second motor pulse signal to a second motor driving module according to a delay time difference includes:

[0026] If the first motor pulse signal and the second motor pulse signal are sent at the same time, obtaining the priorities corresponding to the first motor pulse signal and the second motor pulse signal respectively;

[0027] When the priority of the first motor pulse signal is higher than the priority of the second motor pulse signal, the first motor pulse signal is sent to the first motor driving module and timing is started, and after the timing duration reaches the duration corresponding to the delay time difference, the second motor pulse signal is sent to the second motor driving module;

[0028] When the priority of the first motor pulse signal is lower than that of the second motor pulse signal, the second motor pulse signal is sent to the second motor drive module and timing starts, and after the timing duration reaches the duration corresponding to the delay time difference, the first motor pulse signal is sent to the first motor drive module.

[0029] In a second aspect, the present invention provides a vehicle, comprising a bus power supply, a first motor, a second motor, a first motor drive module, a second motor drive module and a controller, wherein the first motor, the second motor, the first motor drive module, the second motor drive module and the controller are all connected to the bus power supply, the first motor is connected to the controller via the first motor drive module, and the second motor is connected to the controller via the second motor drive module;

[0030] The controller is used to load and execute a computer program or computer instructions of the motor pulse control method such as the first aspect and any possible implementation thereof.

[0031] In one possible implementation, the controller includes a microcontroller and a field programmable gate array.

[0032] In a third aspect, the present invention provides an electronic device comprising a processor and a memory; the memory stores a computer program or computer instructions that can be loaded by the processor and executed such as the motor pulse control method of the first aspect and any possible implementation thereof.

[0033] In a fourth aspect, the present invention provides a computer-readable storage medium storing a computer program or computer instructions that can be loaded by a processor and executed such as the motor pulse control method of the first aspect and any possible implementation thereof.

[0034] For the specific description of the second to fourth aspects and their various implementations in the present invention, reference can be made to the detailed description in the first aspect and its various implementations; and for the beneficial effects of the second to fourth aspects and their various implementations, reference can be made to the analysis of the beneficial effects in the first aspect and its various implementations, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0036] Figure 1 It is a structural schematic diagram of a dual-motor pulse control system according to an embodiment of the present invention;

[0037] Figure 2 is a flow chart of a motor pulse control method according to an embodiment of the present invention;

[0038] Figure 3 is a schematic diagram of a flow chart of determining a one-to-one correspondence between a first motor pulse signal and a second motor pulse signal according to an embodiment of the present invention;

[0039] Figure 4 is a waveform diagram of the motor pulse signal and the generator pulse signal after interleaving control in an embodiment of the present invention;

[0040] Figure 5 2 are two pulsating waveform diagrams of bus voltage before superposition in an embodiment of the present invention;

[0041] Figure 6 : is a waveform diagram of a bus voltage after two pulsating waveforms are superimposed in an embodiment of the present invention;

[0042] Figure 7 is a block diagram of the internal structure of a vehicle according to an embodiment of the present invention;

[0043] Figure 8 It is a block diagram of the internal structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0044] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.

[0045] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0046] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0047] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0048] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0049] In order to facilitate understanding of the technical solution of the present invention, the terms involved in the present invention are briefly introduced below.

[0050] 1. Electric motor: also known as drive motor, is the key driving component in hybrid new energy vehicles. It is responsible for converting electrical energy into mechanical energy and serves as the main or auxiliary power source when the vehicle starts, drives at low speed or accelerates. When necessary, it can work with the engine to provide the necessary driving force.

[0051] 2. Generator: In hybrid new energy vehicles, it is used to convert the mechanical energy generated by the engine into electrical energy. This electrical energy can be stored in the battery pack for use by the electric motor when needed, or it can be directly used in the vehicle's power system.

[0052] 3. MCU (Motor Control Unit): It receives instructions from the vehicle control unit (VCU) to accurately control the torque and speed of the motor, thereby driving the vehicle.

[0053] 4. GCU (Generator Control Unit): Controls the operation of the generator to ensure that the electricity generated by the generator can be effectively supplied to the motor or battery system. It is also responsible for recovering energy during braking.

[0054] 5. DC-Link capacitor: also known as DC-Link DC support capacitor, it is a capacitor on the DC link connecting the rectifier and the inverter. It is used to filter out voltage transients caused by the inverter and help smooth the output DC waveform.

[0055] 6. IGBT (Insulated Gate Bipolar Transistor): It is a composite fully controlled voltage-driven power semiconductor device that combines the advantages of high input impedance of metal oxide semiconductor field effect transistor (MOSFET) and low on-state voltage drop of power transistor (GTR). It is widely used in the field of power electronics, such as frequency converters, inverters, switching power supplies, etc.

[0056] like Figure 1 As shown, a dual-motor pulse control system includes a microcontroller, a conversion transceiver chip, a motor drive chip, a generator drive chip, a motor drive module (i.e., an MCU drive module), a generator drive module (i.e., a GCU drive module) and a DC-Link capacitor.

[0057] Among them, both the motor drive module and the generator drive module adopt a typical three-phase full-bridge structure, which includes three bridge arms corresponding to the three-phase output respectively, and each bridge arm includes two semiconductor switch elements, which can use IGBT or SiC power devices. Each semiconductor switch element in the motor drive module is connected to a different motor drive chip, and each semiconductor switch element in the generator drive module is connected to a different generator drive chip, that is, there are six motor drive chips and six generator drive chips. It should be noted that for the sake of simplicity of the drawings, Figure 1 The specific motor drive chip and generator drive chip are not shown, and only one drive chip is used to represent the set of six motor drive chips and six generator drive chips.

[0058] The microcontroller is responsible for generating control instructions, which usually contain information such as the motor's speed, direction, and torque, and are converted into pulse signals that determine the motor's operating status.

[0059] The motor driver chip and generator driver chip contain multiple functional modules (such as logic control module, timing control module, etc.), which work together to realize the decoding, conversion and amplification of the input pulse signal. After receiving the pulse signal sent by the microcontroller, the motor driver chip and the generator driver chip will control the opening and closing of the three-phase full-bridge circuit in the motor driver module and the generator driver module according to the frequency, duty cycle and other parameters of these signals. By controlling the conduction and shutdown of the semiconductor switching elements in each bridge arm, the conversion or inversion operation of DC to three-phase AC can be realized, and the amplitude and frequency of the output voltage can be adjusted.

[0060] In addition, there may be signal level mismatch problems between the microcontroller and the motor driver chip, generator driver chip (such as 5V and 3.3V, TTL and CMOS, etc.). Therefore, a conversion transceiver chip is added between the microcontroller and the motor driver chip, generator driver chip to perform level conversion to ensure accurate transmission of pulse signals.

[0061] The high voltage input end of the motor drive module and the generator drive module is connected in parallel with a DC-Link capacitor. The energy released by the DC-Link capacitor in one switching cycle is:

[0062] Q=1 / 2×C(U+△u) 2 -1 / 2×C(U-△u) 2 =2×C×U×△u Formula (1);

[0063] In formula (1), U is the DC bus voltage; △u is the bus ripple voltage; C is the capacitance value of the DC-Link capacitor;

[0064] In extreme cases, Q = W, where W is the maximum energy released by the DC-Link capacitor in one switching cycle; further calculation yields:

[0065] C = P / (4 × f × U × △ u) formula (2);

[0066] In formula (2), P is the motor power and f is the switching frequency.

[0067] Most manufacturers require the ripple rate of the DC bus voltage to be 5%, that is, the ripple voltage value △u=U×2.5%. Therefore, combining the above two equations, the maximum capacitance value C of the DC-Link capacitor can be obtained. max =P / (4×f×U×U×2.5%).

[0068] The above calculation is based on the most extreme case. In practical applications, it is generally believed that when the IGBT is turned on, the bus capacitor provides W / 2 energy, that is, Q = W / 2. Combining the above formula, the minimum capacitance value C of the DC-Link capacitor can be obtained. min =P / (8×f×U×U×2.5%).

[0069] For example, for a range-extended hybrid vehicle, the motor power P mcu =90KW, generator power P gcu =160KW, power battery voltage 400V, switching frequency 10KHz, bus voltage pulsation rate is required to be no more than 5% during operation, substituting these data into the above formula to obtain: C max =1562uF, C min =781uF, capacitors of this specification are relatively expensive.

[0070] Embodiment 1:

[0071] In order to reduce the dependence on DC-Link capacitors and save costs, an embodiment of the present invention provides a motor pulse control method applied to a microcontroller. Figure 2 , which is a flow chart of the motor pulse control method provided by an embodiment of the present invention. Figure 2 As shown, the motor pulse control method provided by the present invention mainly includes the following steps:

[0072] Step S201, obtaining a first motor pulse signal and a second motor pulse signal; wherein the first motor pulse signal is used to control the operating state of the first motor, and the second motor pulse signal is used to control the operating state of the second motor;

[0073] Step S202, determining a delay time difference based on the first motor pulse signal and the second motor pulse signal;

[0074] Step S203, sending a first motor pulse signal to the first motor driving module and sending a second motor pulse signal to the second motor driving module according to the delay time difference, so that the corresponding edge signal time points in the first motor pulse signal and the second motor pulse signal are within the level signal period of each other.

[0075] In this embodiment, the load includes at least a first motor and a second motor, one of which is a drive motor and the other is a generator. Of course, the load may also include two or more drive motors, as long as the pulsating waveforms output by the motor drive modules corresponding to these motors can be superimposed on the bus voltage and weakened to make the bus voltage smooth in the scenario where the microcontroller controls multiple drive motors and generators at the same time.

[0076] by Figure 1 Take the motor drive module with a three-phase full-bridge circuit structure as an example. In a three-phase system, there is a 120-degree phase difference between the voltage or current of each phase. Therefore, there is also a 120-degree phase difference between the motor pulse signals of the three bridge arms. The two semiconductor switch elements in each bridge arm usually work complementary, that is, when one semiconductor switch element is turned on, the other semiconductor switch element is turned off. In other words, each semiconductor switch element corresponds to a motor pulse signal, and there is a timing relationship between these six motor pulse signals, that is, the order of sending.

[0077] Therefore, the microcontroller sends a plurality of first motor pulse signals to the first motor driving module according to a timing relationship, and also sends a plurality of second motor pulse signals to the second motor driving module according to a timing relationship.

[0078] There is a one-to-one correspondence between the first motor pulse signal and the second motor pulse signal, that is, the corresponding edge signal time points in the first motor pulse signal and the second motor pulse signal that have a one-to-one correspondence need to be within the level signal period of the other party.

[0079] As for how to determine the one-to-one correspondence between the first motor pulse signal and the second motor pulse signal, Figure 3 As shown, the following steps may be included:

[0080] Step S301, obtaining first original timing information of a first motor pulse signal and second original timing information of a second motor pulse signal;

[0081] Step S302, determining a first motor pulse signal and a second motor pulse signal that are in a one-to-one correspondence based on the first original timing information and the second original timing information;

[0082] Step S303: sending a first motor pulse signal and a second motor pulse signal in a one-to-one correspondence based on the delay time difference.

[0083] In step S301, the first motor pulse signal is a plurality of motor pulse signals sent by the microcontroller to the first motor driving module, and the second motor pulse signal is a plurality of motor pulse signals sent by the microcontroller to the second motor driving module.

[0084] After obtaining the first original timing information and the second original timing information, all motor pulse signals in the first motor pulse signal can be matched with all motor pulse signals in the second motor pulse signal according to the timing relationship reflected thereby, and the one-to-one correspondence between the first motor pulse signal and the second motor pulse signal can be determined. Delay control can be performed on a motor pulse signal in the first motor pulse signal and a motor pulse signal in the second motor pulse signal that are successfully matched, respectively.

[0085] Optionally, based on the first original timing information, a first sending order of each motor pulse signal in the first motor pulse signal is determined; based on the second original timing information, a second sending order of each motor pulse signal in the second motor pulse signal is determined; based on the first sending order and the second sending order, the first motor pulse signal and the second motor pulse signal that are in a one-to-one correspondence are determined.

[0086] For example, the sending order of each motor pulse signal in the first motor pulse signal is A1, A2, A3, A4, A5, A6, and the sending order of each motor pulse signal in the second motor pulse signal is B1, B2, B3, B4, B5, B6, then the motor pulse signal A1 and the motor pulse signal B1 are in a one-to-one correspondence, the motor pulse signal A2 and the motor pulse signal B2 are in a one-to-one correspondence, the motor pulse signal A3 and the motor pulse signal B3 are in a one-to-one correspondence, the motor pulse signal A4 and the motor pulse signal B4 are in a one-to-one correspondence, the motor pulse signal A5 and the motor pulse signal B5 are in a one-to-one correspondence, and the motor pulse signal A6 and the motor pulse signal B6 are in a one-to-one correspondence.

[0087] Furthermore, after determining the one-to-one correspondence between each motor pulse signal in the first motor pulse signal and each motor pulse signal in the second motor pulse signal, it is also necessary to determine the sending order of the first motor pulse signal and the second motor pulse signal that belong to the one-to-one correspondence, that is, which motor pulse signal is sent first and which motor pulse signal is sent later. The sending time difference between the two motor pulse signals is the delay time difference.

[0088] After determining a plurality of pairs of first motor pulse signals and second motor pulse signals in a one-to-one correspondence, the delay time difference is calculated for each pair of the first motor pulse signal and the second motor pulse signal.

[0089] In some optional embodiments, to determine the delay time difference in step S202, it is necessary to first obtain the first frequency of the first motor pulse signal and the second frequency of the second motor pulse signal, and then determine the delay time difference based on the first frequency and the second frequency.

[0090] Further, the delay time difference is determined according to the first frequency and the second frequency, and there may be the following three situations:

[0091] (1) First, a corresponding target phase difference is determined according to the first frequency and the second frequency, and then a delay time difference is calculated based on the first frequency, the second frequency and the target phase difference.

[0092] (2) Obtain the delay duration associated with the first frequency and the second frequency from a preset delay table, and use the delay duration as the delay time difference.

[0093] (3) Directly obtain the manually set target phase difference, and calculate the delay time difference based on the first frequency, the second frequency and the target phase difference.

[0094] For the above-mentioned case (1), taking the first motor pulse signal and the second motor pulse signal as an example, firstly, according to the first frequency f of the first motor pulse signal, A Calculate the period T of the first motor pulse signal A, according to the second frequency f of the second motor pulse signal B Calculate the period T of the first motor pulse signal B , and then according to the calculation formula In the formula, is the interleaving period corresponding to the target phase difference, and the delay time difference T is calculated. AB-Delay .

[0095] If the period and frequency of the two motor pulse signals are the same, the interleaving period corresponding to the target phase difference can be directly used as the delay time difference. For example, if the interleaving period is 0.25 period, the delay time difference is 0.25 period, and the sending time of the two motor pulse signals differs by 0.25 period.

[0096] It should be noted that since the first frequencies of the first motor pulse signals are the same and the second frequencies of the second motor pulse signals are the same, the delay time difference corresponding to each pair of first motor pulse signals and second motor pulse signals that belong to a one-to-one correspondence is also the same.

[0097] In some optional embodiments, for step S203, there are specifically the following two situations:

[0098] (1) sending a first motor pulse signal to a first motor driving module and starting timing;

[0099] When the timing duration reaches the duration corresponding to the delay time difference, a second motor pulse signal is sent to the second motor driving module.

[0100] (2) if the first motor pulse signal and the second motor pulse signal are sent simultaneously, obtaining the priorities corresponding to the first motor pulse signal and the second motor pulse signal respectively;

[0101] When the priority of the first motor pulse signal is higher than the priority of the second motor pulse signal, the first motor pulse signal is sent to the first motor driving module and timing is started, and after the timing duration reaches the duration corresponding to the delay time difference, the second motor pulse signal is sent to the second motor driving module;

[0102] When the priority of the first motor pulse signal is lower than that of the second motor pulse signal, the second motor pulse signal is sent to the second motor drive module and timing starts, and after the timing duration reaches the duration corresponding to the delay time difference, the first motor pulse signal is sent to the first motor drive module.

[0103] It should be noted that if the first motor pulse signal and the second motor pulse signal have the same priority, the sending order between the first motor pulse signal and the second motor pulse signal can be randomly set.

[0104] In this embodiment, the priority may be preset and related to the motor control strategy.

[0105] The above method is implemented through a program integrated in a microcontroller to establish the signal logic of PWM interleaving control of the MCU and the GCU; when the semiconductor switch elements inside the first motor drive module and the first generator drive module are switched, the bus voltage is superimposed with two approximately opposite pulsating waveforms, one semiconductor switch element is turned off to generate pulses, and the other semiconductor switch element is turned on to allow the load to absorb the pulses; ultimately, some pulses cancel each other out and smooth the bus voltage. In this way, the dependence on the DC-Link capacitor is reduced, and low-capacitance capacitors are selected to save costs.

[0106] Embodiment 2:

[0107] The only difference from the first embodiment is that the present invention uses a field programmable gate array FPGA to program the control method, which can achieve precise control and rapid response of dual motor pulse control and improve real-time performance. The specific method can be found in the first embodiment, and this embodiment will not be repeated.

[0108] Embodiment three:

[0109] The bus voltage fluctuation is mainly caused by the change of the current passing through the bus. If the current waveforms of the two motors completely overlap or the phase difference is too large (such as 0.5 cycle), a large peak may be generated when the current is superimposed, resulting in an increase in bus voltage fluctuation. Too small a phase difference may not effectively disperse the current superposition effect, while too large a phase difference may increase the complexity and instability of system control. Therefore, based on the comprehensive consideration of system control accuracy and dynamic response capability, 0.25 cycle is selected as the phase difference.

[0110] like Figure 4 As shown, based on the above embodiment 1, the motor pulse control method is specifically described by taking the first motor as an electric motor, the second motor as a generator, and the first motor pulse signal A1 and the first motor pulse signal B1 staggered by 0.25 cycles as an example.

[0111] At this time, the interleaving period corresponding to the target phase difference is is 0.25, T AB-Delay =0.25×|T A -T B|. Setting the first motor pulse signal and the second motor pulse signal to differ by 0.25 cycles can make the current waveforms of the motor and the generator staggered in time, but not completely separated. In this way, when the current of the motor is at its peak, the current of the generator may be at its trough, or, when the current of the generator is at its peak, the current of the motor may be at its trough, thereby dispersing the effect of current superposition, thereby reducing the current peak on the bus and reducing the fluctuation of the bus voltage.

[0112] like Figure 5 As shown in FIG. 1 , when the ripple voltage (current) of one motor drive module is rising, the pulse voltage (current) of another motor drive module is in the decreasing stage, and the two pulse signals cancel each other out. Figure 6 As shown, when the two motor drive modules are working, the pulse voltage (current) generated on the bus becomes about half of the original value, the pulse voltage △u is reduced to 1 / 2, the rated voltage U remains unchanged, and Q is also reduced to 1 / 2. Substituting it into the basic capacitor formula C=Q / U, it can be obtained that C is 1 / 2 of the original value, that is, the capacitance value is reduced by half, further reducing the cost.

[0113] It should be noted that Figures 4 to 6 Where V represents the ripple voltage output by the driver module, and T represents time.

[0114] Embodiment 4:

[0115] Based on the same inventive concept, the embodiment of the present invention further provides a vehicle 700, the internal structure of the vehicle 700 is as follows: Figure 7 The vehicle 700 includes a bus power supply 701, a first motor 702, a second motor 703, a first motor drive module 704, a second motor drive module 705 and a controller 706, wherein the first motor 702, the second motor 703, the first motor drive module 704, the second motor drive module 705 and the controller 706 are all connected to the bus power supply 701, the first motor 702 is connected to the controller 706 via the first motor drive module 704, and the second motor 703 is connected to the controller 706 via the second motor drive module 705.

[0116] The controller 706 is used to load and execute the computer program or computer instructions of the motor pulse control method of the above embodiment. The controller 706 includes a microcontroller 7061 and a field programmable gate array 7062 .

[0117] Embodiment five:

[0118] The embodiment of the present invention further provides an electronic device 800, the internal structure of the electronic device 800 is as follows: Figure 8The electronic device 800 includes a memory 801 , a processor 802 and a communication bus 803 ; the memory 801 and the processor 802 are connected via the communication bus 803 .

[0119] The memory 801 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 801 can include a program storage area and a data storage area, wherein the program storage area can store instructions for implementing an operating system, instructions for at least one function, and instructions for implementing the motor pulse control method provided in the above embodiment, etc.; the data storage area can store data involved in a motor pulse control method provided in the above embodiment, etc.

[0120] The processor 802 may include one or more processing cores. The processor 802 executes or runs instructions, programs, code sets or instruction sets stored in the memory 801, calls data stored in the memory 801, and performs various functions and processes data of the present invention.

[0121] The communication bus 803 may include a path to transmit information between the above components. The communication bus 803 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 Only one double arrow is used in the diagram, but it does not mean that there is only one bus or one type of bus. Figure 8 The microcontroller shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0122] Embodiment seven:

[0123] In particular, according to an embodiment of the present invention, the process described in the above flowchart may be implemented as a computer software program.

[0124] The technical solution of the present invention, in essence, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, that is, the embodiment of the present invention also provides a computer-readable storage medium, which includes a number of computer programs or computer instructions, which are used to enable an electronic device (which can be a personal computer, server or network device, etc.) or a processor to perform all or part of the steps of the methods of various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory, random access memory, disk or optical disk, etc., various media that can store program codes.

[0125] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that the above embodiments may be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A motor pulse control method, characterized in that: The load includes at least a first motor and a second motor; the motor pulse control method includes: Acquire a first motor pulse signal and a second motor pulse signal; wherein the first motor pulse signal is used to control the operating state of the first motor, and the second motor pulse signal is used to control the operating state of the second motor; determining a delay time difference based on the first motor pulse signal and the second motor pulse signal; The first motor pulse signal is sent to the first motor driving module and the second motor pulse signal is sent to the second motor driving module according to the delay time difference, so that the corresponding edge signal time points in the first motor pulse signal and the second motor pulse signal are within the level signal period of each other.

2. The motor pulse control method according to claim 1, characterized in that: The determining of the delay time difference based on the first motor pulse signal and the second motor pulse signal comprises: Acquire a first frequency of the first motor pulse signal and a second frequency of the second motor pulse signal; The delay time difference is determined based on the first frequency and the second frequency.

3. The motor pulse control method according to claim 2, characterized in that: The determining the delay time difference based on the first frequency and the second frequency comprises: Determine a corresponding target phase difference according to the first frequency and the second frequency; The delay time difference is calculated based on the first frequency, the second frequency, and the target phase difference.

4. The motor pulse control method according to claim 2, characterized in that: The determining the delay time difference based on the first frequency and the second frequency comprises: Obtaining the delay duration associated with the first frequency and the second frequency from a preset delay table; The delay duration is used as the delay time difference.

5. The motor pulse control method according to any one of claims 1 to 4, characterized in that: The sending the first motor pulse signal to the first motor driving module and the sending the second motor pulse signal to the second motor driving module according to the delay time difference comprises: Sending the first motor pulse signal to the first motor driving module and starting timing; When the timing duration reaches the duration corresponding to the delay time difference, the second motor pulse signal is sent to the second motor driving module.

6. The motor pulse control method according to any one of claims 1 to 4, characterized in that: The sending the first motor pulse signal to the first motor driving module and the sending the second motor pulse signal to the second motor driving module according to the delay time difference comprises: If the first motor pulse signal and the second motor pulse signal are sent simultaneously, obtaining the priorities corresponding to the first motor pulse signal and the second motor pulse signal respectively; When the priority of the first motor pulse signal is higher than the priority of the second motor pulse signal, the first motor pulse signal is sent to the first motor driving module and timing is started, and after the timing duration reaches the duration corresponding to the delay time difference, the second motor pulse signal is sent to the second motor driving module; When the priority of the first motor pulse signal is lower than the priority of the second motor pulse signal, the second motor pulse signal is sent to the second motor drive module and timing starts, and after the timing duration reaches the duration corresponding to the delay time difference, the first motor pulse signal is sent to the first motor drive module.

7. A vehicle, characterized in that: It includes a bus power supply, a first motor, a second motor, a first motor drive module, a second motor drive module and a controller, wherein the first motor, the second motor, the first motor drive module, the second motor drive module and the controller are all connected to the bus power supply, the first motor is connected to the controller through the first motor drive module, and the second motor is connected to the controller through the second motor drive module; The controller is used to load and execute a computer program or computer instruction of the motor pulse control method according to any one of claims 1 to 6.

8. The vehicle according to claim 7, characterized in that The controller includes a microcontroller and a field programmable gate array.

9. An electronic device, characterized in that: including a processor and a memory; The memory stores a computer program or computer instruction that can be loaded by the processor and executes the motor pulse control method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program or computer instructions that can be loaded by a processor and execute the motor pulse control method according to any one of claims 1 to 6.