Light emitting diode with improved heat dissipation and preparation method thereof

Abstract

The invention provides a light emitting diode capable of improving heat dissipation and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light-emitting diode comprises an epitaxial layer and a bonding pad, a groove is formed in the surface of the epitaxial layer, the bonding pad comprises a filling part and a conductive part, the filling part is located in the groove, the top surface of the filling part is not lower than an opening of the groove, the conductive part is located on one side of the epitaxial layer, and the top surface of the conductive part is not lower than the opening of the groove. And at least part of the conductive part is located on the top surface of the filling part. The heat dissipation effect of the light-emitting diode can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light emitting diode with improved heat dissipation and a preparation method thereof. Background Art

[0002] Light Emitting Diode (LED) is a very influential new product in the optoelectronics industry. It has the characteristics of small size, long service life, rich colors and low energy consumption. It is widely used in lighting, display screens, signal lights, backlight sources, toys and other fields.

[0003] In related technologies, a light-emitting diode generally includes an epitaxial layer and a pad. The epitaxial layer includes a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer stacked in sequence. The second semiconductor layer has a groove exposing the first semiconductor layer. The pad is arranged above the epitaxial layer. To ensure the flatness of the pad, the pad avoids the groove.

[0004] However, the pad avoiding the groove will form more holes, which will lead to a reduction in the area of ​​the pad, making the contact area between the pad and the epitaxial layer smaller, thereby affecting the heat dissipation capacity of the pad. Summary of the invention

[0005] The embodiment of the present disclosure provides a light emitting diode with improved heat dissipation and a preparation method thereof, which can enhance the heat dissipation effect of the light emitting diode. The technical solution is as follows:

[0006] On the one hand, an embodiment of the present disclosure provides a light-emitting diode, comprising: an epitaxial layer and a solder pad, the surface of the epitaxial layer having a groove, the solder pad comprising a filling portion and a conductive portion, the filling portion being located in the groove, and the top surface of the filling portion being not lower than the opening of the groove, the conductive portion being located on one side of the epitaxial layer, and at least a portion of the conductive portion being located on the top surface of the filling portion.

[0007] Optionally, an orthographic projection of the groove on a surface of the epitaxial layer away from the pad is located within an orthographic projection of the pad on a surface of the epitaxial layer away from the pad.

[0008] Optionally, the filling portion includes a metal layer, and a heat transfer coefficient of the metal layer is greater than or equal to a heat transfer coefficient of the conductive portion.

[0009] Optionally, the filling portion includes an insulating layer.

[0010] Optionally, a surface of the insulating layer has a via hole penetrating the insulating layer, the via hole is filled with a heat-conducting structure, and a heat transfer coefficient of the heat-conducting structure is greater than a heat transfer coefficient of the insulating layer.

[0011] Optionally, the insulating layer is a silicon oxide layer, and the thermal conductive structure includes at least one of metal wires and carbon particles.

[0012] Optionally, a ratio of an area of ​​an orthographic projection of the pad on a surface of the epitaxial layer away from the pad to an area of ​​the surface of the epitaxial layer away from the pad is greater than or equal to 2 / 3.

[0013] Optionally, the light-emitting diode further includes: a transparent conductive layer, a passivation layer, a metal reflective layer and an enclosing layer; the transparent conductive layer is located on the surface of the epitaxial layer and outside the groove, the passivation layer is located on the surface of the epitaxial layer and in the groove, and covers the transparent conductive layer, and the passivation layer has a through hole exposing the transparent conductive layer; the metal reflective layer is located on the surface of the passivation layer away from the epitaxial layer, and is electrically connected to the transparent conductive layer through the through hole, and the enclosing layer is located on the surface of the passivation layer away from the epitaxial layer and in the groove, and covers the metal reflective layer.

[0014] Optionally, the light-emitting diode further includes: a first insulating layer, an electrode, and a second insulating layer; the first insulating layer is located on the surface of the surrounding layer away from the epitaxial layer and in the groove, and the first insulating layer has a through hole exposing the metal reflective layer and a through hole exposing the bottom of the groove; the electrode is located on the surface of the first insulating layer away from the epitaxial layer, a part of the electrode is electrically connected to the metal reflective layer through the through hole, and another part of the electrode is electrically connected to the bottom of the groove through the through hole; the second insulating layer is located on the surface of the first insulating layer away from the epitaxial layer and in the groove, and covers the electrode, the second insulating layer has a through hole exposing the electrode, and the conductive portion is electrically connected to the electrode through the through hole.

[0015] On the other hand, an embodiment of the present disclosure provides a method for preparing a light-emitting diode, the method comprising: forming an epitaxial layer, the surface of the epitaxial layer having a groove; forming a solder pad on one side of the epitaxial layer, the solder pad comprising a filling portion and a conductive portion, the filling portion being located in the groove, and a top surface of the filling portion being not lower than an opening of the groove, the conductive portion being located on one side of the epitaxial layer, and at least a portion of the conductive portion being located on the top surface of the filling portion.

[0016] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure include at least:

[0017] The light-emitting diode provided by the embodiment of the present disclosure designs the pad as a filling part and a conductive part, so that the filling part fills the groove on the surface of the epitaxial layer, so that the top surface of the filling part is flush with the opening of the groove or protrudes from the opening of the groove, so that the filling part fills the depressions and holes on the surface of the epitaxial layer. In this way, the conductive part arranged on one side of the epitaxial layer does not need to avoid the depressions and holes but can be directly stacked on the filling part. Therefore, the area covered by the conductive layer on one side of the epitaxial layer is larger, the contact area between the pad and the epitaxial layer is increased, and the heat generated by the epitaxial layer can be transferred to the outside through the large-sized pad, thereby improving the heat dissipation capacity of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 It is a top view of a light emitting diode provided by the related technology;

[0020] Figure 2 yes Figure 1 A MM cross-section diagram is provided;

[0021] Figure 3 It is a top view of a pad provided by the related art;

[0022] Figure 4 is a top view of a light emitting diode provided by an embodiment of the present disclosure;

[0023] Figure 5 yes Figure 4 A NN cross-section diagram provided;

[0024] Figure 6 is a top view of a pad provided by an embodiment of the present disclosure;

[0025] Figure 7 is a schematic diagram of a filling portion provided by an embodiment of the present disclosure;

[0026] Figure 8 It is a flow chart of a method for preparing a light emitting diode provided in an embodiment of the present disclosure.

[0027] The descriptions of the marks in the figure are as follows:

[0028] 10. Substrate;

[0029] 20. epitaxial layer; 21. groove;

[0030] 30. pad; 31. filling portion; 32. conductive portion; 33. via hole; 34. thermal conductive structure;

[0031] 41. transparent conductive layer; 42. passivation layer; 421. insulating protective layer; 422. insulating reflective layer;

[0032] 51. Metal reflective layer; 52. Enveloping layer;

[0033] 61. a first insulating layer; 62. a second insulating layer;

[0034] 70. Electrode. DETAILED DESCRIPTION

[0035] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0036] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0037] Figure 1 This is a top view of a light emitting diode provided by the related technology. Figure 2 yes Figure 1 A MM cross-sectional view is provided. Figure 1 , 2 As shown, in the related art, the light emitting diode includes: an epitaxial layer 20 and a pad 30, and the epitaxial layer 20 includes a first semiconductor layer, a multi-quantum well layer and a second semiconductor layer stacked in sequence.

[0038] like Figure 2 As shown, the second semiconductor layer has a groove 21 exposing the first semiconductor layer, and the pad 30 is arranged above the epitaxial layer 20 . To ensure the flatness of the pad 30 , the pad 30 avoids the groove 21 .

[0039] Figure 3 FIG. 3 is a top view of a pad 30 provided by the related art. Figure 3 As shown, the pad 30 avoiding the groove 21 will form more holes A, which will reduce the area of ​​the pad 30 and make the contact area between the pad 30 and the epitaxial layer 20 smaller, thereby affecting the heat dissipation capacity of the pad 30.

[0040] To this end, an embodiment of the present disclosure provides a light emitting diode. Figure 4 It is a top view of a light emitting diode provided by an embodiment of the present disclosure. Figure 5 yes Figure 4 A NN cross-section diagram is provided. Figure 4 , 5 As shown, the light emitting diode includes: an epitaxial layer 20 and a bonding pad 30 .

[0041] like Figure 5 As shown, the surface of the epitaxial layer 20 has a groove 21, and the pad 30 includes a filling portion 31 and a conductive portion 32. The filling portion 31 is located in the groove 21, and the top surface of the filling portion 31 is not lower than the opening of the groove 21. The conductive portion 32 is located on one side of the epitaxial layer 20, and at least part of the conductive portion 32 is located on the top surface of the filling portion 31.

[0042] The light-emitting diode provided in the embodiment of the present disclosure designs the pad 30 as a filling portion 31 and a conductive portion 32, so that the filling portion 31 fills the groove 21 on the surface of the epitaxial layer 20, so that the top surface of the filling portion 31 is flush with the opening of the groove 21 or protrudes from the opening of the groove 21, thereby allowing the filling portion 31 to fill the depressions and holes on the surface of the epitaxial layer 20.

[0043] Figure 6 FIG. 3 is a top view of a pad 30 provided in an embodiment of the present disclosure. Figure 4 , 6 As shown, the conductive portion 32 disposed on one side of the epitaxial layer 20 does not need to avoid recesses and holes but can be directly stacked on the filling portion 31. Therefore, the conductive layer covers a larger area on one side of the epitaxial layer 20, thereby increasing the contact area between the pad 30 and the epitaxial layer 20, and allowing the heat generated by the epitaxial layer 20 to be transferred to the outside through the large-sized pad 30, thereby improving the heat dissipation capacity of the light-emitting diode.

[0044] Alternatively, if Figure 5 As shown, the orthographic projection of the groove 21 on the surface of the epitaxial layer 20 away from the pad 30 is located within the orthographic projection of the pad 30 on the surface of the epitaxial layer 20 away from the pad 30 .

[0045] In this way, the pad 30 completely covers the groove 21 , so that the pad 30 can cover the epitaxial layer 20 to the greatest extent, thereby increasing the area of ​​the pad 30 and improving the heat dissipation capacity of the pad 30 .

[0046] At the same time, the pad 30 completely covers the groove 21, so that the conductive part 32 also completely covers the filling part 31, so that the epitaxial layer 20 can also transfer heat from the area where the groove 21 is located to the conductive part 32 through the filling part 31. In this way, the heat generated in each area of ​​the epitaxial layer 20 can be transferred to the conductive part 32, thereby improving the heat dissipation efficiency of the light-emitting diode.

[0047] In an implementation of the present disclosure, the filling portion 31 includes a metal layer, and a heat transfer coefficient of the metal layer is greater than or equal to a heat transfer coefficient of the conductive portion 32 .

[0048] In the above implementation, by controlling the heat transfer coefficient of the filling portion 31 in the groove 21 to be greater than the heat transfer coefficient of the conductive portion 32 , the filling portion 31 in the groove 21 can transfer heat more quickly, thereby improving the heat transfer efficiency.

[0049] Exemplarily, the heat transfer coefficient of the metal layer may be greater than or equal to 200 W / m·K.

[0050] For example, the metal layer may be a Cu layer, and the conductive portion 32 may be an Al layer.

[0051] In another implementation of the present disclosure, the filling portion 31 includes an insulating layer.

[0052] Compared with filling the groove 21 with a metal layer, filling the groove 21 with an insulating layer can reduce costs. Filling the groove 21 with an insulating layer can prevent the filling portion 31 from contacting other film layers and causing a short circuit in the light-emitting diode, thereby improving the reliability of the light-emitting diode.

[0053] Figure 7 Schematic diagram of a filling portion 31 provided in an embodiment of the present disclosure. Figure 7 As shown, the surface of the insulating layer has a via hole 33 penetrating the insulating layer, and the via hole 33 is filled with a heat-conducting structure 34, and the heat transfer coefficient of the heat-conducting structure 34 is greater than the heat transfer coefficient of the insulating layer.

[0054] In order to avoid reducing the heat transfer effect of the filling part 31 by using an insulating layer as the filling part 31, the heat transfer effect of the filling part 31 can be improved by setting a via hole 33 in the insulating layer and filling the via hole 33 with a heat conductive structure 34 with a heat transfer coefficient greater than that of the insulating layer.

[0055] Exemplarily, a plurality of via holes 33 are provided on the surface of the insulating layer, and the plurality of via holes 33 are arranged at intervals.

[0056] Optionally, the insulating layer is a silicon oxide layer, and the thermal conductive structure 34 includes at least one of metal wires and carbon particles.

[0057] Exemplarily, the heat-conducting structure 34 can be a copper wire. In addition to having good heat transfer properties, the copper wire is also conductive and can allow the pad 30 to transfer current to the epitaxial layer 20 through the filling portion 31, thereby improving the current injection efficiency and thus improving the light-emitting effect of the light-emitting diode.

[0058] Optionally, the conductive portion 32 includes at least one of a Ti layer, an Al layer, a Pt layer, a Ni layer, and an Au layer.

[0059] The above metal material has good heat dissipation performance. Therefore, the conductive part 32 made of the above material also has good heat dissipation performance, which can improve the heat dissipation effect of the light emitting diode.

[0060] Alternatively, the conductive portion 32 includes a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer, and an Au layer stacked in sequence.

[0061] Exemplarily, the thickness of the first Ti layer is 20 angstroms to 100 angstroms. For example, the thickness of the first Ti layer is 50 angstroms.

[0062] Exemplarily, the thickness of the Al layer is 10000 angstroms to 20000 angstroms. For example, the thickness of the Al layer is 15000 angstroms.

[0063] Exemplarily, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For example, the thickness of the second Ti layer is 1000 angstroms.

[0064] Exemplarily, the thickness of the Pt layer is 500 angstroms to 1500 angstroms. For example, the thickness of the Pt layer is 1000 angstroms.

[0065] Exemplarily, the thickness of the Ni layer is 60,000 angstroms to 80,000 angstroms. For example, the thickness of the Ni layer is 70,000 angstroms.

[0066] Exemplarily, the thickness of the Au layer is 1500 angstroms to 2500 angstroms. For example, the thickness of the Au layer is 2000 angstroms.

[0067] Alternatively, if Figure 6 As shown, the ratio of the area of ​​the orthographic projection of the pad 30 on the surface of the epitaxial layer 20 away from the pad 30 to the area of ​​the surface of the epitaxial layer 20 away from the pad 30 is greater than or equal to 2 / 3.

[0068] In the above implementation, the pad 30 occupies most of the surface area of ​​the epitaxial layer 20, so that the pad 30 has a sufficiently large area opposite to the epitaxial layer 20, so that the heat generated by the epitaxial layer 20 can be transferred outward through the large-sized pad 30, thereby improving the heat dissipation capacity of the light-emitting diode.

[0069] Alternatively, if Figure 5As shown, the light emitting diode further includes: a transparent conductive layer 41 , a passivation layer 42 , a metal reflective layer 51 and a surrounding layer 52 .

[0070] like Figure 5 As shown, the transparent conductive layer 41 is located on the surface of the epitaxial layer 20 and outside the groove 21 , the passivation layer 42 is located on the surface of the epitaxial layer 20 and inside the groove 21 , and covers the transparent conductive layer 41 , and the passivation layer 42 has a through hole exposing the transparent conductive layer 41 .

[0071] Optionally, the transparent conductive layer 41 may be an indium tin oxide (ITO) layer or an indium zinc oxide (IZO) layer.

[0072] Exemplarily, the transparent conductive layer 41 is an indium tin oxide layer. The indium tin oxide layer has good transmittance and low resistivity. The indium tin oxide layer has low resistivity, facilitates carrier conduction, and improves injection efficiency.

[0073] Exemplarily, the transparent conductive layer 41 is an indium zinc oxide layer. The indium zinc oxide layer has good transmittance and low resistivity. The indium zinc oxide layer has low resistivity, facilitates carrier conduction, and improves injection efficiency.

[0074] Exemplarily, the thickness of the transparent conductive layer 41 is 100 angstroms to 300 angstroms. For example, the thickness of the transparent conductive layer 41 is 200 angstroms.

[0075] like Figure 5 As shown, the metal reflective layer 51 is located on the surface of the passivation layer 42 away from the epitaxial layer 20, and the metal reflective layer 51 is electrically connected to the transparent conductive layer 41 through a through hole, and the surrounding layer 52 is located on the surface of the passivation layer 42 away from the epitaxial layer 20 and in the groove 21, and the surrounding layer 52 covers the metal reflective layer 51.

[0076] Optionally, the metal reflective layer 51 includes an Ag layer, a Ni layer, and a TiW layer stacked in sequence.

[0077] Since Ag has a good reflective effect, providing an Ag layer in the reflective layer can enhance the reflection of light by the reflective layer and improve the light emitting brightness of the light emitting surface of the light emitting diode.

[0078] The Ni layer has good corrosion resistance and wear resistance, and the TiW layer can be successfully deposited on other films as an adhesion layer without peeling or cracking. The alternating stacked Ni and TiW layers can act as a barrier layer to protect the silver mirror.

[0079] Exemplarily, the thickness of the Ag layer is 1400 angstroms to 1700 angstroms. For example, the thickness of the Ag layer is 1500 angstroms.

[0080] Exemplarily, the thickness of the Ni layer is 100 angstroms to 300 angstroms. For example, the thickness of the Ni layer is 200 angstroms.

[0081] Exemplarily, the thickness of the TiW layer is 700 angstroms to 1000 angstroms. For example, the thickness of the TiW layer is 800 angstroms.

[0082] In the above implementation, by covering the metal reflective layer 51 with a surrounding layer 52 , the metal in the metal reflective layer 51 can be prevented from migrating upward.

[0083] Optionally, the surrounding layer 52 includes an aluminum oxide layer. Exemplarily, the thickness of the aluminum oxide layer is 500 angstroms to 1000 angstroms.

[0084] Alternatively, if Figure 5 As shown, the passivation layer 42 may include an insulating protection layer 421 and an insulating reflective layer 422 stacked in sequence. The insulating protection layer 421 is located on the surface of the transparent conductive layer 41 away from the epitaxial layer 20 .

[0085] The insulating protection layer 421 is formed on the surface of the transparent conductive layer 41 away from the epitaxial layer 20 , so as to protect the transparent conductive layer 41 .

[0086] Optionally, the insulating protection layer 421 includes a silicon oxide layer. The silicon oxide layer has good insulating effect and stability, and can protect the transparent conductive layer 41.

[0087] Optionally, the thickness of the insulating protection layer 421 is 300 angstroms to 800 angstroms. For example, the thickness of the insulating protection layer 421 may be 500 angstroms.

[0088] like Figure 5 As shown, the insulating reflective layer 422 is located on the surface of the insulating protection layer 421 away from the epitaxial layer 20 .

[0089] Exemplarily, the insulating reflective layer 422 may be a DBR (Distributed Bragg Reflector) layer.

[0090] The DBR layer includes a plurality of silicon oxide layers and a plurality of titanium oxide layers stacked alternately, and the thickness of the DBR layer is 3 μm to 4 μm.

[0091] By providing the insulating reflective layer 422 , the light emitted from the epitaxial layer 20 can be reflected, so that more light can be emitted from the light emitting surface of the epitaxial layer 20 , thereby improving the light emitting intensity of the light emitting diode.

[0092] Alternatively, if Figure 5 As shown, the light emitting diode further includes: a first insulating layer 61 , an electrode 70 and a second insulating layer 62 .

[0093] like Figure 5 As shown, the first insulating layer 61 is located on the surface of the surrounding layer 52 away from the epitaxial layer 20 and in the groove 21 , and the first insulating layer 61 has a through hole exposing the metal reflective layer 51 and a through hole exposing the bottom of the groove 21 .

[0094] like Figure 5 As shown, the electrode 70 is located on the surface of the first insulating layer 61 away from the epitaxial layer 20 , a portion of the electrode 70 is electrically connected to the metal reflective layer 51 through the through hole, and another portion of the electrode 70 is electrically connected to the bottom surface of the groove 21 through the through hole.

[0095] like Figure 5 As shown, the second insulating layer 62 is located on the surface of the first insulating layer 61 away from the epitaxial layer 20 and in the groove 21 and covers the electrode 70 . The second insulating layer 62 has a through hole exposing the electrode 70 , and the conductive portion 32 is electrically connected to the electrode 70 through the through hole.

[0096] Exemplarily, both the first insulating layer 61 and the second insulating layer 62 may be silicon oxide layers.

[0097] Exemplarily, the thickness of the first insulating layer 61 is 4000 angstroms to 6000 angstroms, and the thickness of the second insulating layer 62 is 4000 angstroms to 6000 angstroms.

[0098] Exemplarily, the electrode 70 may include at least one of an Al layer, an Ag layer, a Ni layer, a Pt layer, an Au layer, and an AlCu layer.

[0099] For example, the electrode 70 may include an Al layer, a Ti layer, a Ni layer, a Pt layer, and an Au layer stacked in sequence.

[0100] Illustratively, the thickness of the Al layer is 1500 angstroms to 2500 angstroms.

[0101] Illustratively, the thickness of the Ti layer is 300 angstroms to 700 angstroms.

[0102] Illustratively, the thickness of the Ni layer is 800 angstroms to 1200 angstroms.

[0103] Illustratively, the thickness of the Pt layer is 1500 angstroms to 2500 angstroms.

[0104] Illustratively, the Au layer has a thickness of 6000 angstroms to 10000 angstroms.

[0105] Alternatively, if Figure 5 As shown, the light emitting diode further includes a substrate 10 , and an epitaxial layer 20 is located on the surface of the substrate 10 .

[0106] Exemplarily, the substrate is a sapphire substrate. The sapphire substrate has a relatively high light transmittance, that is, the substrate is a transparent substrate. In addition, the sapphire material is relatively hard and has relatively stable chemical properties, so that the light-emitting diode has good light-emitting effect and stability.

[0107] In the disclosed embodiment, the epitaxial layer 20 includes a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer sequentially stacked on a substrate, and a surface of the second semiconductor layer has a groove 21 exposing the first semiconductor layer.

[0108] In the embodiment of the present disclosure, one of the first semiconductor layer and the second semiconductor layer is a p-type layer, and the other of the first semiconductor layer and the second semiconductor layer is an n-type layer.

[0109] Exemplarily, the first semiconductor layer is an n-type layer, and the second semiconductor layer is a p-type layer.

[0110] In the implementation of the present disclosure, the first semiconductor layer is Al x Ga 1-x N material layer, wherein X is greater than or equal to 0 and less than or equal to 1.

[0111] Exemplarily, when X is 0, the first semiconductor layer is a GaN layer. For example, the first semiconductor layer is a silicon-doped n-type GaN layer. The thickness of the n-type GaN layer may be 0.5 μm to 3 μm.

[0112] Optionally, the multi-quantum well layer includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. Wherein, the multi-quantum well layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0113] As an example, in the embodiment of the present disclosure, the multi-quantum well layer includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0114] Optionally, the thickness of the multi-quantum well layer may be 150 nm to 200 nm.

[0115] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.

[0116] Optionally, the second semiconductor layer has a groove exposing the first semiconductor layer.

[0117] Figure 8 FIG. 1 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 8 As shown, the preparation method comprises:

[0118] Step S11: forming an epitaxial layer.

[0119] The surface of the epitaxial layer has grooves.

[0120] Step S12: forming a pad on one side of the epitaxial layer.

[0121] The pad includes a filling portion and a conductive portion, the filling portion is located in the groove, and the top surface of the filling portion is not lower than the opening of the groove, the conductive portion is located on one side of the epitaxial layer, and at least part of the conductive portion is located on the top surface of the filling portion.

[0122] The light-emitting diode prepared by the preparation method provided by the embodiment of the present disclosure designs the pad as a filling part and a conductive part, so that the filling part fills the groove on the surface of the epitaxial layer, so that the top surface of the filling part is flush with the opening of the groove or protrudes from the opening of the groove, so that the filling part fills the depressions and holes on the surface of the epitaxial layer. In this way, the conductive part arranged on one side of the epitaxial layer does not need to avoid the depressions and holes but can be directly stacked on the filling part. Therefore, the area covered by the conductive layer on one side of the epitaxial layer is larger, which increases the contact area between the pad and the epitaxial layer, and allows the heat generated by the epitaxial layer to be transferred to the outside through the large-sized pad, thereby improving the heat dissipation capacity of the light-emitting diode.

[0123] The process of preparing the epitaxial layer in step S11 may include the following steps:

[0124] First, a substrate is provided.

[0125] The substrate is a sapphire substrate, a silicon substrate or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.

[0126] As an example, in the embodiment of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a commonly used substrate with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a sapphire flat sheet substrate.

[0127] The sapphire substrate may be pre-treated, placed in a MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber, and baked for 12 to 18 minutes. As an example, in the embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.

[0128] Specifically, the baking temperature may be 1000° C. to 1200° C., and the pressure in the MOCVD reaction chamber during baking may be 100 mbar to 200 mbar.

[0129] Growing an epitaxial layer on the substrate may include: sequentially forming a first semiconductor layer, a multi-quantum well layer, and a second semiconductor layer on the sapphire substrate by using MOCVD technology.

[0130] The first semiconductor layer is an n-type layer, and the second semiconductor layer is a p-type layer.

[0131] Optionally, the first semiconductor layer is a silicon-doped n-type GaN layer, and the thickness of the n-type GaN layer may be 0.5 μm to 3 μm.

[0132] The growth temperature of the n-type GaN layer may be 1000° C. to 1100° C., and the growth pressure of the n-type GaN layer may be 100 torr to 300 torr.

[0133] Optionally, the multi-quantum well layer includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. Wherein, the multi-quantum well layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0134] When growing multi-quantum well layers, the pressure of the MOCVD reaction chamber is controlled at 200 torr. When growing InGaN quantum well layers, the temperature of the reaction chamber is 760°C to 780°C. When growing GaN quantum barrier layers, the temperature of the reaction chamber is 860°C to 890°C.

[0135] As an example, in the embodiment of the present disclosure, the multi-quantum well layer includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0136] Optionally, the thickness of the multi-quantum well layer may be 150 nm to 200 nm.

[0137] Optionally, the second semiconductor layer is a magnesium-doped p-type GaN layer. The thickness of the p-type GaN layer may be 0.5 μm to 3 μm.

[0138] When growing the p-type GaN layer, the growth pressure of the p-type GaN layer may be 200 Torr to 600 Torr, and the growth temperature of the p-type GaN layer may be 800° C. to 1000° C.

[0139] Then, the second semiconductor layer is etched to form a groove exposing the first semiconductor layer.

[0140] Before forming the pad in step S12, the following steps may also be included:

[0141] First, a transparent conductive layer is sputtered on the epitaxial layer, and the transparent conductive layer is patterned by photolithography, and the transparent conductive layer on the second semiconductor layer is retained.

[0142] Then, an insulating protection layer and an insulating reflection layer are sequentially formed on the surface of the transparent conductive layer and the surface of the epitaxial layer, and a through hole penetrating the insulating reflection layer and the insulating protection layer is formed by etching on the surface of the insulating reflection layer.

[0143] Optionally, the insulating protection layer includes an aluminum oxide layer. Exemplarily, the thickness of the insulating protection layer is 300 angstroms to 800 angstroms.

[0144] Optionally, the insulating reflective layer includes a plurality of silicon oxide layers and a plurality of titanium oxide layers stacked alternately. Exemplarily, the thickness of the insulating reflective layer is 3 μm to 4 μm.

[0145] Next, an Ag layer, a Ni layer, and a TiW layer are sequentially formed on the surface of the insulating reflective layer to obtain a metal reflective layer.

[0146] Exemplarily, the thickness of the Ag layer is 1400 angstroms to 1700 angstroms. For example, the thickness of the Ag layer is 1500 angstroms.

[0147] Exemplarily, the thickness of the Ni layer is 100 angstroms to 300 angstroms. For example, the thickness of the Ni layer is 200 angstroms.

[0148] Exemplarily, the thickness of the TiW layer is 700 angstroms to 1000 angstroms. For example, the thickness of the TiW layer is 800 angstroms.

[0149] Then, an enveloping layer is formed on the surface of the insulating reflective layer and the surface of the metal reflective layer so that the enveloping layer covers the metal reflective layer.

[0150] Optionally, the enveloping layer comprises an aluminum oxide layer. Exemplarily, the thickness of the enveloping layer is 500 angstroms.

[0151] Then, a first insulating layer is formed on the surface of the surrounding layer and in the groove.

[0152] Next, a through hole exposing the metal reflective layer and a through hole exposing the bottom of the groove are formed on the surface of the first insulating layer by photolithography.

[0153] Exemplarily, the first insulating layer may be a silicon oxide layer.

[0154] Exemplarily, the thickness of the first insulating layer is 4000 angstroms to 6000 angstroms.

[0155] Then, an electrode is formed on the surface of the first insulating layer.

[0156] The electrode includes at least one layer of a Cr layer, an Al layer, a Ti layer and a Pt layer.

[0157] Next, a second insulating layer is formed on the surface of the first insulating layer so that the second insulating layer covers the electrode.

[0158] Exemplarily, the second insulating layer is a DBR layer, the DBR layer includes a plurality of silicon oxide layers and a plurality of titanium oxide layers, and the thickness of the DBR layer is 3 μm to 4 μm.

[0159] Then, the second insulating layer is etched to form a through hole exposing the electrode on the surface of the second insulating layer.

[0160] Step S12 may include the following two steps:

[0161] First, a filling portion is formed in the groove so that a top surface of the filling portion is flush with a top surface of the electrode.

[0162] Exemplarily, the filling portion includes a metal layer.

[0163] Then, a conductive portion is formed on the surfaces of the second insulating layer, the electrode, and the filling portion to obtain a pad.

[0164] The heat transfer coefficient of the metal layer is greater than or equal to the heat transfer coefficient of the conductive part.

[0165] Exemplarily, the heat transfer coefficient of the metal layer may be greater than or equal to 200 W / m·K.

[0166] For example, the metal layer may be a Cu layer, and the conductive portion may be an Al layer.

[0167] Optionally, the conductive portion includes at least one of a Ti layer, an Al layer, a Pt layer, a Ni layer, and an Au layer.

[0168] The above metal material has good heat dissipation performance. Therefore, the conductive part prepared by using the above material also has good heat dissipation performance, which can improve the heat dissipation effect of the light emitting diode.

[0169] Optionally, the conductive portion includes a first Ti layer, an Al layer, a second Ti layer, a Pt layer, a Ni layer, and an Au layer stacked in sequence.

[0170] Exemplarily, the thickness of the first Ti layer is 20 angstroms to 100 angstroms. For example, the thickness of the first Ti layer is 50 angstroms.

[0171] Exemplarily, the thickness of the Al layer is 10000 angstroms to 20000 angstroms. For example, the thickness of the Al layer is 15000 angstroms.

[0172] Exemplarily, the thickness of the second Ti layer is 500 angstroms to 1500 angstroms. For example, the thickness of the second Ti layer is 1000 angstroms.

[0173] Exemplarily, the thickness of the Pt layer is 500 angstroms to 1500 angstroms. For example, the thickness of the Pt layer is 1000 angstroms.

[0174] Exemplarily, the thickness of the Ni layer is 6000 angstroms to 8000 angstroms. For example, the thickness of the Ni layer is 7000 angstroms.

[0175] Exemplarily, the thickness of the Au layer is 1500 angstroms to 2500 angstroms. For example, the thickness of the Au layer is 2000 angstroms.

[0176] The experimental data of the light emitting diode provided by the embodiment of the present disclosure are as follows in Table 1:

[0177] Table 1

[0178]

[0179] According to the test results in Table 1, the light-emitting diode provided by the present disclosure increases the pad area. After the pad area is increased, the junction temperature of the chip is reduced. Under the same working environment, the chip of the present disclosure has a lower junction temperature and a lower thermal resistance, which is more than 10°C lower than the junction temperature of the existing chip structure, indicating that the light-emitting diode of the present disclosure has a better heat dissipation effect.

[0180] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial layer (20) and a pad (30), wherein the surface of the epitaxial layer (20) is provided with a groove (21), and the pad (30) comprises a filling portion (31) and a conductive portion (32), wherein the filling portion (31) is located in the groove (21), and the top surface of the filling portion (31) is not lower than the opening of the groove (21), and the conductive portion (32) is located on one side of the epitaxial layer (20), and at least part of the conductive portion (32) is located on the top surface of the filling portion (31).

2. The light emitting diode according to claim 1, characterized in that: An orthographic projection of the groove (21) on a surface of the epitaxial layer (20) away from the pad (30) is located within an orthographic projection of the pad (30) on a surface of the epitaxial layer (20) away from the pad (30).

3. The light emitting diode according to claim 1, characterized in that: The filling portion (31) comprises a metal layer, and the heat transfer coefficient of the metal layer is greater than or equal to the heat transfer coefficient of the conductive portion (32).

4. The light emitting diode according to claim 1, characterized in that: The filling portion (31) comprises an insulating layer.

5. The light emitting diode according to claim 4, characterized in that: The surface of the insulating layer has a via hole (33) penetrating the insulating layer, the via hole (33) is filled with a heat conducting structure (34), and the heat transfer coefficient of the heat conducting structure (34) is greater than the heat transfer coefficient of the insulating layer.

6. The light emitting diode according to claim 5, characterized in that: The insulating layer is a silicon oxide layer, and the heat conducting structure (34) comprises at least one of metal wires and carbon particles.

7. The light emitting diode according to any one of claims 1 to 6, characterized in that: The ratio of the area of ​​the orthographic projection of the pad (30) on the surface of the epitaxial layer (20) away from the pad (30) to the area of ​​the surface of the epitaxial layer (20) away from the pad (30) is greater than or equal to 2 / 3.

8. The light emitting diode according to any one of claims 1 to 6, characterized in that: The light emitting diode further comprises: a transparent conductive layer (41), a passivation layer (42), a metal reflective layer (51) and a surrounding layer (52); The transparent conductive layer (41) is located on the surface of the epitaxial layer (20) and outside the groove (21); the passivation layer (42) is located on the surface of the epitaxial layer (20) and inside the groove (21) and covers the transparent conductive layer (41); the passivation layer (42) has a through hole exposing the transparent conductive layer (41); The metal reflective layer (51) is located on a surface of the passivation layer (42) away from the epitaxial layer (20), and is electrically connected to the transparent conductive layer (41) through a through hole; the surrounding layer (52) is located on a surface of the passivation layer (42) away from the epitaxial layer (20) and in the groove (21), and covers the metal reflective layer (51).

9. The light emitting diode according to claim 8, characterized in that: The light emitting diode further comprises: a first insulating layer (61), an electrode (70) and a second insulating layer (62); The first insulating layer (61) is located on a surface of the surrounding layer (52) away from the epitaxial layer (20) and in the groove (21), and the first insulating layer (61) has a through hole exposing the metal reflective layer (51) and a through hole exposing the bottom of the groove (21); The electrode (70) is located on a surface of the first insulating layer (61) away from the epitaxial layer (20), a portion of the electrode (70) is electrically connected to the metal reflective layer (51) through a through hole, and another portion of the electrode (70) is electrically connected to the bottom surface of the groove (21) through a through hole; The second insulating layer (62) is located on a surface of the first insulating layer (61) away from the epitaxial layer (20) and in the groove (21), and covers the electrode (70); the second insulating layer (62) has a through hole exposing the electrode (70); and the conductive portion (32) is electrically connected to the electrode (70) through the through hole.

10. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: forming an epitaxial layer, wherein a surface of the epitaxial layer has a groove; A pad is formed on one side of the epitaxial layer, the pad comprising a filling portion and a conductive portion, the filling portion is located in the groove, and a top surface of the filling portion is not lower than an opening of the groove, the conductive portion is located on one side of the epitaxial layer, and at least a portion of the conductive portion is located on a top surface of the filling portion.

Images