Cache management method and storage medium thereof

By dynamically obtaining page information of the target block of NAND Flash memory in real time and performing corresponding block operations, the problem of unstable performance of memory during random read and write is solved, and the durability and performance of memory is improved.

CN119512980BActive Publication Date: 2025-05-13GUANGDONG JIANGXINCHUANG TECH CO LTD
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Patent Information

Application Number
CN202510073117.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-17
Publication Date
2025-05-13
Estimated Expiration
2045-01-17

AI Technical Summary

Technical Problem

NAND Flash memory has unstable performance when performing random reads and writes, resulting in delay and performance degradation. At the same time, there is a limit on the number of writes, resulting in loss of memory cells. The correct block operation logic is required for block management.

Method used

By dynamically obtaining the page information of the current target block in real time, performing corresponding block operations, including replacing invalid blocks with free blocks, and reasonably arranging the erasure and random read and write of the storage unit.

Benefits of technology

Improves the durability and performance of NAND Flash memory, improves the overall efficiency of data read and write operations, and extends the service life of the memory cell.

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Abstract

The present application discloses a cache management method and a storage medium thereof. The steps of the cache management method include: when responding to a target data write request, obtaining the page information of the current target block, the page information indicates the page of the current target block that needs to perform data read and write operations; performing corresponding block operations according to the page information, wherein the page information includes: the last page of the current target block, the first page of the current target block, and the middle page of the current target block, and the page information includes the corresponding block operation logic, and the block operation logic is used to indicate the execution of the corresponding block operation. The cache management method disclosed in the present application can realize real-time and dynamic block management of the NAND Flash memory by obtaining page information to perform corresponding block operations on the current target block, taking into account the loss of the storage unit, and reasonably arranging the erasure of the storage unit and random reading and writing, thereby improving the durability and performance of the NAND Flash memory and improving the overall efficiency of data reading and writing operations.
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Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a cache management method and a storage medium thereof. Background Art

[0002] The popularity of embedded systems and mobile devices is increasing with the development of the Internet of Things, smart homes, and mobile Internet. These devices usually need to use Flash storage to store data and programs. NAND Flash is a non-volatile storage technology that is widely used in digital storage devices. NAND Flash provides higher storage density and lower cost, so it is very suitable for storing large amounts of data, such as in solid-state drives (SSDs), USB flash drives, digital camera memory cards, mobile phone storage, and other application scenarios that require large amounts of data storage.

[0003] NAND Flash memory usually performs well when performing continuous reading and writing, but it still has problems. In order to perform new write operations, NAND Flash memory needs to erase the original data first. This erasing process is relatively slow, and the erase operation needs to be performed before the data is written, which may increase system complexity and data latency. Due to the unstable performance of NAND Flash in random reading and writing, delays or performance degradation may occur in some applications. At the same time, NAND Flash memory has a limit on the number of writes, and each write operation will cause the storage unit to wear out, and ultimately the storage unit cannot correctly save data. This means that when continuously writing large amounts of data, the block management of NAND Flash memory needs to adopt the correct block operation logic, consider the wear of the storage unit, and reasonably arrange the storage unit erasure and random reading and writing. Summary of the invention

[0004] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0005] The embodiments of the present application provide a cache management method and a storage medium thereof, which can realize real-time dynamic block management of NAND Flash memory, improve the durability and performance of NAND Flash memory, and improve the overall efficiency of data read and write operations.

[0006] In a first aspect, an embodiment of the present application provides a cache management method, including:

[0007] In response to a target data write request, acquiring page information of a current target block, wherein the page information is determined by page usage, and the page information indicates a page of the current target block that needs to perform a data read or write operation;

[0008] Execute corresponding block operations according to the page information;

[0009] The page information includes: the last page of the current target block, the first page of the current target block and the middle page of the current target block, and the page information includes the corresponding block operation logic, and the block operation logic is used to instruct the execution of the corresponding block operation.

[0010] According to some cache management methods provided by embodiments of the present application, performing corresponding block operations according to the page information includes:

[0011] When the page information is the last page of the current target block, and it is determined through the page information of the current target block that the current target block has been used up, the current target block is added to the invalid page linked list;

[0012] Searching for a replacement block whose total number of invalid pages is equal to that of the current target block from the invalid page linked list, adding the replacement block to the free linked list, and deleting the replacement block from the invalid page linked list;

[0013] Acquire a target physical block from the free linked list, the target physical block represents a physical block with the smallest erase count in the free linked list, generate a first target block according to the target physical block, and mark page information of the first target block as the first page;

[0014] The first target block is replaced by the current target block, and the target data write request is responded to again.

[0015] According to some cache management methods provided by embodiments of the present application, before adding the current target block to the invalid page linked list, the method further includes:

[0016] It is confirmed that the current target block has been completely used, otherwise part of the target data is written into the current target block until the current target block is completely used.

[0017] According to some cache management methods provided by embodiments of the present application, the performing corresponding block operations according to the page information further includes:

[0018] When the page information is the first page of the current target block, erasing the current target block to obtain a second target block;

[0019] Using the second target block as a replacement for the current target block;

[0020] Write target data into the current target block.

[0021] According to some cache management methods provided by embodiments of the present application, the performing corresponding block operations according to the page information further includes:

[0022] When the page information is a middle page of the current target block, the target data is written into the current target block.

[0023] According to some cache management methods provided by embodiments of the present application, erasing the current target block to obtain a second target block includes:

[0024] Determine whether the current target block is successfully erased;

[0025] When it is determined that the current target block is successfully erased, the erased current target block is determined as a second target block.

[0026] According to some cache management methods provided by embodiments of the present application, after determining whether the current target block is successfully erased, the method further includes:

[0027] When it is determined that the erasure of the current target block fails, marking the current target block as a bad block in the flash memory;

[0028] Obtain a third target block from the free linked list, the third target block representing a physical block with the smallest erase count in the free linked list, and replace the bad block with the third target block;

[0029] The third target block is erased, and the erased third target block is determined as the second target block.

[0030] According to some cache management methods provided by embodiments of the present application, the method further includes:

[0031] When the target data fails to be written into the current target block, the fourth target block is obtained from the free list;

[0032] Erasing the fourth target block, and if erasing is successful, copying the data of the current target block to the fourth target block;

[0033] When the data of the current target block is successfully copied to the fourth target block, the current target block is marked as a bad block, and the fourth target block replaces the current target block.

[0034] According to some cache management methods provided by embodiments of the present application, the method further includes:

[0035] When the erasure of the fourth target block fails, the fourth target block is marked as a bad block and the fourth target block is re-acquired from the free linked list.

[0036] In a second aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the storage medium stores a computer program, and when the computer program is executed by a processor, the cache management method as described in the first aspect of the present application is implemented.

[0037] The embodiments of the present application include at least the following beneficial effects:

[0038] When responding to a target data write request, the page information of the current target block is obtained, and the page information indicates the page of the current target block that needs to perform data read and write operations; according to the page information, the corresponding block operation is performed, wherein the page information includes: the last page of the current target block, the first page of the current target block, and the middle page of the current target block, and the page information includes the corresponding block operation logic, and the block operation logic is used to indicate the execution of the corresponding block operation. By performing block operations on the current target block through page information, it is possible to achieve real-time and dynamic block management of the NAND Flash memory, consider the loss of the storage unit, and reasonably arrange the erasure of the storage unit and random read and write, thereby improving the durability and performance of the NAND Flash memory and improving the overall efficiency of data read and write operations.

[0039] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained through the structures particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings are used to provide further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0041] Figure 1 A schematic diagram of the structure of a NAND Flash memory NFTL layer provided in an embodiment of the present application;

[0042] Figure 2 A schematic diagram of a mapping relationship between a logical page page and a physical page page provided in an embodiment of the present application;

[0043] Figure 3 A schematic diagram of the steps of a cache management method provided in an embodiment of the present application;

[0044] Figure 4 A schematic diagram of specific steps of a block operation provided in an embodiment of the present application;

[0045] Figure 5 A schematic diagram of specific steps of another block operation provided in an embodiment of the present application;

[0046] Figure 6 A schematic diagram of specific steps of another block operation provided in an embodiment of the present application;

[0047] Figure 7A logical schematic diagram of a cache management method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. The described embodiments should not be regarded as limiting the present application, and all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.

[0049] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0051] Before further describing the embodiments of the present application in detail, the nouns and terms involved in the embodiments of the present application are explained. The nouns and terms involved in the embodiments of the present application are subject to the following interpretations.

[0052] NAND Flash memory is a type of Flash memory that uses a nonlinear macrocell mode internally, providing a cheap and effective solution for the implementation of solid-state large-capacity memory. Nand flash memory is a non-volatile storage medium with advantages such as large capacity and fast rewrite speed. It is suitable for storing large amounts of data and will not lose data after power failure. Common USB flash drives, TF cards / SD cards, and most solid-state drives (Solid State Disk or Solid State Drive, SSD) are composed of it.

[0053] The basic structure of NAND Flash memory includes:

[0054] Package: Package is the storage chip, that is, the NAND Flash particles seen after disassembling the solid-state drive or SD card.

[0055] Wafer (die), die is the smallest unit in NAND Flash memory that can independently execute commands and report status. Each package contains one or more dies.

[0056] Plane: Different planes can operate concurrently, but there are some restrictions. Each die usually includes 1 or 2 planes.

[0057] Block: Block is the smallest erase unit, and each plane contains multiple blocks.

[0058] Page: A page is the smallest read and write unit. Each block contains multiple pages.

[0059] When performing block management of NAND Flash memory, the object of read and write operations is page, and the object of erase is block. Each block needs to be erased before writing. Before erasing, it is necessary to ensure that the data of all pages on the block to be erased is not valid data. If the page contains valid data, the data needs to be moved to other places.

[0060] The popularity of embedded systems and mobile devices is increasing with the development of the Internet of Things, smart homes, and mobile Internet. These devices usually need to use Flash storage to store data and programs. NAND Flash is a non-volatile storage technology that is widely used in digital storage devices. NAND Flash provides higher storage density and lower cost, so it is very suitable for storing large amounts of data, such as in solid-state drives (SSDs), USB flash drives, digital camera memory cards, mobile phone storage, and other application scenarios that require large amounts of data storage.

[0061] NAND Flash memory usually performs well when performing continuous reading and writing, but it still has problems. In order to perform new write operations, NAND Flash memory needs to erase the original data first. This erasing process is relatively slow, and the erase operation needs to be performed before the data is written, which may increase system complexity and data latency. Due to the unstable performance of NAND Flash in random reading and writing, delays or performance degradation may occur in some applications. At the same time, NAND Flash memory has a limited number of writes, and each write operation will cause the storage unit to wear out, and ultimately the storage unit cannot correctly save data. This means that when continuously writing large amounts of data, the block management of NAND Flash memory needs to adopt the correct processing logic, consider the wear of the storage unit, and reasonably arrange the storage unit erasure and random reading and writing.

[0062] An important feature of NAND Flash is that it does not support update operations, strictly speaking, it does not support in-place update. If data has been written to a page and you want to modify the content of this page, you can only use the following methods:

[0063] 1) First read out all the data in the block to which this page belongs, for example, first read the dynamic random access memory (DRAM);

[0064] 2) Modify the content of the corresponding page;

[0065] 3) Erase the entire block;

[0066] 4) Write the modified block data back to Flash.

[0067] However, the number of times a block can be erased and written to a NAND Flash memory is limited. If the above method is used to perform in-place updates, the NAND Flash will be easily damaged, and the time consumed by erasing is much longer than the time consumed by reading and writing. If the relevant logic is not handled properly, the performance will be affected. A compromise method is to write the new data to a new page and mark the original page as invalid.

[0068] Therefore, the NAND Flash Translation Layer (NFTL) is proposed in the NAND Flash memory to manage the NAND Flash storage device, using page to page mapping or block to block mapping for easy management. Page to page mapping refers to the process of mapping the logical page to the physical page.

[0069] Based on this, the embodiment of the present application provides a cache management method and a storage medium thereof. The cache management method can realize real-time dynamic block management of NAND Flash memory by acquiring page information and performing corresponding block operations on the current target block, taking into account the loss of storage units, and reasonably arranging storage unit erasure and random read and write, thereby improving the durability and performance of NAND Flash memory and improving the overall efficiency of data read and write operations.

[0070] First, the NFTL structure for implementing the cache management method in this application is introduced.

[0071] Please refer to Figure 1 , is a schematic diagram of the structure of a NAND Flash memory NFTL layer provided in an embodiment of the present application, such as Figure 1As shown, the NFTL layer structure used in the embodiment of the present application includes an nftl_interface module and an nftl_core module. Nftl_interface is mainly responsible for providing nftl_api interface and encapsulating mtd driver interface and other functions, realizing the external interface function of the nftl layer, including three interfaces: nftl_api, nftl_init and nftl_hw_interface; nftl_core is the core code of the nftl layer, including the mapping of logical address to physical address, write balancing, garbage collection and other functions, including the core parts: nftl_cache, nftl_logic, nftl_start, nftl_gc, nftl_build, etc. The NFTL layer realizes the mapping of logical address space to physical address space, provides a write balancing algorithm, supports bad block management, garbage collection, and power failure recovery.

[0072] like Figure 2 As shown, the page to page mapping relationship provided in the embodiment of the present application is as follows:

[0073] By inputting start_sector and the total length of the sector, the total length of the sector is sector+len, and the following process is used:

[0074] Implement the conversion from sector to logic_page in the nftl_cache layer, and implement the conversion from logic_page to physical_page in the nftl_logic layer;

[0075] In each physical_block page63 of the nftl_logic layer, the logical page_num of the previous page0~page62 is written into the physical_page;

[0076] The mapping_page data of each physical_block is written to the flash only when it is determined that the last page 63 is being written.

[0077] It should be noted that, in the embodiment of the present application, sector is a sector, a logical storage unit of generally 512 bytes in length, physical_block is a physical block, logic_page is a logical page, for example, a logical page of 2048 bytes in size contains 4 sectors, physical_page is a physical page, page_num is a physical page number, mapping_page is used to track and manage the information of the data storage location in NAND Flash (i.e., mapping_data), and mapping_page is generally the last physical page of the physical block. The block mapping in the embodiment of the present application is performed according to this logic.

[0078] Based on the NFTL layer structure provided in the embodiment of the present application, a cache management method is provided in the embodiment of the present application.

[0079] Please refer to Figure 3 , is a schematic diagram of the steps of a cache management method provided in an embodiment of the present application, such as Figure 3 As shown, the cache management method provided in the embodiment of the present application may include but is not limited to steps S110 to S120:

[0080] Step S110 , in response to a target data write request, obtaining page information of the current target block, wherein the page information is determined by page usage, and the page information indicates a page of the current target block that needs to perform a data read or write operation.

[0081] It should be noted that in the embodiment of the present application, data information is stored in the current target block, wherein the data information includes user data and special data. User data is created and accessed by users or applications; special data is generated by the system or underlying hardware and is used to manage and maintain the normal operation of the system.

[0082] Exemplarily, in a feasible embodiment of the present application, user data and special data are stored in the current target block, and the special data may include but are not limited to: an erase count erase_count used to indicate the number of erases of the current target block and a flag special_flag used to mark or identify specific data or operation status. The erase count erase_count can be used to understand the number of erases of the current target block, which can be used as a basis for selecting a block to use, thereby better managing the block life in the NANDFlash memory and improving durability; the flag special_flag can be used to mark the current target block. For example, when the current target block is determined to be a bad block, it can be marked through the flag special_flag to facilitate subsequent bad block management.

[0083] In addition to the data information, in the embodiment of the present application, the current target block also includes page information, and the page information indicates the page on which the current target block needs to perform data read and write operations.

[0084] It should be noted that in the embodiment of the present application, the page information includes: the last page of the current target block, the first page of the current target block and the middle page of the current target block. By obtaining the page usage, it is determined which of the three situations the page information in the current target block represents.

[0085] Exemplarily, in a feasible embodiment of the present application, in response to a target data write request, after determining the current target block current_block, the page usage status page_used is obtained from current_block, and the page usage status page_used is used to determine whether the page in the current target block that can perform the target data write operation is the last page or the first page, so that the page information to be used for the upcoming target data write operation can be determined, and subsequent block operations are performed through the page information.

[0086] In the embodiment of the present application, by acquiring page information in the current target block and performing corresponding block operations according to the page information, the blocks of the NAND Flash memory are managed in real time and dynamically.

[0087] Step S120: Execute corresponding block operations according to the page information.

[0088] It should be noted that, in the embodiment of the present application, the page information includes: the last page of the current target block, the first page of the current target block, and the middle page of the current target block. The page information includes the block operation logic corresponding thereto. The block operation logic is used to indicate the execution of the corresponding block operation. According to the specific page information in the current target block, the corresponding block operation logic is selected to perform block management on the current target block. The page information is divided into the first page, the middle page, and the last page. Different block operation logics are used for the three situations of the page information, as described below:

[0089] For example, please refer to Figure 4 , is a schematic diagram of a block operation step provided in an embodiment of the present application, such as Figure 4 As shown, in the embodiment of the present application, when the page information of the current target block is the last page, the block operation may include but is not limited to steps S121a to S124a:

[0090] Step S121a: When the page information is the last page of the current target block, the current target block is added to the invalid page linked list.

[0091] It should be noted that, as mentioned above, in an embodiment of the present application, the page usage is used to determine whether the page information is the last page of the current target block. However, since update operations are not supported, when the page information is the last page of the current target block, there are two situations. On the one hand, all pages have been used up, and on the other hand, the last page has not been used.

[0092] Adding the current target block to the invalid page list is determined based on the page usage. The current target block will only be added to the invalid page list when the page information is the last page of the current target block, indicating that the current target block is full. If the last page is not used, the current target block will not be added to the invalid page list. Only after the last page is used up will the current target block be added to the invalid page list.

[0093] When it is confirmed that the current target block has been used up, the current target block is added to the invalid page list.

[0094] Exemplarily, in an embodiment of the present application, the page usage page_used of the current target block is obtained, and the page usage page_used is compared with the total number of block pages pages_per_block. When page_used is equal to pages_per_block, it is determined that all pages in the current target block have been used up, which means that the current target block has been used up, and it is added to the invalid page list; when page_used is not equal to pages_per_block, it is determined that all pages in the current target block have not been used up, and data needs to be written until it is used up.

[0095] Specifically, in the embodiment of the present application, the page usage status page_used is obtained, and the page usage status page_used is compared with the total number of block pages pages_per_block. When the page usage status page_used is equal to the total number of block pages - 1 (pages_per_block-1), it means that the current target block page information is the last page, but the current target block has not been fully used at this time; when the data is written to the last page of the current target block, page_used is incremented by 1, and the page usage status page_used will be equal to the total number of block pages pages_per_block, which means that the current target block has been fully used, and the current target block is added to the invalid page linked list.

[0096] When it is determined that the current target block has been used up, the current target block can no longer be written to, so it is added to the invalid page linked list and step S122a is performed.

[0097] Step S122a, searching the invalid page list for a replacement block whose total number of invalid pages is equal to the current target block, adding the replacement block to the free list, and deleting the replacement block from the invalid page list.

[0098] It should be noted that since the current target block can no longer perform read and write operations, a new block needs to be selected from the free list as the current target block to respond to the read and write operations of the target data. In order to avoid a lack of blocks in the free list to replace the current target block when performing large-scale read and write operations, it is necessary to select a replacement block from the invalid page list and supplement it into the invalid page list.

[0099] It is understandable that since the block selected from the free list has the same total number of pages as the current target block, it is necessary to find a replacement block with the same number of invalid pages as the current target block from the valid page list to facilitate block management. Once the replacement block is added to the free list, it can be deleted from the invalid page list.

[0100] Step S123a, obtaining a target physical block from the free list, where the target physical block represents a physical block with the smallest erase count in the free list, and generating a first target block based on the target physical block, where the page information of the first target block is the first page.

[0101] It should be noted that, in the embodiment of the present application, after a replacement block is added to the free linked list, a new current target block can be selected from it.

[0102] In order to obtain the new current target block, it is necessary to first obtain the target physical block from the free list. The target physical block is the physical block with the smallest erase number in the free list. The physical block with the smallest erase number is selected as the target physical block to better control the erase life of the memory. The obtained target physical block is used to map and generate the first target block. The page information in the first target block is the first page.

[0103] The first target block is generated by selecting a target physical block from the free linked list, so as to replace the current target block that has been used up and respond to the target data write request again.

[0104] Step S124a: Replace the first target block with the current target block, and respond to the target data write request again.

[0105] It should be noted that in the embodiment of the present application, in order to achieve wear leveling and balance the life of the block, when the current target block completes writing the mapping_data data to the last page (that is, it means that the target block is full), it is necessary to select the target physical block from the free list and generate a new first target block to replace the current target block. By selecting the target physical block from the free list to generate the first target block, the current target block can be replaced to replace the used current target block and re-respond to the target data write request. The physical block with the smallest erase number is selected as the target physical block in order to better control the erase life of the memory. The obtained target physical block is used to map and generate the first target block, and the page information of the first target block is marked as the first page. It should be pointed out that the physical block with the smallest erase number indicates the number of times the physical block is reused. The smallest erase number means that the block has the longest service life. Therefore, the erase life of the memory can be better controlled by balancing the erase times of each block.

[0106] The first target block is replaced with the current target block, and the target data write request is responded to again to complete the block operation. Through steps S121a to S124a in the embodiment of the present application, the current target block that has been used is managed.

[0107] For example, please refer to Figure 5 , which is a schematic diagram of another block operation step provided in an embodiment of the present application, such as Figure 5 As shown, in the embodiment of the present application, when the page information of the current target block is the first page, the block operation may include but is not limited to steps S121b to S123b:

[0108] Step S121b: when the page information is the first page of the current target block, the current target block is erased to obtain a second target block.

[0109] It is understandable that in the embodiment of the present application, when it is determined that the page information of the current target block is the first page of the current target block, it means that the block operation starts from the first page of the block at this time. Since the block needs to be erased in advance when the write operation is performed, the block needs to be erased when responding to the write request to obtain the second target block. The second target block is a successfully erased block, which is used for subsequent target data write operations.

[0110] It should be noted that, in the embodiment of the present application, when acquiring the second target block, it is necessary to determine whether the second target block is a bad block to avoid data writing failure caused by the obtained second target block being a bad block.

[0111] Exemplarily, in an embodiment of the present application, the step of acquiring the second target block may include:

[0112] Determine whether the current target block is erased successfully;

[0113] When it is determined that the current target block is successfully erased, the erased current target block is determined as the second target block.

[0114] It can be understood that when it is determined that the current target block is erased successfully, it indicates that the current target block can perform the erase operation normally for subsequent target data writing, so it is determined as the second target block. At this time, the erase count of the second target block is added to the erase count of the current target block.

[0115] If the current target block is successfully erased, it can be directly determined as the second target block. However, if an erase operation fails, further bad block management is required.

[0116] Exemplarily, in another embodiment of the present application, the step of acquiring the second target block may further include:

[0117] When it is determined that the current target block fails to be erased, the current target block is marked as a bad block in the flash memory;

[0118] Obtain a third target block from the free list, the third target block represents a physical block with the smallest erase count in the free list, and replace the bad block with the third target block;

[0119] The third target block is erased, and the erased third target block is determined as the second target block.

[0120] It should be noted that in the embodiment of the present application, when the current target block fails to be erased, it can be marked as a bad block so that the block will not be selected for block writing in subsequent management. Specifically, it can be marked as a bad block in the flash memory by using special data, and the marked bad block can be recycled.

[0121] When the current target block is marked as a bad block, a new block needs to be selected to replace it. In the embodiment of the present application, the third target block is obtained from the free list for replacement. The third target block is also the physical block with the smallest erase number in the free list. After selection, it replaces the bad block. It can be understood that the page information of the third target block also represents the first page of the block.

[0122] After acquiring the third target block, an erase operation is performed on it. When the erasure is successful, the successfully erased third target block can be used to replace the second target block marked as a bad block, thereby implementing the bad block control in step S121b to prevent target data writing errors caused by bad blocks that failed to be erased when responding to a write request.

[0123] Step S122b: Replace the current target block with the second target block.

[0124] It can be understood that after the current target block after erasure is modified corresponding to the special data, a second target block for replacing the current target block can be obtained to perform step S123b.

[0125] Step S123b, write the target data into the current target block.

[0126] In an embodiment of the present application, through steps S121b to S123b, block management is completed when the page information of the current target block is the first page, and control of bad blocks is achieved when the page information of the current target block is the first page and the block operation of the erase operation is performed, so as to avoid the bad blocks caused by erase failure affecting the writing of target data.

[0127] Exemplarily, in the embodiment of the present application, when the page information of the current target block is an intermediate page, the block operation may include but is not limited to step S121c:

[0128] Step S121c: when the page information is the middle page of the current target block, write the target data into the current target block.

[0129] It is understandable that in the embodiment of the present application, when the page information is not the last page of the current target block, that is, the middle page of the current target block, it indicates that the page has not been used up and can still be written. At this time, the current target block does not need to be erased or updated, and can be directly written. Therefore, when the page information is the middle page, the target data will be partially written first until the current target block is used up. In the embodiment of the present application, step S121c is executed.

[0130] In the embodiment of the present application, through step S121c, block operation is implemented when the page information is an intermediate page, and the target data is written into the current target block.

[0131] It should be noted that in the embodiment of the present application, in addition to bad blocks that cannot be erased may appear during the erase operation, bad blocks that cannot be written may also appear when the target data is written. Therefore, in the steps S123b and S121c described above, when writing the target data to the current target block, corresponding block operations are also required according to the actual writing situation.

[0132] Please refer to Figure 6 , is a flowchart of a block operation of writing target data provided by an embodiment of the present application, such as Figure 6 As shown, in the embodiment of the present application, the block operation for writing the target data may include but is not limited to steps S210 to S220:

[0133] Step S210: When writing the target data into the current target block fails, obtaining the fourth target block from the free linked list.

[0134] It should be noted that when the target data cannot be written into the current target block, the current target block needs to be marked as a bad block and recycled. However, the write operation has been performed at this time, and the current target block may have some data or some target data has been written. If it is directly marked as a bad block, its internal data cannot be transferred out. Therefore, it is necessary to obtain the fourth target block from the free linked list to transfer the data in the current target block. After the fourth target block is obtained, step S210 is performed.

[0135] Step S220: Erasing the fourth target block, and if the erasing is successful, copying the data of the current target block to the fourth target block.

[0136] It is understandable that, in step S220, since the fourth target block is used to transfer the data in the current target block, the fourth target block needs to be erased before writing. When the fourth target block is erased, it is also necessary to determine whether the erasure is successful. If the erasure is successful, the data of the current target block can be copied to the fourth target block to achieve the data transfer of the current target block.

[0137] However, when performing the erasing operation of the fourth target block, if the erasing of the fourth target block fails, the following operations need to be performed:

[0138] When erasing of the fourth target block fails, the fourth target block is marked as a bad block and the fourth target block is acquired from the free linked list again.

[0139] It is understandable that when the erasure of the fourth target block fails, it means that the acquired block cannot be normally erased, so it is marked as a bad block, and the fourth target block is reacquired for data transfer of the current target block.

[0140] Step S230: When the data of the current target block is successfully copied to the fourth target block, the current target block is marked as a bad block, and the fourth target block replaces the current target block.

[0141] It should be noted that when the data of the current target block is successfully copied to the fourth target block, the current target block can be marked as a bad block for block recovery, and the fourth target block to which the current target block is copied continues to be the current target block for data writing operations.

[0142] Through steps S210 to 230 in the present application, block management can be implemented when the current target block cannot write the target data during target data writing, bad blocks that cannot write data can be processed, and smooth writing of the target data can be ensured.

[0143] Through the cache management method provided by the embodiment of the present application, when responding to a target data write request, the page information of the current target block is obtained, and the page information indicates the page of the current target block that needs to perform data read and write operations; according to the page information, the corresponding block operation is performed. By performing block operations on the current target block through page information, it is possible to achieve real-time and dynamic block management of the NAND Flash memory, consider the loss of the storage unit, and reasonably arrange the erasure of the storage unit and random read and write, thereby improving the durability and performance of the NAND Flash memory and improving the overall efficiency of data read and write operations.

[0144] The following is a detailed description of the overall process of the cache management method of the present application in conjunction with specific embodiments. Figure 7 , is a logical diagram of a cache management method provided in an embodiment of the present application, such as Figure 7 As shown, in the embodiment of the present application, the cache management method may include the following steps:

[0145] In response to the target data write operation, the page information of the current target block is obtained, wherein the current target block is current_block, the page information is determined by the page usage, the page information indicates the page of the current target block that needs to perform data read and write operations, and the page usage is page_used; the current target block stores user data and special data, and the special data may include but is not limited to: an erase count erase_count used to indicate the number of erases of the current target block and a flag special_flag used to mark or identify specific data or operation status. The erase count erase_count can be used to understand the number of erases of the current target block, which can be used as a basis for selecting a block to use, thereby better managing the block life in the NAND Flash memory and improving durability; the flag special_flag can be used to mark the current target block. For example, when the current target block is determined to be a bad block, it can be marked by the flag special_flag to facilitate subsequent bad block management;

[0146] According to the page information, the corresponding block operation is performed, wherein the specific page information and the corresponding block operation include the following situations:

[0147] Case 1

[0148] When the page information is the last page of the current target block current_block, and when page_used is not equal to pages_per_block, write part of the target data into the current target block current_block, where pages_per_block is the total number of pages of the current target block current_block; until the mapping_data data is written, page_used increments to equal pages_per_block;

[0149] When the current target block current_block is used up, page_used is equal to pages_per_block, and the current target block current_block is added to the invalid page list invalid_page_list;

[0150] Find the replacement block whose invalid page invalid_page_count is equal to the total number of pages pages_per_block of the current target block current_block from the invalid_page_list;

[0151] Add the replacement block to the free list free_list and delete the replacement block from the invalid page list invalid_page_list;

[0152] Obtain a target physical block from the free list free_list, the target physical block represents a physical block with the largest erase count erase_count in the free list, generate a first target block according to the target physical block, and the page information of the first target block is the first page;

[0153] The first target block is replaced with the current target block current_block, and the target data write request is responded to again.

[0154] Case 2

[0155] When the page information is the first page of the current target block current_block, the current target block current_block is erased, and after the erasure is successful, the erase count erase_count is increased by 1;

[0156] Determine whether the current target block current_block is successfully erased, and when it is determined that the current target block current_block is successfully erased, determine the erased current target block current_block as the second target block;

[0157] When it is determined that the current target block current_block fails to be erased, the current target block current_block is marked as a bad block to the flash memory Flash;

[0158] Get the third target block from the free list free_list, the third target block represents the physical block with the smallest erase count erase_count in the free list free_list, and replace the bad block with the third target block;

[0159] Erasing the third target block, determining the successfully erased third target block as the second target block, and if the erasing is unsuccessful, marking the failed erased third target block as a bad block and reselecting the third target block;

[0160] The second target block is replaced with the current target block current_block, and the target data is written into the current target block current_block.

[0161] Case 3

[0162] When the page information is the middle page of the current target block current_block, the target data is written into the current target block current_block.

[0163] When executing case 2 and case 3, writing the target data into the current target block current_block includes the following steps:

[0164] Write the target data into the current target block current_block;

[0165] When it is determined that writing the target data into the current target block current_block fails, the fourth target block is obtained from the free list free_list;

[0166] Erasing the fourth target block, if it is determined that erasing of the fourth target block fails, marking the fourth target block as a bad block and re-obtaining the fourth target block from the free list free_list; if erasing is determined to be successful, copying the data of the current target block current_block to the fourth target block;

[0167] When the data of the current target block current_block is successfully copied to the fourth target block, the current target block current_block is marked as a bad block, and the fourth target block replaces the current target block current_block.

[0168] It should be noted that in the embodiments of the present application, the cache management method used in the embodiments of the present application Figure 1The operation is performed in the NFTL layer of the NAND Flash memory proposed in the specification. The nftl_hw_interface interface can be called to write the target data into the current target block current_block, and the operation of marking the current target block current_block as a bad block can also be performed by calling the nftl_hw_interface interface.

[0169] Through the cache management method provided by the embodiment of the present application, when responding to a target data write request, the page information of the current target block is obtained, and the page information indicates the page of the current target block that needs to perform data read and write operations; according to the page information, the corresponding block operation is performed. By performing block operations on the current target block through page information, it is possible to achieve real-time and dynamic block management of the NAND Flash memory, consider the loss of the storage unit, and reasonably arrange the erasure of the storage unit and random read and write, thereby improving the durability and performance of the NAND Flash memory and improving the overall efficiency of data read and write operations.

[0170] An embodiment of the present application further provides a storage medium, which is a computer-readable storage medium and stores a computer program. When the computer program is executed by a processor, the cache management method described above is implemented.

[0171] The memory, as a non-transient computer-readable storage medium, can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some embodiments, the memory may optionally include a memory remotely disposed relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0172] The cache management method provided by the present application can be used in many general or special computer system environments or configurations. For example: personal computers, server computers, handheld devices or portable devices, tablet devices, multi-processor systems, microprocessor-based systems, set-top boxes, programmable consumer electronic devices, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, etc. The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in distributed computing environments, in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0173] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0174] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, a, b or

[0175] At least one item in c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0176] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0177] In the embodiments of the present application, the term "module" or "unit" refers to a computer program or a part of a computer program that has a predetermined function and works together with other related parts to achieve a predetermined goal, and can be implemented in whole or in part by using software, hardware (such as processing circuits or memories), or a combination thereof. Similarly, a processor (or multiple processors or memories) can be used to implement one or more modules or units. In addition, each module or unit can be part of an overall module or unit that includes the function of the module or unit.

[0178] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0179] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0180] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as ROM), random access memory (Random Access Memory, referred to as RAM), disk or optical disk and other media that can store program codes.

[0181] The step numbers in the above method embodiment are only provided for the convenience of explanation and description, and no limitation is imposed on the order of the steps. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

Claims

1. A cache management method, characterized in that: include: In response to a target data write request, acquiring page information of a current target block, wherein the page information is determined by page usage, and the page information indicates a page of the current target block that needs to perform a data read or write operation; Execute corresponding block operations according to the page information; Wherein, the page information includes: the last page of the current target block, the first page of the current target block and the middle page of the current target block, the page information includes the corresponding block operation logic, and the block operation logic is used to indicate the execution of the corresponding block operation; The performing of the corresponding block operation according to the page information includes: when the page information is the last page of the current target block, adding the current target block to an invalid page list; searching for a replacement block whose invalid page number is equal to the total number of pages of the current target block from the invalid page list, adding the replacement block to a free list, and deleting the replacement block from the invalid page list; obtaining a target physical block from the free list, the target physical block representing the physical block with the smallest erase number in the free list, generating a first target block according to the target physical block, and marking the page information of the first target block as the first page; replacing the first target block with the current target block, and responding to a target data write request again; When the page information is the first page of the current target block, the current target block is erased to obtain a second target block; the second target block is used as a replacement for the current target block; and the target data is written into the current target block; When the page information is a middle page of the current target block, the target data is written into the current target block.

2. The cache management method according to claim 1, characterized in that: Before adding the current target block to the invalid page linked list, the method further includes: It is confirmed that the current target block has been completely used, otherwise part of the target data is written into the current target block until the current target block is completely used.

3. The cache management method according to claim 1, characterized in that: Erasing the current target block to obtain a second target block includes: Determine whether the current target block is successfully erased; When it is determined that the current target block is successfully erased, the erased current target block is determined as a second target block.

4. The cache management method according to claim 3, characterized in that: After determining whether the current target block is successfully erased, the method further includes: When it is determined that the erasure of the current target block fails, marking the current target block as a bad block in the flash memory; Obtain a third target block from the free linked list, the third target block representing a physical block with the smallest erase count in the free linked list, and replace the bad block with the third target block; The third target block is erased, and the erased third target block is determined as the second target block.

5. The cache management method according to claim 1, characterized in that: The method further comprises: When the target data fails to be written into the current target block, the fourth target block is obtained from the free linked list; Erasing the fourth target block, and if erasing is successful, copying the data of the current target block to the fourth target block; When the data of the current target block is successfully copied to the fourth target block, the current target block is marked as a bad block, and the fourth target block replaces the current target block.

6. The cache management method according to claim 5, characterized in that: The method further comprises: When the erasure of the fourth target block fails, the fourth target block is marked as a bad block and the fourth target block is re-acquired from the free linked list.

7. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the cache management method according to any one of claims 1 to 6 is implemented.

Citation Information

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