Macro-cell layout method for integrated circuit design

Abstract

The invention discloses a macro cell layout method used in integrated circuit design. The macro cell layout method comprises the steps of obtaining to-be-laid circuit netlist information and macro cell structure features; based on a DBSCAN clustering algorithm, clustering all the macro-cells according to the circuit netlist information to obtain a plurality of clusters; updating the plurality of clusters based on a genetic algorithm; creating a plurality of macro-cell arrays in the plurality of clusters according to the macro-cell structure features; respectively carrying out layout on the macro cell array in each cluster; performing layout on each cluster to obtain a preliminary layout result; updating the preliminary layout result by using an area evaluation model and a line length evaluation model in a target function of a simulated annealing algorithm to obtain an updated layout result; updating the updated layout result again by using a greedy algorithm so as to solve the congestion problem; and updating the overlapped part of the macro unit globally to obtain a final layout result.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a macro cell layout method used in integrated circuit design. Background Art

[0002] With the continuous development of integrated circuit technology, its complexity continues to increase. In order to improve the efficiency of integrated circuit design, shorten the design cycle, and improve the reliability of functions, a large number of macro cells are often used in modern large-scale integrated circuit design. Macro cell layout is in the early stage of integrated circuit design. The quality of its layout directly affects the subsequent standard cell layout and has a great impact on the performance, power consumption and area of ​​the integrated circuit. In the actual integrated circuit design process, the macro cell layout is usually completed first, and then the standard cell layout is carried out under the condition that the macro cell position is fixed.

[0003] In the current macrocell layout method, it is mainly based on manual work and is very dependent on the experience of engineers. In the macrocell layout process, many design constraints need to be considered, such as macrocells should be placed as close to the module boundary as possible, macrocells with close design levels should be placed in closer positions, and a certain distance should be left between macrocells. The macrocell layout method that relies on manual work requires multiple attempts and is time-consuming, so it is very important to design an efficient and reliable automatic macrocell layout method. Summary of the invention

[0004] The main purpose of the present application is to provide a macro cell layout method, aiming to solve the technical problem that manual macro cell layout has poor effect and is time-consuming.

[0005] In order to achieve the above object, the present application provides a macro cell layout method, the macro cell layout method comprising the following steps:

[0006] S1. Obtaining circuit netlist information and macrocell structural features to be laid out;

[0007] S2, based on the DBSCAN clustering algorithm, cluster all macro cells according to the circuit netlist information to obtain multiple clusters;

[0008] S3, updating multiple clusters based on genetic algorithm;

[0009] S4, creating multiple macrocell arrays in multiple clusters according to macrocell structural features;

[0010] S5, laying out the macro cell arrays in each cluster respectively;

[0011] S6. Layout each cluster separately to obtain a preliminary layout result;

[0012] S7, using the area evaluation model and the line length evaluation model in the objective function of the simulated annealing algorithm to update the preliminary layout result to obtain an updated layout result;

[0013] S8, using a greedy algorithm to update the updated layout result again to solve the congestion problem;

[0014] S9. Globally update the overlapping parts of the macro cells to obtain the final layout result.

[0015] In one embodiment, in S1, the circuit netlist information and macrocell structural features include:

[0016] All design level information in the circuit, the number of standard cells in different design levels, the design level information of all macro cells, and the size and pin location information of all macro cells.

[0017] In one embodiment, the S2 comprises the following steps:

[0018] S21, calculate the distance metric between two macro units as:

[0019]

[0020] Among them, p represents two macro units m i and m j The number of standard cells in the common design hierarchy between them, n represents the number of all standard cells in the circuit netlist, Area k represents the area of ​​a standard unit;

[0021] S22, using the adaptive DBSCAN clustering algorithm parameters, generating a list of all eps parameters from 0 to 1 with a step size of 0.01, and generating a list of MinPts parameters from 1 to N, where N represents the number of all macro units;

[0022] S23, for all eps and MinPts parameter lists, combine them in pairs to generate parameter pair lists, generate a set of DBSCAN clustering results based on each set of parameter pair lists, and only retain the results with 4 clusters;

[0023] S24, assigning the macro units that are not assigned to the cluster to a cluster with the closest average distance metric;

[0024] S25. Calculate the silhouette coefficient of each DBSCAN clustering result and sort them from high to low according to the silhouette coefficient. The silhouette coefficient is defined as:

[0025]

[0026] Where a(i) is the average distance measure from the i-th macrocell to other macrocells in the same cluster, and b(i) is the minimum value of the average distance measure from the i-th macrocell to all macrocells in other clusters.

[0027] In one embodiment, the S3 comprises the following steps:

[0028] S31, performing gene encoding on the DBSCAN clustering results to generate chromosomes;

[0029] S32. Each chromosome is an individual, and multiple individuals constitute a population;

[0030] S33, expand the number of individuals in the population;

[0031] S34. Use the fitness function to evaluate the population. The fitness function is defined as:

[0032]

[0033]

[0034] Among them, V σ represents the standard deviation coefficient, σ represents the standard deviation between areas, represents the average area, S represents the silhouette coefficient of the population, represents the average value of the standard deviation coefficient of the macrocell area within all clusters, V σB represents the standard deviation coefficient of the area between all clusters, α, β, γ and λ are coefficients, W represents the penalty term, Area cluster represents the sum of the areas of all macrocells in a cluster, and n is the number of macrocells;

[0035] S35. Use the roulette algorithm to select a number of individuals with high fitness function values ​​in each generation of the population. The probability of each individual being selected is proportional to its fitness function value. The probability is defined as:

[0036]

[0037] Where N represents the size of the population;

[0038] S36, using a crossover and mutation method to perform gene update on the selected individuals with high fitness function values;

[0039] S37. When the maximum number of iterations is reached, the genetic algorithm is terminated, and in the last generation of the population, the individual with the highest fitness function value is selected as the final macro-unit clustering result.

[0040] In one embodiment, in S33, the expansion number is 100, and the expansion methods include crossover and mutation.

[0041] In one embodiment, the S36 comprises the following steps:

[0042] S361. Randomly select gene segments from the chromosomes of the selected parent individuals;

[0043] S362, exchange randomly selected gene fragments of two parent individuals to obtain updated chromosomes;

[0044] S363, performing conflict detection on the updated chromosome, updating the duplicated genes, and obtaining a second updated chromosome;

[0045] S364, randomly select a gene corresponding to a macro unit in the chromosome after the second update, and move it to another cluster to obtain a chromosome after the third update;

[0046] S365. In the chromosome after the three updates, randomly select a gene corresponding to a macro unit in each of the two clusters, and then exchange their positions.

[0047] In one embodiment, in S7, the objective function of the simulated annealing algorithm is defined as follows:

[0048]

[0049] Among them, Area dead represents the area of ​​the invalid region, WL represents the total line length, α and β represent weight coefficients, and max() represents the maximum value that occurs during multiple iterations;

[0050] In one embodiment, in S7, the area assessment model is defined as follows:

[0051]

[0052] Among them, Area total represents the total area, Indicates the area of ​​the macro unit, Area std Represents the rectangular area available for standard cell layout, Area pena Represents the area of ​​the penalty region.

[0053] In one embodiment, in S7, the line length evaluation model calculation steps are as follows:

[0054] Calculate the equivalent pin information of all macro cells, including location and bit width;

[0055] Create a polygon for standard cell layout;

[0056] Calculating the Manhattan distances from all macrocell equivalent pins to the polygon;

[0057] Compute the sum of all Manhattan distances.

[0058] In one embodiment, the S8 comprises the following steps:

[0059] S81, traversing all macro cells in the updated layout result;

[0060] S82, determining whether the equivalent pin distance between the traversed macro unit and other macro units is less than a threshold;

[0061] S83, determining whether the macro units belong to the same group of connection relationships;

[0062] S84: If the macro unit equivalent pin distance is less than a threshold value and does not belong to the same group of connection relationships, the traversed macro unit is updated by rotating or flipping.

[0063] In one embodiment, S9 includes: introducing a penalty term into the objective function of the simulated annealing algorithm, first recording the overlapping areas, overlapping macro units and their clusters, and then defining the penalty term as follows:

[0064]

[0065] Area overlap Area is the common area between the new layout result and the recorded overlapping area. macro The area of ​​the recorded overlapping macro cells is re-placed based on the updated objective function. If the overlapping problem occurs again, this process needs to be repeated until a macro cell layout result without overlap is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] Figure 1 Schematic diagram of a macro cell layout method for integrated circuit design in an embodiment of the present application.

[0067] Figure 2 Schematic diagram of the structural features of the macro unit in the embodiment of the present application.

[0068] Figure 3 It is a schematic diagram of the process of updating multiple clusters based on a genetic algorithm in an embodiment of the present application.

[0069] Figure 4 It is a schematic diagram of the preliminary layout result of the macro unit in the embodiment of the present application.

[0070] Figure 5 Schematic diagram of the area assessment model in the embodiment of the present application.

[0071] Figure 6 Schematic diagram of a line length evaluation model in an embodiment of the present application.

[0072] Figure 7 Schematic diagram of the overlapping portion of the repair macro unit in an embodiment of the present application. DETAILED DESCRIPTION

[0073] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0074] It should be noted that the embodiments of the present application have better practicability and are not any form of limitation to the present application. The technical features or combinations of technical features described in the embodiments of the present application should not be considered to be isolated, and they can be combined with each other to achieve better technical effects. The scope of the preferred implementation of the present application may also include other implementations, and this should be understood by those skilled in the art of the present application embodiment.

[0075] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0076] In order to better describe the technical solution of the present application, the macro cell layout method of the present application is described below in combination with some prior art:

[0077] Today's integrated circuit design is highly dependent on EDA tools, and the degree of automation in chip design is getting higher and higher. However, the task of macrocell layout is still highly dependent on the experience of engineers. The macrocell layout process requires comprehensive consideration of multiple factors and multiple rounds of design iterations to obtain an ideal result, which usually takes a long time.

[0078] The size of macro cells is larger than that of standard cells, and can be thousands of times larger than that of standard cells. Because large-sized macro cells have a greater impact on the overall layout of the integrated circuit, in the integrated circuit design process, the layout of macro cells is usually completed first, and then the layout of standard cells is completed. After that, the macro cells and standard cells are wired to connect them.

[0079] Macrocell layout requires a series of constraints, for example, macrocells should be placed as close to the module boundary as possible, macrocells with close design levels should be placed closer, there should be a certain distance between macrocells, and macrocells should not overlap, etc. The current macrocell layout methods mainly focus on how to use appropriate data structures to describe macrocell layouts and how to use appropriate optimization algorithms to optimize macrocell layout results.

[0080] A commonly used scheme for describing macrocell layout is a data structure based on a binary tree. Each node in the binary tree corresponds to a macrocell, which can be used to describe the macrocell layout of the LB Compact structure, which refers to a compact layout scheme in which all macrocells cannot move further to the left and downward. This scheme can place the macrocell at the lower left corner of the module. In order to make full use of the module space, it is usually necessary to create four binary trees. The macrocell layout corresponding to each binary tree is placed in a corner of the module in a rotated or flipped form.

[0081] The embodiment of the present application provides a macrocell layout method for integrated circuit design, which can cluster the macrocells to be laid out into multiple clusters according to the standard cell information of the design level where the macrocells are located, and use a genetic algorithm to optimize the clustering results, and create multiple macrocell arrays in each cluster according to the characteristics of the macrocells. The results of the macrocell layout are optimized using a simulated annealing algorithm, and the congestion problem of the macrocell layout results is optimized using a greedy algorithm, and finally the overlapping parts of the macrocells are updated globally.

[0082] See also Figure 1 , Figure 1 Schematic diagram of a macro cell layout method for integrated circuit design in an embodiment of the present application.

[0083] like Figure 1 As shown, an embodiment of the present application provides a macro cell layout method for integrated circuit design, and the macro cell layout method includes the following steps:

[0084] Step S1, obtaining circuit netlist information and macro cell structure characteristics to be laid out.

[0085] In this embodiment, it should be noted that the circuit netlist information to be laid out includes the connection information of the macro unit, the design level information where the macro unit is located, and the standard unit information contained in each design level; the structural features of the macro unit include the size of the macro unit, the pin information of the macro unit, see Figure 2 , Figure 2 Schematic diagram of the structural features of the macro unit in the embodiment of the present application.

[0086] Step S2: clustering all macro cells according to the circuit netlist information based on the DBSCAN clustering algorithm to obtain multiple clusters. Specifically, S2 may include the following steps:

[0087] S21, calculate the distance metric between two macro units as:

[0088]

[0089] Among them, p represents two macro units m i and m j The number of standard cells in the common design hierarchy between them, n represents the number of all standard cells in the circuit netlist, Area k Represents the area of ​​a standard cell.

[0090] In this embodiment, it should be noted that in order to make the clustering result as reasonable as possible, the method adopted is to use the ratio of the sum of the areas of all standard cells in the common design hierarchy between the macro cells to the sum of the areas of all standard cells in the circuit netlist as the distance metric between the macro cells.

[0091] S22. Use the adaptive DBSCAN clustering algorithm parameters to generate a list of all eps parameters from 0 to 1 with a step size of 0.01, and generate a list of MinPts parameters from 1 to N, where N represents the number of all macro units.

[0092] In this embodiment, it should be noted that in order to implement an adaptive DBSCAN clustering algorithm without manually specifying parameters, an improved parameter acquisition method is adopted to achieve automatic parameter acquisition by generating parameter lists of eps and MinPts respectively.

[0093] S23. For all the parameter lists of eps and MinPts, combine them in pairs to generate parameter pair lists, generate a set of DBSCAN clustering results based on each set of parameter pair lists, and only retain the results with 4 clusters.

[0094] In this embodiment, it should be noted that in order to obtain reasonable clustering results, according to the generated eps and MinPts parameter lists, they are combined in groups of two to generate several groups of eps and MinPts parameter pair lists, and a DBSCAN clustering is implemented for each pair of parameter pair lists. In order to make full use of the space of the macro unit layout, 4 clusters are required. Therefore, among all the DBSCAN clustering results, only the results with 4 clusters are retained, which can improve the rationality of the macro unit layout.

[0095] S24, allocating the macro units that are not allocated to the cluster to a cluster with the closest average distance metric.

[0096] In this embodiment, it should be noted that, since outliers may be generated in the DBSCAN clustering results, and the macrocell layout scheme requires that all macrocells should belong to one cluster, it is necessary to assign macrocells that do not belong to any cluster after DBSCAN clustering to one cluster. The specific steps are: calculate the average value of the distance metric from the macrocell that is an outlier to the macrocells in each cluster, and divide the macrocell into the cluster with the smallest average distance metric; if there are multiple clusters with the smallest average distance metric, select the cluster with the least number of macrocells.

[0097] S25. Calculate the silhouette coefficient of each DBSCAN clustering result and sort them from high to low according to the silhouette coefficient. The silhouette coefficient is defined as:

[0098]

[0099] Where a(i) is the average distance metric from the i-th macrocell to other macrocells in the same cluster, and b(i) is the minimum value of the average distance metric from the i-th macrocell to all macrocells in other clusters.

[0100] In this embodiment, it should be noted that, since DBSCAN clustering may produce multiple results that meet the requirements, it is necessary to evaluate the quality of different results and rank them. A common method for evaluating the quality of clustering results is to use the Silhouette Coefficient, which does not rely on the true value, but evaluates the degree of intra-cluster aggregation and inter-cluster dispersion of the clustering results.

[0101] Step S3: Update the plurality of clusters based on a genetic algorithm. Specifically, Figure 3 As shown, S3 may include the following steps:

[0102] S31, performing gene encoding on the DBSCAN clustering results to generate chromosomes.

[0103] In this embodiment, it should be noted that, according to the clustering results of DBSCAN, each cluster is first sorted, and then each macro unit is sorted inside the cluster, and finally an ordered macro unit sequence is obtained, which is used as the gene code of the cluster.

[0104] S32. Each of the chromosomes is regarded as an individual, and multiple individuals constitute a population.

[0105] S33, expanding the number of individuals in the population to meet algorithm requirements.

[0106] In this embodiment, it should be noted that the clustering results of DBSCAN are usually too small to meet the requirements of the initialization population, which will cause the genetic algorithm to fall into a local optimum. The clustering results can be expanded by crossover and mutation until the population quantity requirements are met. For example, the expansion quantity is 100, and the expansion method can include crossover and mutation.

[0107] S34. Use the fitness function to evaluate the population. The fitness function is defined as:

[0108]

[0109] Among them, V σ represents the standard deviation coefficient, σ represents the standard deviation between areas, represents the average area, S represents the silhouette coefficient of the population, represents the average value of the standard deviation coefficient of the macrocell area within all clusters, V σB represents the standard deviation coefficient of the area between all clusters, α, β, γ and λ are coefficients, W represents the penalty term, Area luster It represents the sum of the areas of all macro units in a cluster, and n is the number of macro units.

[0110] In this embodiment, it should be noted that the fitness function is to fully consider multiple factors in the macro unit layout: the sum of the macro unit areas between different clusters should be as close as possible, which is conducive to full utilization of space; macro units of the same type should be given priority to be placed in the same cluster, which is conducive to reducing the area of ​​invalid areas; and the generation of a cluster with an area that is too large should be avoided.

[0111] S35. Use the roulette algorithm to select several individuals with high fitness function values ​​in each generation of the population. The probability of each individual being selected is proportional to its fitness function value. The probability is defined as:

[0112]

[0113] Where N represents the size of the population;

[0114] In this embodiment, it should be noted that in order to ensure that the best genes in each generation are retained, the probability of selecting the individual with the highest fitness is set to 1.

[0115] S36, using the crossover and mutation method to update the genes of the selected individuals with high fitness function values. Specifically, the following steps are included:

[0116] S361. Randomly select gene segments from the chromosomes of the selected parent individuals;

[0117] S362, exchanging the randomly selected gene segments of the two parent individuals to obtain updated chromosomes;

[0118] S363, performing conflict detection on the updated chromosome, updating the duplicated genes, and obtaining a secondary

[0119] Updated chromosomes;

[0120] S364: Randomly select a gene corresponding to a macro unit in the chromosome after the second update, and move it to

[0121] Move to another cluster and get three updated chromosomes;

[0122] S365. In the chromosome after the three updates, randomly select a gene corresponding to a macro unit in each of the two clusters, and then exchange their positions.

[0123] In this embodiment, it should be noted that crossover and mutation are methods of increasing population diversity in genetic algorithms to avoid chromosomes in a population being too close, which would lead to slow evolution.

[0124] S37. When the maximum number of iterations is reached, the genetic algorithm is terminated, and in the last generation of the population, the individual with the highest fitness function value is selected as the final macro-unit clustering result.

[0125] In this embodiment, it should be noted that after the genetic algorithm is completed, an optimized macro unit clustering result is obtained, and then the macro units in each cluster are laid out respectively.

[0126] Step S4: creating multiple macrocell arrays in the multiple clusters according to the macrocell structural features.

[0127] In this embodiment, it should be noted that when creating a macro cell array, the macro cells are grouped according to their characteristics to ensure that the macro cells of the same type are grouped in one group. If a group contains too many macro cells, it can be considered to split it, and the split group contains an appropriate number of macro cells. The macro cells in each group are laid out based on a binary tree data structure. After the layout is completed, the macro cells of a group are packed to generate a macro cell array.

[0128] Step S5, laying out the macro cell arrays in each of the clusters.

[0129] In this embodiment, it should be noted that after the macrocell array is generated by packing, each array is laid out again in each cluster. If the array is moved or rotated at this time, the position of the macrocell in the array will also change accordingly. After the array layout is completed, it is unpacked to determine the position of each macrocell.

[0130] Step S6: Layout each of the clusters to obtain a preliminary layout result.

[0131] See also Figure 4 , Figure 4 It is a schematic diagram of the preliminary layout result of the macro unit in the embodiment of the present application.

[0132] In this embodiment, it should be noted that after the four clusters complete the macrocell layout respectively, the layout results of different clusters are placed in the four corners of the module in turn according to the distance measurement between different clusters to obtain the preliminary layout results. The closer the distance measurement is, the closer their positions should be. The distance measurement between clusters is as follows:

[0133]

[0134] Among them, C1 and C2 represent two clusters, m i and m j Respectively represent the macro units located in C1 and C2, dist(m i ,m j ) represents the distance metric between two macro units.

[0135] Step S7: using the new area evaluation model and line length evaluation model in the objective function of the simulated annealing algorithm to update the preliminary layout result to obtain an updated layout result.

[0136] Among them, the objective function of the simulated annealing algorithm is defined as follows:

[0137]

[0138] Among them, α and β represent weight coefficients, which are usually 0.5 and can be set as needed. dead Represents the area of ​​the invalid region, WL represents the total line length, and max() represents the maximum value that occurs during multiple iterations.

[0139] In this embodiment, it should be noted that in the macrocell layout problem, area and line length are important optimization targets. Therefore, when designing the objective function, it is necessary to consider the influence of area and line length at the same time. The choice of objective function will directly affect the optimization effect of the algorithm. Since area and line length belong to different dimensions, normalization processing is required.

[0140] The area assessment model is defined as follows:

[0141]

[0142] Among them, Area total represents the total area, Indicates the area of ​​the macrocells that are not connected to other areas. std Represents the rectangular area available for standard cell layout, Area pena represents the area of ​​the penalty region, see Figure 5 , Figure 5 Schematic diagram of the area assessment model in the embodiment of the present application.

[0143] In this embodiment, it should be noted that the area evaluation model fully considers the common macro-unit layout structure in floorplanning, is closer to the actual situation, and increases the penalty area, which is defined as the sum of the areas of the parts between macro-units that are not connected to other areas, which is conducive to the algorithm to jump out of the local optimal solution.

[0144] The calculation steps of the line length assessment model are as follows:

[0145] Calculate the equivalent pin information of all macro cells, including location and bit width;

[0146] Create a polygon for standard cell layout;

[0147] Calculating the Manhattan distances from all macrocell equivalent pins to the polygon;

[0148] Compute the sum of all Manhattan distances.

[0149] In this embodiment, it should be noted that usually a macro unit has many pins inside. In order to simplify the calculation, equivalent input / output pins are created on each side of the macro unit. The position of the pin is the average coordinate of all the input / output pins on the side. At the same time, the equivalent pin contains the wire network width information. Create a polygon that is located outside the envelope rectangle containing all macro units. This polygon is used to simulate the area of ​​subsequent standard unit layout. Calculate the Manhattan distance from all equivalent pins in each macro unit to the nearest edge of the polygon. If there is an interconnection between the macro units, the Manhattan distance between the equivalent pins is also calculated. At the same time, the distance is adjusted according to the bit width of the equivalent pin. Calculate the sum of all distances and use it as the total line length of the macro unit layout problem, see Figure 6 , Figure 6 Schematic diagram of a line length evaluation model in an embodiment of the present application.

[0150] Step S8: using a greedy algorithm to update the updated layout result again to solve the congestion problem, specifically including:

[0151] S81, traversing all macro cells in the updated layout result;

[0152] S82, judging whether the distance between the traversed macro unit and the equivalent pins of other macro units is less than a threshold, that is, judging whether the distance between the equivalent pins of the macro units is too close, wherein the threshold is defined as:

[0153]

[0154] Width pins Indicates the equivalent pin width of the macro unit, pitch indicates the minimum line spacing of the metal layer where the pin is located, Num routing_layer Indicates the number of all available routing resources;

[0155] S83, determining whether the macro units belong to the same group of connection relationships;

[0156] S84: If the macro unit equivalent pin distance is less than a threshold value and does not belong to the same group of connection relationships, the traversed macro unit is updated by rotating or flipping.

[0157] In this embodiment, it should be noted that when the pins of two macro cells are too close and the two macro cells do not belong to the same group of connection relationships, it will lead to tight wiring resources in the area in the later wiring stage. Adjusting the direction of each macro cell based on the greedy algorithm can effectively solve the congestion problem in the macro cell layout.

[0158] Step S9: globally update the overlapping parts of the macro cells to obtain the final layout result.

[0159] See also Figure 7 , Figure 7 Schematic diagram of the overlapping portion of the repair macro unit in an embodiment of the present application.

[0160] In this embodiment, it should be noted that in the global macrocell layout, the layout results of each cluster are independent of each other, so the layout results of different clusters may overlap, especially when the number of macrocells is large or the size of the macrocells is large. In order to solve the problem of macrocell overlap, a penalty term is introduced in the objective function of the simulated annealing algorithm. First, the overlapping area, the overlapping macrocells and the clusters they are in are recorded, and then the penalty term is defined as follows:

[0161]

[0162] Area overlap Area is the common area between the new layout result and the recorded overlapping area. macro The area of ​​the recorded overlapping macro cells is re-placed based on the updated objective function. If the overlapping problem occurs again, this process needs to be repeated until a macro cell layout result without overlap is achieved.

[0163] The above description is only a description of the preferred embodiments of the present application, and is not intended to limit the scope of the present application. Any changes or modifications made by any person skilled in the art based on the above disclosed technical contents shall be deemed as equivalent effective embodiments and shall fall within the scope of protection of the technical solution of the present application.

Claims

1. A macrocell layout method for integrated circuit design, characterized in that: include: S1. Obtaining circuit netlist information and macrocell structural features to be laid out; S2, based on the DBSCAN clustering algorithm, cluster all macro cells according to the circuit netlist information to obtain multiple clusters; S3, updating multiple clusters based on genetic algorithm; S4, creating multiple macrocell arrays in multiple clusters according to macrocell structural features; S5, laying out the macro cell arrays in each cluster respectively; S6. Layout each cluster separately to obtain a preliminary layout result; S7, using the area evaluation model and the line length evaluation model in the objective function of the simulated annealing algorithm to update the preliminary layout result to obtain an updated layout result; S8, using a greedy algorithm to update the updated layout result again to solve the congestion problem; S9. Globally update the overlapping parts of the macro cells to obtain the final layout result.

2. The method according to claim 1, characterized in that In S1, the circuit netlist information and macrocell structural features include: All design level information in the circuit netlist, the number of standard cells in different design levels, the design level information where all macro cells are located, and the size and pin location information of all macro cells.

3. The method according to claim 1, characterized in that The S2 comprises the following steps: S21, calculate the distance metric between two macro units as: Among them, p represents two macro units m i and m j The number of standard cells in the common design hierarchy between them, n represents the number of all standard cells in the circuit netlist, Area k Represents the area of ​​a standard unit; S22, using the adaptive DBSCAN clustering algorithm parameters, generating a list of all eps parameters from 0 to 1 with a step size of 0.01, and generating a list of MinPts parameters from 1 to N, where N represents the number of all macro units; S23, for all eps and MinPts parameter lists, combine them in pairs to generate parameter pair lists, generate a set of DBSCAN clustering results based on each set of parameter pair lists, and only retain the results with 4 clusters; S24, assigning the macro units that are not assigned to the cluster to a cluster with the closest average distance metric; S25. Calculate the silhouette coefficient of each DBSCAN clustering result and sort them from high to low according to the silhouette coefficient. The silhouette coefficient is defined as: Among them, a(i) is the average distance metric from the i-th macrocell to other macrocells in the same cluster, and b(i) is the minimum value of the average distance metric from the i-th macrocell to all macrocells in other clusters.

4. The method according to claim 1, characterized in that The S3 comprises the following steps: S31, performing gene encoding on the DBSCAN clustering results to generate chromosomes; S32. Each chromosome is an individual, and multiple individuals constitute a population; S33, expand the number of individuals in the population; S34. Use the fitness function to evaluate the population. The fitness function is defined as: Among them, V σ represents the standard deviation coefficient, σ represents the standard deviation between areas, represents the average area, S represents the silhouette coefficient of the population, represents the average value of the standard deviation coefficient of the macrocell area within all clusters, V σB represents the standard deviation coefficient of the area between all clusters, α, β, γ and λ are coefficients, W represents the penalty term, Area cluster represents the sum of the areas of all macrocells in a cluster, and n is the number of macrocells; S35. Use the roulette algorithm to select several individuals with high fitness function values ​​in each generation of the population. The probability of each individual being selected is proportional to its fitness function value. The probability is defined as: Where N represents the size of the population; S36, using a crossover and mutation method to perform gene update on the selected individuals with high fitness function values; S37. When the maximum number of iterations is reached, the genetic algorithm is terminated, and in the last generation of the population, the individual with the highest fitness function value is selected as the final macro-unit clustering result.

5. The method as claimed in claim 3, characterized in that The S36 comprises the following steps: S361. Randomly select gene segments from the chromosomes of the selected parent individuals; S362, exchange randomly selected gene fragments of two parent individuals to obtain updated chromosomes; S363, performing conflict detection on the updated chromosome, updating the duplicated genes, and obtaining a second updated chromosome; S364, randomly select a gene corresponding to a macro unit in the chromosome after the second update, and move it to another cluster to obtain a chromosome after the third update; S365. In the chromosome after the three updates, randomly select a gene corresponding to a macro unit in each of the two clusters, and then exchange their positions.

6. The method according to claim 1, characterized in that In S7, the objective function of the simulated annealing algorithm is defined as follows: Among them, Area dead Represents the area of ​​the invalid region, WL represents the total line length, α and β represent weight coefficients, and max() represents the maximum value that occurs during multiple iterations.

7. The method as claimed in claim 6, characterized in that In S7, the area assessment model is defined as follows: Among them, Area total represents the total area, Indicates the area of ​​the macro unit, Area std Represents the rectangular area available for standard cell layout, Area pena Represents the area of ​​the penalty region.

8. The method as claimed in claim 6, characterized in that In S7, the calculation steps of the line length evaluation model are as follows: Calculate the equivalent pin information of all macro cells, including location and bit width; Create a polygon for standard cell layout; Calculating the Manhattan distances from all macrocell equivalent pins to the polygon; Compute the sum of all Manhattan distances.

9. The method according to claim 1, characterized in that The S8 comprises the following steps: S81, traversing all macro cells in the updated layout result; S82, determining whether the equivalent pin distance between the traversed macro unit and other macro units is less than a threshold; S83, determining whether the macro units belong to the same group of connection relationships; S84: If the macro unit equivalent pin distance is less than a threshold value and does not belong to the same group of connection relationships, the traversed macro unit is updated by rotating or flipping.

10. The method according to claim 1, characterized in that The S9 includes: introducing a penalty term into the objective function of the simulated annealing algorithm, first recording the overlapping areas, the overlapping macro units and the clusters where they are located, and then defining the penalty term as follows: Area overlap Area is the common area between the new layout result and the recorded overlapping area. macro The area of ​​the recorded overlapping macro cells is re-placed based on the updated objective function. If the overlapping problem occurs again, this process needs to be repeated until a macro cell layout result without overlap is achieved.

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