Tiling panels

Abstract

The application discloses a spliced panel, comprising at least two sub-display panels and a gate drive circuit; two adjacent sub-display panels are spliced in a first direction, the sub-display panel comprises a substrate and a conductive terminal arranged on the substrate, and the two adjacent sub-display panels are electrically connected through the conductive terminal; the gate drive circuit is arranged on the substrate of the sub-display panel, the gate drive circuit is electrically connected with the conductive terminal, a plurality of sub-display panels spliced in the first direction are driven by one gate drive circuit, and the gate drive circuit is located in an edge area of the spliced panel, wherein the first direction is the direction of the row of the spliced panel. The advantage is that the problem of low coherence of the display picture of the spliced panel can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a splicing panel. Background Technology

[0002] In traditional splicing panels, gate driving circuits are set on the edge area of ​​the substrate of the sub-display panels. When two adjacent sub-display panels are spliced ​​together, there is a gate driving circuit between the two adjacent sub-display panels, which results in a large black border in the splicing area between the two adjacent sub-display panels, causing the splicing panel to have poor continuity of the display image. Summary of the Invention

[0003] The embodiments of this application provide a splicing panel to improve the problem of low continuity of the displayed image on the splicing panel.

[0004] In a first aspect, embodiments of this application provide a splicing panel, comprising:

[0005] At least two sub-display panels, two adjacent sub-display panels are spliced ​​together in a first direction, each sub-display panel includes a substrate and conductive terminals disposed on the substrate, and two adjacent sub-display panels are electrically connected through the conductive terminals;

[0006] A gate driving circuit is electrically connected to the conductive terminal. Multiple sub-display panels spliced ​​along the first direction are driven by one gate driving circuit, and the gate driving circuit is located in the edge region of the splicing panel. The first direction is the direction of the rows of the splicing panel.

[0007] Furthermore, the sub-display panel includes:

[0008] First metal layer;

[0009] The gate drive circuit includes a first trace, and the first trace and the conductive terminal are located in the first metal layer.

[0010] Furthermore, the sub-display panel includes:

[0011] First metal layer;

[0012] A second metal layer is located on the side of the first metal layer away from the substrate;

[0013] The gate drive circuit includes a second trace located in the first metal layer, and the conductive terminal located in the second metal layer. The conductive terminal is electrically connected to the second trace through a first via penetrating between the second metal layer and the first metal layer.

[0014] Furthermore, the sub-display panel includes:

[0015] First metal layer;

[0016] A second metal layer is located on the side of the first metal layer away from the substrate;

[0017] A third metal layer is located on the side of the second metal layer away from the substrate;

[0018] The gate drive circuit includes a third trace located in the first metal layer. The conductive terminal is located in the third metal layer and is electrically connected to the third trace through a second via and a third via passing through the third metal layer and the first metal layer.

[0019] Furthermore, the sub-display panel includes:

[0020] First metal layer;

[0021] A second metal layer is located on the side of the first metal layer away from the substrate;

[0022] A third metal layer is located on the side of the second metal layer away from the substrate;

[0023] A fourth metal layer is located on the side of the third metal layer away from the substrate.

[0024] The gate drive circuit includes a fourth trace located in the first metal layer. The conductive terminal is located in the fourth metal layer and is electrically connected to the fourth trace through a fourth via, a fifth via, and a sixth via that pass through the fourth metal layer and the first metal layer.

[0025] Furthermore, the splicing panel also includes connecting lines, which are electrically connected to two adjacent conductive terminals on two adjacent sub-display panels.

[0026] Furthermore, the splicing panel also includes a light-emitting device, an encapsulating adhesive layer, and a cover plate. The light-emitting device is disposed on the substrate, the encapsulating adhesive layer covers the light-emitting device, and the cover plate is disposed on the surface of the substrate away from the encapsulating adhesive layer. The connecting line is disposed on the surface of the cover plate close to the substrate. In a top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on two adjacent sub-display panels.

[0027] Furthermore, the thickness of the connecting wire is greater than the thickness of the encapsulating adhesive layer.

[0028] The further cover plate has a boss extending toward the conductive terminal, wherein the connecting line is disposed on the surface of the boss on the side close to the substrate, and the thickness of the boss is greater than the thickness of the encapsulating adhesive layer.

[0029] Secondly, embodiments of this application provide a splicing panel, including:

[0030] At least three sub-display panels, with two adjacent sub-display panels spliced ​​together in a first direction, each sub-display panel including a substrate and conductive terminals disposed on the substrate, and two adjacent sub-display panels being electrically connected through the conductive terminals;

[0031] A gate driving circuit is electrically connected to the conductive terminal. Multiple sub-display panels spliced ​​along the first direction are driven by two gate driving circuits. One gate driving circuit is located on the edge region of one side of the splicing panel, and the other gate driving circuit is located on the edge region of the other side of the splicing panel. The two gate driving circuits are spaced apart. The first direction is the direction of the rows of the splicing panel.

[0032] The beneficial effects of this application are:

[0033] This application provides a splicing panel, in which the sub-display panels include a substrate and conductive terminals disposed on the substrate, and two adjacent sub-display panels are electrically connected through the conductive terminals; a gate driving circuit is electrically connected to the conductive terminals, and multiple sub-display panels spliced ​​along a first direction are driven by one gate driving circuit, and the gate driving circuit is located in the edge region of the splicing panel; compared with the conventional solution, the gate driving circuit between two adjacent sub-display panels of the splicing panel is eliminated, the black border width of the splicing area between two adjacent sub-display panels of the splicing panel is reduced, thereby improving the continuity of the display image of the splicing panel.

[0034] This application provides a splicing panel. The sub-display panels include a substrate and conductive terminals disposed on the substrate. Adjacent sub-display panels are electrically connected through the conductive terminals. A gate driving circuit is electrically connected to the conductive terminals. Multiple sub-display panels spliced ​​along a first direction are driven by two gate driving circuits. One gate driving circuit is located on one edge region of the splicing panel, and the other gate driving circuit is located on the other edge region of the splicing panel, with the two gate driving circuits spaced apart. Compared to conventional solutions, this eliminates the gate driving circuit between adjacent sub-display panels, reducing the black border width of the splicing area between adjacent sub-display panels, thereby improving the continuity of the displayed image on the splicing panel. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of a traditional splicing panel;

[0036] Figure 2 This is a schematic diagram of the splicing panel according to the first embodiment of this application;

[0037] Figure 3 yes Figure 2 A cross-sectional view of the first structure at position A of the splicing panel;

[0038] Figure 4 yes Figure 2 A cross-sectional view of the second structure at position A of the splicing panel;

[0039] Figure 5 yes Figure 2 A cross-sectional view of position B corresponding to the splicing panel when it is located in the first metal layer;

[0040] Figure 6 yes Figure 2 A cross-sectional view of position B corresponding to the splicing panel when it is located in the second metal layer;

[0041] Figure 7 yes Figure 2 A cross-sectional view of position B corresponding to the splicing panel when it is located in the third metal layer;

[0042] Figure 8 yes Figure 2 A cross-sectional view of position B corresponding to the splicing panel when it is located in the fourth metal layer;

[0043] Figure 9 This is a schematic diagram of the splicing panel according to the second embodiment of this application;

[0044] Figure 10 This is a schematic diagram of the cover plate of the splicing panel of this application.

[0045] 100 - Sub-display panel; 110 - Substrate; 120 - Conductive terminal; 130 - First metal layer; 131 - First trace; 132 - Second trace; 133 - Third trace; 134 - Fourth trace; 140 - Second metal layer; 150 - Third metal layer; 160 - Fourth metal layer; 171 - First via; 172 - Second via; 173 - Third via; 174 - Fourth via; 175 - Fifth via; 176 - Sixth via; 180 - Connecting line; 191 - First insulating layer; 192 - Second insulating layer; 193 - First organic planarization layer; 194 - First passivation layer; 195 - Second organic planarization layer; 196 - Second passivation layer; 200 - Gate driving circuit; 300 - Light-emitting device; 400 - Encapsulating adhesive layer; 500 - Cover plate; 510 - Boss.

[0046] 10 - Sub-display panel; 20 - Gate drive circuit. Detailed Implementation

[0047] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings. The technical solutions described below are for illustrative purposes only and should not be construed as limiting the scope of protection of this application.

[0048] Furthermore, the terms "first," "second," and similar words do not indicate any order, quantity, or importance, but are merely used to distinguish different technical features. The terms "multiple" and similar words indicate two or more unless otherwise expressly specified.

[0049] refer to Figure 1 In traditional splicing panels, a gate driving circuit 20 is provided on the edge area of ​​the substrate of the sub-display panel 10. When two adjacent sub-display panels 10 are spliced ​​together, there is a gate driving circuit 20 between the two adjacent sub-display panels 10, which results in a large black border in the splicing area between the two adjacent sub-display panels 10, causing the splicing panel to have poor continuity of the display image.

[0050] The first embodiment of this application provides a first type of splicing panel, see reference. Figure 2The splicing panel includes at least two sub-display panels 100 and a gate driving circuit 200; two adjacent sub-display panels 100 are spliced ​​in a first direction L. Each sub-display panel 100 includes a substrate 110 and conductive terminals 120 disposed on the substrate 110. Two adjacent sub-display panels 100 are electrically connected through the conductive terminals 120. The gate driving circuit 200 is electrically connected to the conductive terminals 120. Multiple sub-display panels 100 spliced ​​along the first direction L are driven by a gate driving circuit 200, and the gate driving circuit 200 is located in the edge region of the splicing panel. The first direction L is the direction of the row of the splicing panel.

[0051] By configuring the sub-display panel 100 to include a substrate 110 and conductive terminals 120 disposed on the substrate 110, two adjacent sub-display panels 100 are electrically connected through the conductive terminals 120; the gate driving circuit 200 is electrically connected to the conductive terminals 120, and multiple sub-display panels 100 spliced ​​along the first direction L are driven by a gate driving circuit 200, and the gate driving circuit 200 is located in the edge area of ​​the splicing panel; compared with the traditional solution, the gate driving circuit 200 between two adjacent sub-display panels 100 of the splicing panel is eliminated, the black border width of the splicing area between two adjacent sub-display panels 100 of the splicing panel is reduced, thereby improving the continuity of the display screen of the splicing panel.

[0052] In this embodiment, the conductive terminal 120 is made of indium tin oxide.

[0053] In this embodiment, reference Figure 3 The splicing panel also includes a connecting line 180, which is electrically connected to two adjacent conductive terminals 120 on two adjacent sub-display panels 100. The splicing panel also includes a connecting line 180, which is electrically connected to two adjacent conductive terminals 120 on two adjacent sub-display panels 100.

[0054] In this embodiment, reference Figure 5 The sub-display panel 100 includes a first metal layer 130, and the gate driving circuit 200 includes a first trace 131. The first trace 131 and the conductive terminal 120 are located on the first metal layer 130. By setting the sub-display panel 100 to include the first metal layer 130 and the gate driving circuit 200 to include the first trace 131, with the first trace 131 and the conductive terminal 120 located on the first metal layer 130, it is not necessary to use vias to electrically connect the conductive terminal 120 and the first trace 131. This minimizes the path length of signal transmission between the conductive terminal 120 and the first trace 131, thereby reducing the impedance of signal transmission between adjacent sub-display panels 100 and improving the stability of signal transmission in the gate driving circuit 200.

[0055] In this embodiment, the sub-display panel 100 includes a thin-film transistor, the thin-film transistor including a gate, wherein the gate is located in a first metal layer.

[0056] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the first trace 131, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the first trace 131, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0057] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0058] In this embodiment, reference Figure 6 The sub-display panel 100 includes a first metal layer 130 and a second metal layer 140, with the second metal layer 140 located on the side of the first metal layer 130 away from the substrate 110; the gate drive circuit 200 includes a second trace 132 located on the first metal layer 130, and a conductive terminal 120 located on the second metal layer 140. The conductive terminal 120 is electrically connected to the second trace 132 through a first via 171 passing through the second metal layer 140 and the first metal layer 130. By setting the gate drive circuit 200 to include a second trace 132 located in the first metal layer 130 and a conductive terminal 120 located in the second metal layer 140, and the conductive terminal 120 electrically connected to the second trace 132 through a first via 171 passing through the second metal layer 140 and the first metal layer 130, the film layer between the conductive terminal 120 and the first metal layer 130 is preserved, reducing the difficulty of manufacturing the sub-display panel 100. On the other hand, it can avoid the signal transmission stability of the gate drive circuit 200 being reduced due to excessive resistance between the conductive terminal 120 and the second trace 132.

[0059] In this embodiment, the sub-display panel 100 includes a thin-film transistor, which includes a gate, a source, and a drain. The gate is located in a first metal layer, and the source and drain are located in a second metal layer 140.

[0060] In this embodiment, the thickness of the conductive terminal 120 is less than the thickness of the second metal layer 140.

[0061] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the second trace 132, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the second trace 132, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0062] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0063] In this embodiment, reference Figure 7 The sub-display panel 100 includes a first metal layer 130, a second metal layer 140, and a third metal layer 150. The second metal layer 140 is located on the side of the first metal layer 130 away from the substrate 110. The third metal layer 150 is located on the side of the second metal layer 140 away from the substrate 110. The gate drive circuit 200 includes a third trace 133 located on the first metal layer 130. A conductive terminal 120 is located on the third metal layer 150. The conductive terminal 120 is electrically connected to the third trace 133 through a second via 172 and a third via 173 passing through the third metal layer 150 and the first metal layer 130. By setting the conductive terminal 120 to be located in the third metal layer 150, and electrically connecting the conductive terminal 120 to the third trace 133 through the second via 172 and the third via 173 passing through the third metal layer 150 and the first metal layer 130, the length of the signal transmission path between the conductive terminal 120 and the third trace 133 is reduced, thereby reducing the impedance of signal transmission between two adjacent sub-display panels 100, thereby improving the stability of signal transmission in the gate drive circuit 200.

[0064] In this embodiment, the thickness of the conductive terminal 120 is less than the thickness of the third metal layer 150.

[0065] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the third trace 133, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the third trace, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0066] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0067] In this embodiment, reference Figure 8 The sub-display panel 100 includes a first metal layer 130, a second metal layer 140, a third metal layer 150, and a fourth metal layer 160; the second metal layer 140 is located on the side of the first metal layer 130 away from the substrate 110; the third metal layer 150 is located on the side of the second metal layer 140 away from the substrate 110; and the fourth metal layer 160 is located on the side of the third metal layer 150 away from the substrate 110. The gate drive circuit 200 includes a fourth trace 134 located on the first metal layer 130, and a conductive terminal 120 located on the fourth metal layer 160. The conductive terminal 120 is electrically connected to the fourth trace 134 through a fourth via 174, a fifth via 175, and a sixth via 176 passing through the fourth metal layer 160 and the first metal layer 130. By configuring the gate drive circuit 200 to include a fourth trace 134 located in the first metal layer 130, and a conductive terminal 120 located in the fourth metal layer 160, the conductive terminal 120 is electrically connected to the fourth trace 134 through a fourth via 174, a fifth via 175, and a sixth via 176 passing through the fourth metal layer 160 and the first metal layer 130, the fabrication of the sub-display panel 100 does not require the removal of the film layer between the conductive terminal 120 and the first metal layer 130, thereby reducing the complexity of the manufacturing process of the sub-display panel 100.

[0068] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the fourth trace 134, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the fourth trace 134, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0069] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0070] In this embodiment, reference Figures 5-8The sub-display panel 100 further includes a first insulating layer 191, a second insulating layer 192, a first organic planarization layer 193, a first passivation layer 194, a second organic planarization layer 195, and a second passivation layer 196. The first insulating layer 191 covers the gate insulating layer, the second insulating layer 192 is located on the surface of the first insulating layer 191 away from the substrate 110, the first organic planarization layer 193 covers the second metal layer 140, the first passivation layer 194 is located on the surface of the first organic planarization layer 193 away from the substrate 110, the second organic planarization layer 195 covers the third metal layer 150, and the second passivation layer 196 is located on the surface of the second organic planarization layer 195 away from the substrate 110.

[0071] In this embodiment, reference Figures 5-8 The conductive terminals 120 of two adjacent sub-display panels 100 are on the same layer. Since the conductive terminals 120 can be located on the first metal layer 130, the second metal layer 140, or the third metal layer 150, when the conductive terminals 120 of two adjacent sub-display panels 100 are not on different layers, the connecting line 180 is difficult to directly connect to the conductive terminals 120 of the adjacent sub-display panels 100, increasing the difficulty of splicing the sub-display panels 100 of the splicing panel. Therefore, by setting the conductive terminals 120 of two adjacent sub-display panels 100 to be on the same layer, there is no need to additionally set the structure of the connecting line 180 to match the conductive terminals 120 of the two adjacent sub-display panels 100 in the thickness direction of the splicing panel, thereby reducing the splicing difficulty of the sub-display panels 100 of the splicing panel.

[0072] In this embodiment, reference Figure 3 , Figure 10 The splicing panel also includes a light-emitting device 300, an encapsulating adhesive layer 400, and a cover plate 500. The light-emitting device 300 is disposed on the substrate 110, the encapsulating adhesive layer 400 covers the light-emitting device 300, and the cover plate 500 is disposed on the surface of the substrate 110 away from the encapsulating adhesive layer 400. A connecting line 180 is disposed on the surface of the cover plate 500 close to the substrate 110. In the top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on the two adjacent sub-display panels. The splicing panel also includes an encapsulating adhesive layer 400 and a cover plate 500. The encapsulating adhesive layer 400 covers the light-emitting device 300, and the cover plate 500 is disposed on the surface of the substrate 110 away from the encapsulating adhesive layer 400. The connecting line 180 is disposed on the surface of the cover plate 500 close to the substrate 110. In the top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on two adjacent sub-display panels, which can increase the stability of the connection of the sub-display panels 100 of the splicing panel and ensure that the driving signal of the gate driving circuit 200 can be transmitted more stably to the multiple sub-display panels 100 in the first direction L.

[0073] In this embodiment, the thickness of the connecting line 180 is greater than the thickness of the encapsulating adhesive layer 400. By setting the thickness of the connecting line 180 to be greater than the thickness of the encapsulating adhesive layer 400, the connecting line 180 can contact the conductive terminal 120 before the cover plate 500 during the fabrication of the splicing panel, thereby ensuring a more stable electrical connection between the connecting line 180 and the terminals of the two sub-display panels 100.

[0074] In this embodiment, reference Figure 4 , Figure 10 The cover plate 500 has a protrusion 510 extending towards the conductive terminal 120. A connecting line 180 is disposed on the surface of the protrusion 510 near the substrate 110, and the thickness of the protrusion 510 is greater than the thickness of the encapsulating adhesive layer 400. By providing a protrusion 510 extending towards the conductive terminal 120 on the cover plate 500, with the connecting line 180 disposed on the surface of the protrusion 510 near the substrate 110 and the thickness of the protrusion 510 greater than the thickness of the encapsulating adhesive layer 400, during the fabrication of the splicing panel, the connecting line 180 on the protrusion 510 can contact the conductive terminal 120 before the cover plate 500, thereby ensuring a more stable electrical connection between the connecting line 180 and the terminals of the two sub-display panels 100; and it can reduce the thickness of the connecting line 180, thereby avoiding excessive stress on the connecting line 180 that could lead to breakage.

[0075] In this embodiment, the conductive terminal 120 is located on the side of the substrate 110 away from the light-emitting surface of the splicing panel. By setting the conductive terminal 120 to the side of the substrate 110 away from the light-emitting surface of the splicing panel, the material of the conductive terminal 120 does not need to be transparent indium tin oxide, thereby improving the substitutability of the material of the conductive terminal 120.

[0076] Secondly, embodiments of this application provide a second type of splicing panel, as referenced. Figure 9 The second embodiment is similar to the first embodiment. The difference between the second embodiment and the first embodiment is that at least three sub-display panels 100 spliced ​​along the first direction L are driven by two gate driving circuits 200. One gate driving circuit 200 is located in the edge region of one side of the splicing panel, and the other gate driving circuit 200 is located in the edge region of the other side of the splicing panel. The two gate driving circuits 200 are spaced apart. The first direction L is the direction of the rows of the splicing panel.

[0077] By configuring a sub-display panel 100 including a substrate 110 and conductive terminals 120 disposed on the substrate 110, two adjacent sub-display panels 100 are electrically connected through the conductive terminals 120; a gate driving circuit 200 is electrically connected to the conductive terminals 120, and multiple sub-display panels 100 spliced ​​along the first direction L are driven by two gate driving circuits 200, one of which is located in the edge region of one side of the splicing panel, and the other is located in the edge region of the other side of the splicing panel, and the two gate driving circuits 200 are spaced apart; compared with the traditional solution, the adjacent splicing panels are eliminated. The gate driving circuit 200 between the two sub-display panels 100 reduces the black border width of the splicing area between two adjacent sub-display panels 100 of the splicing panel, thereby improving the continuity of the display image of the splicing panel. At the same time, since multiple sub-display panels 100 spliced ​​along the first direction L are driven by two gate driving circuits 200, the number of gate driving circuits 200 is increased. On the one hand, this can improve the driving efficiency of the splicing panel, and on the other hand, it can avoid the situation where the display panel far from the gate driving circuit 200 will have abnormal driving due to the excessive number of sub-display panels 100 in the first direction L of the splicing panel.

[0078] In this embodiment, two gate driving circuits 200 that drive multiple sub-display panels 100 are arranged opposite to each other.

[0079] In this embodiment, the conductive terminal 120 is made of indium tin oxide.

[0080] In this embodiment, reference Figure 3 The splicing panel also includes a connecting line 180, which is electrically connected to two adjacent conductive terminals 120 on two adjacent sub-display panels 100. The splicing panel also includes a connecting line 180, which is electrically connected to two adjacent conductive terminals 120 on two adjacent sub-display panels 100.

[0081] In this embodiment, reference Figure 5 The sub-display panel 100 includes a first metal layer 130, and the gate driving circuit 200 includes a first trace 131. The first trace 131 and the conductive terminal 120 are located on the first metal layer 130. By setting the sub-display panel 100 to include the first metal layer 130 and the gate driving circuit 200 to include the first trace 131, with the first trace 131 and the conductive terminal 120 located on the first metal layer 130, it is not necessary to use vias to electrically connect the conductive terminal 120 and the first trace 131. This minimizes the path length of signal transmission between the conductive terminal 120 and the first trace 131, thereby reducing the impedance of signal transmission between adjacent sub-display panels 100 and improving the stability of signal transmission in the gate driving circuit 200.

[0082] In this embodiment, the sub-display panel 100 includes a thin-film transistor, the thin-film transistor including a gate, wherein the gate is located in a first metal layer.

[0083] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the first trace 131, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the first trace 131, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0084] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0085] In this embodiment, reference Figure 6 The sub-display panel 100 includes a first metal layer 130 and a second metal layer 140, with the second metal layer 140 located on the side of the first metal layer 130 away from the substrate 110; the gate drive circuit 200 includes a second trace 132 located on the first metal layer 130, and a conductive terminal 120 located on the second metal layer 140. The conductive terminal 120 is electrically connected to the second trace 132 through a first via 171 passing through the second metal layer 140 and the first metal layer 130. By setting the gate drive circuit 200 to include a second trace 132 located in the first metal layer 130 and a conductive terminal 120 located in the second metal layer 140, and the conductive terminal 120 electrically connected to the second trace 132 through a first via 171 passing through the second metal layer 140 and the first metal layer 130, the film layer between the conductive terminal 120 and the first metal layer 130 is preserved, reducing the difficulty of manufacturing the sub-display panel 100. On the other hand, it can avoid the signal transmission stability of the gate drive circuit 200 being reduced due to excessive resistance between the conductive terminal 120 and the second trace 132.

[0086] In this embodiment, the sub-display panel 100 includes a thin-film transistor, which includes a gate, a source, and a drain. The gate is located in a first metal layer, and the source and drain are located in a second metal layer 140.

[0087] In this embodiment, the thickness of the conductive terminal 120 is less than the thickness of the second metal layer 140.

[0088] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the second trace 132, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the second trace 132, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0089] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0090] In this embodiment, reference Figure 7 The sub-display panel 100 includes a first metal layer 130, a second metal layer 140, and a third metal layer 150. The second metal layer 140 is located on the side of the first metal layer 130 away from the substrate 110. The third metal layer 150 is located on the side of the second metal layer 140 away from the substrate 110. The gate drive circuit 200 includes a third trace 133 located on the first metal layer 130. A conductive terminal 120 is located on the third metal layer 150. The conductive terminal 120 is electrically connected to the third trace 133 through a second via 172 and a third via 173 passing through the third metal layer 150 and the first metal layer 130. By setting the conductive terminal 120 to be located in the third metal layer 150, and electrically connecting the conductive terminal 120 to the third trace 133 through the second via 172 and the third via 173 passing through the third metal layer 150 and the first metal layer 130, the length of the signal transmission path between the conductive terminal 120 and the third trace 133 is reduced, thereby reducing the impedance of signal transmission between two adjacent sub-display panels 100, thereby improving the stability of signal transmission in the gate drive circuit 200.

[0091] In this embodiment, the thickness of the conductive terminal 120 is less than the thickness of the third metal layer 150.

[0092] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the third trace 133, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the third trace, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0093] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0094] In this embodiment, reference Figure 8 The sub-display panel 100 includes a first metal layer 130, a second metal layer 140, a third metal layer 150, and a fourth metal layer 160; the second metal layer 140 is located on the side of the first metal layer 130 away from the substrate 110; the third metal layer 150 is located on the side of the second metal layer 140 away from the substrate 110; and the fourth metal layer 160 is located on the side of the third metal layer 150 away from the substrate 110. The gate drive circuit 200 includes a fourth trace 134 located on the first metal layer 130, and a conductive terminal 120 located on the fourth metal layer 160. The conductive terminal 120 is electrically connected to the fourth trace 134 through a fourth via 174, a fifth via 175, and a sixth via 176 passing through the fourth metal layer 160 and the first metal layer 130. By configuring the gate drive circuit 200 to include a fourth trace 134 located in the first metal layer 130, and a conductive terminal 120 located in the fourth metal layer 160, the conductive terminal 120 is electrically connected to the fourth trace 134 through a fourth via 174, a fifth via 175, and a sixth via 176 passing through the fourth metal layer 160 and the first metal layer 130, the fabrication of the sub-display panel 100 does not require the removal of the film layer between the conductive terminal 120 and the first metal layer 130, thereby reducing the complexity of the manufacturing process of the sub-display panel 100.

[0095] In this embodiment, in the top view of the splicing panel, the width of the conductive terminal 120 is greater than the width of the fourth trace 134, wherein the width direction of the conductive terminal 120 is the same as the second direction M of the splicing panel. By setting the width of the conductive terminal 120 to be greater than the width of the fourth trace 134, on the one hand, the contact area between the conductive terminal 120 and the connecting line 180 is increased, thereby improving the stability of the connection between the conductive terminal 120 and the connecting line 180; on the other hand, the cross-sectional area of ​​the conductive terminal 120 is increased, thereby reducing the impedance of the conductive terminal 120.

[0096] In this embodiment, the width of the conductive terminal 120 is 10μm to 15μm. Preferably, the width of the conductive terminal 120 is 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0097] In this embodiment, reference Figures 5-8The sub-display panel 100 further includes a first insulating layer 191, a second insulating layer 192, a first organic planarization layer 193, a first passivation layer 194, a second organic planarization layer 195, and a second passivation layer 196. The first insulating layer 191 covers the gate insulating layer, the second insulating layer 192 is located on the surface of the first insulating layer 191 away from the substrate 110, the first organic planarization layer 193 covers the second metal layer 140, the first passivation layer 194 is located on the surface of the first organic planarization layer 193 away from the substrate 110, the second organic planarization layer 195 covers the third metal layer 150, and the second passivation layer 196 is located on the surface of the second organic planarization layer 195 away from the substrate 110.

[0098] In this embodiment, reference Figures 5-8 The conductive terminals 120 of two adjacent sub-display panels 100 are on the same layer. Since the conductive terminals 120 can be located on the first metal layer 130, the second metal layer 140, or the third metal layer 150, when the conductive terminals 120 of two adjacent sub-display panels 100 are not on different layers, the connecting line 180 is difficult to directly connect to the conductive terminals 120 of the adjacent sub-display panels 100, increasing the difficulty of splicing the sub-display panels 100 of the splicing panel. Therefore, by setting the conductive terminals 120 of two adjacent sub-display panels 100 to be on the same layer, there is no need to additionally set the structure of the connecting line 180 to match the conductive terminals 120 of the two adjacent sub-display panels 100 in the thickness direction of the splicing panel, thereby reducing the splicing difficulty of the sub-display panels 100 of the splicing panel.

[0099] In this embodiment, reference Figure 3 , Figure 10 The splicing panel also includes a light-emitting device 300, an encapsulating adhesive layer 400, and a cover plate 500. The light-emitting device 300 is disposed on the substrate 110, the encapsulating adhesive layer 400 covers the light-emitting device 300, and the cover plate 500 is disposed on the surface of the substrate 110 away from the encapsulating adhesive layer 400. A connecting line 180 is disposed on the surface of the cover plate 500 close to the substrate 110. In the top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on the two adjacent sub-display panels. The splicing panel also includes an encapsulating adhesive layer 400 and a cover plate 500. The encapsulating adhesive layer 400 covers the light-emitting device 300, and the cover plate 500 is disposed on the surface of the substrate 110 away from the encapsulating adhesive layer 400. The connecting line 180 is disposed on the surface of the cover plate 500 close to the substrate 110. In the top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on two adjacent sub-display panels, which can increase the stability of the connection of the sub-display panels 100 of the splicing panel and ensure that the driving signal of the gate driving circuit 200 can be transmitted more stably to the multiple sub-display panels 100 in the first direction L.

[0100] In this embodiment, the thickness of the connecting line 180 is greater than the thickness of the encapsulating adhesive layer 400. By setting the thickness of the connecting line 180 to be greater than the thickness of the encapsulating adhesive layer 400, the connecting line 180 can contact the conductive terminal 120 before the cover plate 500 during the fabrication of the splicing panel, thereby ensuring a more stable electrical connection between the connecting line 180 and the terminals of the two sub-display panels 100.

[0101] In this embodiment, reference Figure 4 , Figure 10 The cover plate 500 has a protrusion 510 extending towards the conductive terminal 120. A connecting line 180 is disposed on the surface of the protrusion 510 near the substrate 110, and the thickness of the protrusion 510 is greater than the thickness of the encapsulating adhesive layer 400. By providing a protrusion 510 extending towards the conductive terminal 120 on the cover plate 500, with the connecting line 180 disposed on the surface of the protrusion 510 near the substrate 110 and the thickness of the protrusion 510 greater than the thickness of the encapsulating adhesive layer 400, during the fabrication of the splicing panel, the connecting line 180 on the protrusion 510 can contact the conductive terminal 120 before the cover plate 500, thereby ensuring a more stable electrical connection between the connecting line 180 and the terminals of the two sub-display panels 100; and it can reduce the thickness of the connecting line 180, thereby avoiding excessive stress on the connecting line 180 that could lead to breakage.

[0102] In this embodiment, the conductive terminal 120 is located on the side of the substrate 110 away from the light-emitting surface of the splicing panel. By setting the conductive terminal 120 to the side of the substrate 110 away from the light-emitting surface of the splicing panel, the material of the conductive terminal 120 does not need to be transparent indium tin oxide, thereby improving the substitutability of the material of the conductive terminal 120.

[0103] The specific embodiments of this application have been described in detail above. The embodiments disclosed above are merely preferred embodiments of this application. Those skilled in the art can make many modifications and improvements without departing from the concept of this application. All such modifications and improvements fall within the scope of protection defined by the claims of this application.

Claims

1. A splicing panel, characterized in that, include: At least two sub-display panels, two adjacent sub-display panels are spliced ​​together in a first direction, each sub-display panel includes a substrate and conductive terminals disposed on the substrate, and two adjacent sub-display panels are electrically connected through the conductive terminals; A gate driving circuit is electrically connected to the conductive terminal. Multiple sub-display panels spliced ​​along the first direction are driven by one gate driving circuit, and the gate driving circuit is located in the edge region of the splicing panel. The first direction is the direction of the row of the splicing panel. The splicing panel also includes a cover plate and connecting lines. The cover plate is disposed on the light-emitting side of the splicing panel, and the connecting lines are disposed on the surface of the cover plate near the substrate. The connecting lines are electrically connected to two adjacent conductive terminals on two adjacent sub-display panels. The conductive terminal is located on a surface of the substrate near the light-emitting side.

2. The splicing panel according to claim 1, characterized in that, The sub-display panel includes: First metal layer; The gate drive circuit includes a first trace, and the first trace and the conductive terminal are located in the first metal layer.

3. The splicing panel according to claim 1, characterized in that, The sub-display panel includes: First metal layer; A second metal layer is located on the side of the first metal layer away from the substrate; The gate drive circuit includes a second trace located in the first metal layer, and the conductive terminal located in the second metal layer. The conductive terminal is electrically connected to the second trace through a first via penetrating between the second metal layer and the first metal layer.

4. The splicing panel according to claim 1, characterized in that, The sub-display panel includes: First metal layer; A second metal layer is located on the side of the first metal layer away from the substrate; A third metal layer is located on the side of the second metal layer away from the substrate; The gate drive circuit includes a third trace located in the first metal layer. The conductive terminal is located in the third metal layer and is electrically connected to the third trace through a second via and a third via passing through the third metal layer and the first metal layer.

5. The splicing panel according to claim 1, characterized in that, The sub-display panel includes: First metal layer; A second metal layer is located on the side of the first metal layer away from the substrate; A third metal layer is located on the side of the second metal layer away from the substrate; A fourth metal layer, the fourth metal layer being located on the side of the third metal layer away from the substrate; The gate drive circuit includes a fourth trace located in the first metal layer. The conductive terminal is located in the fourth metal layer and is electrically connected to the fourth trace through a fourth via, a fifth via, and a sixth via that pass through the fourth metal layer and the first metal layer.

6. The splicing panel according to claim 1, characterized in that, The splicing panel further includes a light-emitting device and an encapsulating adhesive layer. The light-emitting device is disposed on the substrate, and the encapsulating adhesive layer covers the light-emitting device. The cover plate is disposed on the surface of the substrate away from the encapsulating adhesive layer. In a top view of the splicing panel, the connecting line at least partially overlaps with two adjacent conductive terminals on two adjacent sub-display panels.

7. The splicing panel according to claim 6, characterized in that, The thickness of the connecting line is greater than the thickness of the encapsulating adhesive layer.

8. The splicing panel according to claim 6, characterized in that, The cover plate has a boss extending toward the conductive terminal, wherein the connecting line is disposed on the surface of the boss on the side close to the substrate, and the thickness of the boss is greater than the thickness of the encapsulating adhesive layer.

9. A splicing panel, characterized in that, include: At least three sub-display panels, with two adjacent sub-display panels spliced ​​together in a first direction, each sub-display panel including a substrate and conductive terminals disposed on the substrate, and two adjacent sub-display panels being electrically connected through the conductive terminals; A gate driving circuit is electrically connected to the conductive terminal. Multiple sub-display panels spliced ​​along the first direction are driven by two gate driving circuits. One gate driving circuit is located in the edge region of one side of the splicing panel, and the other gate driving circuit is located in the edge region of the other side of the splicing panel. The two gate driving circuits are spaced apart. The first direction is the direction of the rows of the splicing panel. The splicing panel also includes a cover plate and connecting lines. The cover plate is disposed on the light-emitting side of the splicing panel, and the connecting lines are disposed on the surface of the cover plate near the substrate. The connecting lines are electrically connected to two adjacent conductive terminals on two adjacent sub-display panels. The conductive terminal is located on a surface of the substrate near the light-emitting side.

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