Novel material repairing method

Abstract

The invention provides a novel material repair method. The method comprises the steps that a fault detection unit recognizes a chip error point address, application type testing is conducted through testing software, the chip error point address is recognized, and a row and column address line of the error address is obtained; the address recording unit stores a fault unit detected by the fault detection unit in a memory bank SPD chip; the fault detection unit maps the detected fault unit to a redundant unit of the memory bank; and after the first test is finished, carrying out secondary test on the memory bank, replacing the original error address with the standby address through the address replacement unit for testing, and recording the product passing the test as a good product. According to the invention, the application test is carried out on the chip, manual removal of bad parts is replaced, and the product is automatically repaired in the test process by using software and a product redundancy adjustment method, so that the repair period and the success rate are greatly improved, and the maintenance cost of the product is also saved.

Description

Technical Field

[0001] The present invention relates to the field of applied testing, in particular to the field of test repair technology, and specifically to a new material repair method. Background Art

[0002] Currently, the repair method for a bad memory stick is as follows:

[0003] 1. Identify defective chips in products through application testing and record their locations in E-PROM.

[0004] 2. Use a fixture to clamp the defective chip and remove the entire chip IC from the defective product through a high-temperature reflow oven.

[0005] 3. Replace the vacant chip with a new chip, use a high-power microscope and calibration tools to manually adjust the position, and re-furnace it in the Cining Palace to mount it on the circuit board.

[0006] The above existing methods may cause the following problems:

[0007] 1. Because the operation of removing and replacing the defective chip requires manual operation, the success rate of the repair method is low. Since there are many connection points between the chip ball and the circuit board, it is difficult to ensure that the position is not deviated.

[0008] 2. Repairs require new chips, and materials that fail to be repaired are directly scrapped, increasing the cost of material repairs. Summary of the invention

[0009] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a new material repair method for solving the difficulties of the prior art.

[0010] To achieve the above-mentioned and other related purposes, the present invention provides a novel material repair method, comprising:

[0011] A fault detection unit, wherein the fault detection unit identifies the chip error point address, performs application-type testing using test software, identifies the chip error point address, and obtains the row and column address lines of the error address;

[0012] An address recording unit, wherein the address recording unit stores the faulty unit detected by the fault detection unit in a memory stick SPD chip;

[0013] A memory bar mapping unit, wherein the fault detection unit maps the detected faulty unit to a redundant unit of the memory bar;

[0014] The address replacement unit performs a secondary test on the memory stick after the first test is completed. The address replacement unit replaces the original error address with a spare address for testing. The one that passes the test is recorded as a good product.

[0015] According to a preferred solution, the test software in the fault detection unit is tested using the MBIST algorithm.

[0016] According to a preferred solution, the fault detection unit also includes converting the error code address into a chip physical address.

[0017] According to a preferred solution, the chip physical address includes: P refers to channel, DQ refers to input / output information channel, B refers to physical module, R refers to row address, and C refers to column address.

[0018] According to a preferred solution, when the address replacement unit identifies that the row address is bad or the bit unit point address is bad, the spare redundant address channel of the chip is opened through the mode register MRS inside the memory stick.

[0019] According to the preferred embodiment, the address replacement unit includes the following steps:

[0020] S1 pre-processing: All cells are pre-charged before performing automatic repair;

[0021] Before S2 enables automatic repair: Set the MRS command through the mode register to enable automatic repair;

[0022] S3 repair sequence: The mode register issues 4 consecutive commands, each command should be issued at a specific time interval;

[0023] S4 row / point address repair: issue a row address activation command to find the row and column information of the failed address;

[0024] S5 address transmission: After a specific time delay tRCD from row address to column address, a single chip is selected through the input and output channels using read and write commands, the address to be repaired is transmitted to the internal register of the chip, and the bad address is mapped to the address of the redundant space through the memory mapping table;

[0025] S6 Exit Auto-Repair: After writing the reply time and the PRE line precharge command, exit auto-repair and resume normal operation.

[0026] According to a preferred solution, when the content obtained in the address replacement unit is identified as having one bad row address, one bad column address, or a bad row-column cross address.

[0027] According to a preferred solution, the address replacement unit uses a 1.5V fuse current to open the spare address channel of the chip, and replaces the original erroneous address with the spare address for testing.

[0028] The present invention performs application-based testing on the chip instead of manually removing defective components, and uses software and product redundancy adjustment methods to automatically repair the product during the test process, thereby greatly improving the repair cycle and success rate, while also saving product maintenance costs.

[0029] The best embodiment for carrying out the present invention is described in more detail below so that the features and advantages of the present invention can be easily understood. Specific implementation methods

[0031] In order to make the purpose, technical solution and advantages of the technical solution of the present invention clearer, the technical solution of the embodiment of the present invention is clearly and completely described. It should be noted that the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the described embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0032] Compared to the embodiments, feasible embodiments within the scope of the invention may have fewer components, different components, differently arranged components, differently connected components, etc. In addition, two or more components may be implemented in a single component, or a single component shown may be implemented as multiple separate components.

[0033] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present invention belongs. The words "first", "second" and similar words used in the patent application specification and claims of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not necessarily indicate a quantity limitation. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0034] The present invention provides a novel material repair method for use in a memory stick application test process. The present invention does not limit the type of memory stick, but the novel material repair method is particularly suitable for repairing defective memory sticks.

[0035] In order to achieve the purpose of directly repairing materials during the test process, the problem that the removal and replacement of defective chips in the background technology requires manual operation and the success rate of the repair method is low. Since there are many connection points between the chip ball and the circuit board, it is difficult to ensure that the position is not deviated; new chips are needed for repair, and materials that fail the repair are directly scrapped, which increases the cost of material repair. For this reason, in the technical solution provided in this embodiment, application-based testing is performed on the chip to replace manual removal of defective parts. Software and product redundancy adjustment methods are used to automatically repair the product during the test process, which greatly improves the repair cycle and success rate, while also saving the product maintenance cost.

[0036] In general, the novel material repair method proposed in the present invention mainly includes a fault detection unit, an address recording unit, a memory bar mapping unit, and an address replacement unit;

[0037] Specifically, the fault detection unit identifies the chip error point address, and uses the test software to perform application-type testing. The test software uses the MBIST algorithm to perform testing to identify the chip error point address, obtain the row and column address lines of the error address, and convert the error code address into a chip physical address;

[0038] The chip physical address includes: P refers to the channel, DQ refers to the input / output information channel, B refers to the physical module, R refers to the row address, and C refers to the column address;

[0039] The address recording unit stores the faulty unit detected by the fault detection unit in the SPD chip of the memory bar;

[0040] The fault detection unit maps the detected faulty unit to the redundant unit of the memory bar;

[0041] After the first test, the memory stick is tested again. The address replacement unit replaces the original error address with the spare address for testing. The one that passes the test is recorded as a good product.

[0042] The address replacement unit includes the following processes:

[0043] S1 pre-processing: All cells are pre-charged before performing automatic repair;

[0044] Before S2 enables automatic repair: Set the MRS command through the mode register to enable automatic repair;

[0045] S3 repair sequence: The mode register issues 4 consecutive commands, each command should be issued at a specific time interval;

[0046] S4 row / point address repair: issue a row address activation command to find the row and column information of the failed address;

[0047] S4.1: The content obtained by identification has 1 bad row address or 1 bad column address or bad row-column cross address;

[0048] S5 address transmission: After a specific time delay tRCD from row address to column address, a single chip is selected through the input and output channels using read and write commands, the address to be repaired is transmitted to the internal register of the chip, and the bad address is mapped to the address of the redundant space through the memory mapping table;

[0049] Specifically, when the address replacement unit identifies that the row address is bad or the bit unit point address is bad, the address replacement unit uses a 1.5V fuse current to open the spare address channel of the chip, and replaces the original error address with the spare address for testing;

[0050] S6 Exit Auto-Repair: After writing the reply time and the PRE line precharge command, exit auto-repair and resume normal operation.

[0051] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A new material repair method, characterized in that: include: A fault detection unit, wherein the fault detection unit identifies the chip error point address, performs application-type testing using test software, identifies the chip error point address, and obtains the row and column address lines of the error address; An address recording unit, wherein the address recording unit stores the faulty unit detected by the fault detection unit in a memory stick SPD chip; A memory bar mapping unit, wherein the fault detection unit maps the detected faulty unit to a redundant unit of the memory bar; The address replacement unit performs a secondary test on the memory stick after the first test is completed. The address replacement unit replaces the original error address with a spare address for testing. The one that passes the test is recorded as a good product.

2. The novel material repair method according to claim 1, characterized in that: The test software in the fault detection unit is tested using the MBIST algorithm.

3. The novel material repair method according to claim 2, characterized in that: The fault detection unit also includes converting the error code address into a chip physical address.

4. The novel material repair method according to claim 3, characterized in that: The chip physical address includes: P refers to channel, DQ refers to input / output information channel, B refers to physical module, R refers to row address, and C refers to column address.

5. The novel material repair method according to claim 4, characterized in that: When the address replacement unit identifies that the row address is bad or the bit unit point address is bad, the spare redundant address channel of the chip is opened through the mode register MRS inside the memory stick.

6. The novel material repair method according to claim 5, characterized in that: The address replacement unit includes the following steps: S1 pre-processing: before performing automatic repair, all units are pre-charged; Before S2 enables automatic repair: Set the MRS command through the mode register to enable automatic repair; S3 repair sequence: the mode register issues 4 consecutive commands, each command should be issued at a specific time interval; S4 row / point address repair: issue a row address activation command to find the row and column information of the failed address; S5 address transmission: After a specific time delay tRCD from row address to column address, a single chip is selected through the input and output channels using read and write commands, the address to be repaired is transmitted to the internal register of the chip, and the bad address is mapped to the address of the redundant space through the memory mapping table; S6 Exit Auto-Repair: After writing the reply time and the PRE line precharge command, exit auto-repair and resume normal operation.

7. The novel material repair method according to claim 6, characterized in that: The address replacement unit may identify that one row address is bad, one column address is bad, or a row-column cross address is bad.