A method, system, device and storage medium for determining dynamic voltage of LPDDR chip

Abstract

The present invention discloses a method, system, device, and storage medium for determining the dynamic voltage of an LPDDR chip. The method comprises: obtaining process parameters of the LPDDR chip; determining a parameter type based on the process parameters, wherein the parameter type represents the type of the process parameters; determining a dynamic voltage (DVFSC) mode of the LPDDR chip based on the parameter type and a preset data table; and determining the dynamic voltage of the LPDDR chip based on the DVFSC mode, the preset data table, and the process parameters. This application effectively overcomes the shortcomings of existing methods by determining the DVFSC mode of the LPDDR chip based on the process parameters of the LPDDR chip, thereby calculating the dynamic voltage in the DVFSC mode. Therefore, when the DVFSC mode is a low-frequency mode, the corresponding dynamic voltage can be calculated, thereby improving the operational stability of the LPDDR chip.

Description

Technical Field

[0001] The present invention relates to the field of memory testing technology, and in particular to a method, system, device and storage medium for determining the dynamic voltage of an LPDDR chip. Background Art

[0002] LPDDR (Low-Power Double Data Rate SDRAM) is a type of memory used in electronic devices with strict power consumption requirements, such as mobile devices and IoT devices. While meeting the device's memory capacity and performance requirements, it focuses on reducing power consumption and extending the device's battery life.

[0003] When existing LPDDR chips (especially LPDDR5) are in low-frequency mode, the dynamic voltage cannot be accurately calculated, resulting in unstable operation of the LPDDR chip. Summary of the Invention

[0004] In view of this, the purpose of the embodiments of the present invention is to provide a method, system, device and storage medium for determining the dynamic voltage of an LPDDR chip, which can accurately calculate the dynamic voltage when the LPDDR chip is in low-frequency mode, thereby improving the stability of the LPDDR chip operation.

[0005] In a first aspect, an embodiment of the present invention provides a method for determining a dynamic voltage of an LPDDR chip, comprising: obtaining process parameters of the LPDDR chip;

[0006] determining a parameter type according to the process parameter, wherein the parameter type represents a class of the process parameter;

[0007] Determine the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table;

[0008] The dynamic voltage of the LPDDR chip is determined according to the DVFSC mode, the preset data table and the process parameters.

[0009] In some optional embodiments, determining the parameter type according to the process parameter includes:

[0010] determining a parameter performance based on the process parameter;

[0011] In a case where the parameter performance characterizing the process parameter is an electrical performance parameter, configuring the process parameter indicating the electrical performance of the transistor to be of the first type, and / or configuring the process parameter indicating the electrical performance of the load element to be of the second type;

[0012] In the case where the parameter performance characterizing the process parameter is a physical performance parameter, the process parameter indicating the physical performance of the transistor is configured as a third type, and / or the process parameter indicating the physical performance of the load element is configured as a fourth type.

[0013] In some optional embodiments, determining the DVFSC mode of the LPDDR chip according to the parameter type and a preset data table includes:

[0014] When the parameter type is configured as the first type, searching the preset data table for a first mode corresponding to the first type, and configuring the DVFSC mode as the first mode;

[0015] When the parameter type is configured as the second type, searching the preset data table for a second mode corresponding to the second type, and configuring the DVFSC mode as the second mode;

[0016] When the parameter type is configured as the third type, searching the preset data table for a third mode corresponding to the third type, and configuring the DVFSC mode to the third mode;

[0017] When the parameter type is configured as the fourth type, a fourth mode corresponding to the fourth type is searched in the preset data table, and the DVFSC mode is configured as the fourth mode. The first mode indicates a high frequency mode, and the second mode and the third mode indicate a low frequency mode.

[0018] In some optional embodiments, determining the dynamic voltage of the LPDDR chip according to the DVFSC mode, the preset data table, and the process parameters includes:

[0019] Determining a target entry in the preset data table based on the DVFSC mode;

[0020] The dynamic voltage is determined according to the process parameters and the target item, where the dynamic voltage represents a voltage preset according to different process parameters.

[0021] In some optional embodiments, after determining the target entry in the preset data table based on the DVFSC mode, the method further includes:

[0022] Determine a voltage calculation formula according to the target item;

[0023] The process parameters are substituted into the voltage calculation formula to calculate and obtain the dynamic voltage.

[0024] In some optional embodiments, determining the dynamic voltage according to the process parameter and the target item includes:

[0025] Obtaining a first voltage corresponding to the process parameter of the first type in the target entry;

[0026] Obtaining a second voltage corresponding to the process parameter of the second type in the target entry;

[0027] Obtaining a third voltage corresponding to the process parameter of the third type in the target entry;

[0028] Obtaining a fourth voltage corresponding to the process parameter of the fourth type in the target entry;

[0029] The dynamic voltage is determined according to the first voltage, the second voltage, a third voltage, and a fourth voltage.

[0030] In some optional embodiments, determining the dynamic voltage according to the first voltage, the second voltage, the third voltage, and the fourth voltage includes:

[0031] Obtaining a first weight coefficient of the first voltage, a second weight coefficient of the second voltage, a third weight coefficient of the third voltage, and a fourth weight coefficient of the fourth voltage;

[0032] The dynamic voltage is calculated according to the first voltage, the first weight coefficient, the second voltage, the second weight coefficient, the third voltage, the third weight coefficient, the fourth voltage, and the fourth weight coefficient.

[0033] In a second aspect, an embodiment of the present invention provides a dynamic voltage determination system for an LPDDR chip, comprising: a first module for obtaining process parameters of the LPDDR chip;

[0034] A second module is configured to determine a parameter type according to the process parameter, wherein the parameter type represents a type of the process parameter;

[0035] The third module is used to determine the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table;

[0036] The fourth module is used to determine the dynamic voltage of the LPDDR chip according to the DVFSC mode, the preset data table and the process parameters.

[0037] In a third aspect, an embodiment of the present invention provides a memory testing device, applied to a smart card, the device comprising: at least one processor;

[0038] at least one memory for storing at least one program;

[0039] When the at least one program is executed by the at least one processor, the at least one processor implements the method described above.

[0040] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing a program executable by a processor, wherein the program executable by the processor is used to perform the method described above when executed by the processor.

[0041] Implementation of the embodiments of the present invention provides the following beneficial effects: The embodiments of the present invention provide a method for determining the dynamic voltage of an LPDDR chip, comprising: obtaining process parameters of the LPDDR chip; determining a parameter type based on the process parameters, wherein the parameter type represents the type of the process parameters; determining a DVFSC mode of the LPDDR chip based on the parameter type and a preset data table; and determining the dynamic voltage of the LPDDR chip based on the DVFSC mode, the preset data table, and the process parameters. This application can effectively address the shortcomings of existing methods by determining the DVFSC mode of the LPDDR chip based on the process parameters of the LPDDR chip, thereby calculating the dynamic voltage in the DVFSC mode. Therefore, when the DVFSC mode is a low-frequency mode, the corresponding dynamic voltage can be calculated, thereby improving the operational stability of the LPDDR chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 This is a schematic flow chart of the steps of a method for determining the dynamic voltage of an LPDDR chip provided by an embodiment of the present invention;

[0043] Figure 2 This is a structural block diagram of a dynamic voltage determination system for an LPDDR chip provided by an embodiment of the present invention;

[0044] Figure 3 This is a structural block diagram of a memory testing device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0046] It should be noted that although the device schematics illustrate functional module divisions and the flowcharts illustrate logical sequences, in certain circumstances, the steps shown or described may be performed in a sequence that differs from the module divisions in the device or the sequence in the flowcharts. The terms "first," "second," and the like in the specification, claims, or accompanying drawings are used to distinguish similar items and are not necessarily used to describe a specific sequence or precedence.

[0047] An embodiment of the present invention provides a method for determining the dynamic voltage of an LPDDR chip, comprising: obtaining process parameters of the LPDDR chip; determining a parameter type based on the process parameters, wherein the parameter type represents the type of the process parameters; determining a DVFSC mode of the LPDDR chip based on the parameter type and a preset data table; and determining the dynamic voltage of the LPDDR chip based on the DVFSC mode, the preset data table, and the process parameters. This application can effectively address the shortcomings of existing methods by determining the DVFSC mode of the LPDDR chip based on the process parameters of the LPDDR chip, thereby calculating the dynamic voltage in the DVFSC mode. Therefore, when the DVFSC mode is a low-frequency mode, the corresponding dynamic voltage can be calculated, thereby improving the operational stability of the LPDDR chip.

[0048] The embodiments of the present invention are further described below with reference to the accompanying drawings.

[0049] like Figure 1 As shown, an embodiment of the present invention provides a method for determining the dynamic voltage of an LPDDR chip, which includes the following steps.

[0050] S100, obtaining process parameters of the LPDDR chip;

[0051] S200, determining a parameter type according to the process parameter, where the parameter type represents a type of the process parameter;

[0052] S300, determining the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table;

[0053] S400 , determining a dynamic voltage of an LPDDR chip according to the DVFSC mode, the preset data table, and the process parameters.

[0054] Specifically, the process parameters of this application can be obtained through design documents, measurements during the manufacturing process, and chip testing equipment. The specific acquisition method is not limited here. The process parameters of LPDDR chips play a decisive role in chip performance, power consumption, and electromagnetic compatibility. Process parameters cover multiple aspects, such as transistor-level parameters, including channel length, channel width, threshold voltage, and doping concentration. Channel length and width affect transistor size, which in turn affects the integration level and electron migration speed of the LPDDR chip. The threshold voltage determines the minimum voltage required for the transistor to turn on and has a significant impact on the operating voltage range of the entire LPDDR chip. The doping concentration is related to the carrier concentration and affects the conductivity of the transistor. In addition, parameters related to the physical structure of the LPDDR chip are also involved, such as the thickness of the metal layer, the spacing between metal lines, and the thickness of the insulation layer. Metal layer parameters affect the wiring resistance and capacitance within the LPDDR chip, affecting signal transmission speed and power consumption. The thickness of the insulation layer is related to the voltage withstand capability and leakage of the LPDDR chip. In addition, there are related parameters of passive components such as capacitors and resistors, which together form the basis of the complex electrical characteristics of LPDDR chips.

[0055] The type of LPDDR chip is determined by analyzing the relationship between process parameters and various performance indicators, and is identified by corresponding symbols.

[0056] The preset data table was compiled during the LPDDR chip development process through extensive experimental testing, simulation analysis, and feedback from actual applications. It records the optimal DVFSC (Dynamic Voltage and Frequency Scaling Control) modes for the LPDDR chip under various operating conditions, using different parameter combinations. The table is organized by parameter type, with each row corresponding to a parameter combination and columns listing the corresponding DVFSC mode and related information. Once the corresponding parameter types for the chip process parameters have been determined, a matching entry is searched in the preset data table. By comparing the specific parameters of each parameter type, the row that best matches the current LPDDR chip process parameter characteristics is found. The DVFSC mode specified in that row is the appropriate mode for that LPDDR chip. Different DVFSC modes define the dynamic voltage of the LPDDR chip under different operating conditions.

[0057] In some embodiments, in a specific DVFSC mode, the dynamic voltage is associated with multiple factors of the LPDDR chip, such as the LPDDR chip's operating frequency, load conditions, and specific process parameters. For example, in a DVFSC mode focused on low power consumption, as the LPDDR chip's operating frequency decreases, the dynamic voltage also decreases proportionally to reduce power consumption. In a mode focused on high performance, the dynamic voltage needs to be maintained at a high level during high-frequency operation to ensure fast transistor switching and high-speed data transmission.

[0058] In some optional embodiments, determining the parameter type according to the process parameter includes: determining parameter performance based on the process parameter; when the parameter performance characterizes that the process parameter is an electrical performance parameter, configuring the process parameter indicating the electrical performance of the transistor as a first type, and / or configuring the process parameter indicating the electrical performance of the load element as a second type; when the parameter performance characterizes that the process parameter is a physical performance parameter, configuring the process parameter indicating the physical performance of the transistor as a third type, and / or configuring the process parameter indicating the physical performance of the load element as a fourth type.

[0059] Specifically, transistors are the core active components in LPDDR chips, and their electrical performance plays a critical role in the overall functionality of the chip. Process parameters such as the transistor's threshold voltage, carrier mobility, channel length, channel width, and doping concentration directly reflect the transistor's electrical characteristics. For example, the threshold voltage determines the voltage at which the transistor begins to conduct, and its value directly affects the chip's static power consumption and operating speed. Carrier mobility affects the transistor's switching speed and current drive capability, determining electrical performance indicators such as the LPDDR chip's data read and write speed. Therefore, these process parameters that directly reflect the transistor's electrical performance are classified as the first type (which can be represented by appropriate symbols, such as 1α, but the specifics are not limited). This allows for unified analysis and processing when considering factors affecting the chip's electrical performance. These parameters can then be used to determine the appropriate DVFSC mode and dynamic voltage configuration.

[0060] In addition to transistors, LPDDR chips also contain load components such as capacitors and resistors. Taking capacitors as an example, the parasitic capacitance within an LPDDR chip (including transistor gate capacitance and parasitic capacitance between metal layers) affects the charge and discharge time of signals, thereby changing signal transmission speed. This also consumes energy during the charge and discharge process, impacting the power consumption of the LPDDR chip. Resistive components (such as metal wiring resistance) generate a voltage drop when current passes through them, affecting signal integrity and energy loss. These process parameters related to the electrical performance of load components are classified as the second type (which can be represented by a specific symbol, such as 1β, but is not limited to specific symbols). This helps comprehensively analyze the impact of different components when considering the overall electrical performance of the LPDDR chip, allowing for more accurate determination of operating modes, voltages, and other parameters that meet the actual electrical characteristics of the LPDDR chip.

[0061] While transistors primarily function based on their electrical performance, certain process parameters related to physical properties are equally important. For example, the physical dimensions of transistors (including overall dimensions and thickness of various layers) not only influence the integration level of LPDDR chips but may also indirectly impact electrical performance. Smaller transistor dimensions can help improve LPDDR chip integration, but they can also introduce issues such as heat dissipation and physical stability during high-frequency operation. Furthermore, physical parameters such as the tightness of the fit between transistor material layers affect electron transmission at the interfaces, indirectly impacting electrical performance. These process parameters reflecting transistor physical properties are classified as the third type (which can be represented by symbols such as 1X, though this is not a specific requirement). When analyzing overall chip performance and determining configurations, the impact of physical structural factors on electrical characteristics can be comprehensively considered to ensure that operating modes and voltage parameters are more accurately tailored to the actual LPDDR chip.

[0062] For the load components in LPDDR chips, physical parameters such as metal layer thickness, metal line spacing, and insulation layer thickness directly determine their physical properties. Metal layer thickness affects its conductivity and resistance, metal line spacing affects wiring capacitance and electromagnetic interference between signals, and insulation layer thickness affects the LPDDR chip's physical performance, such as voltage withstand and leakage. These process parameters related to the physical performance of load components are classified as a fourth type (denoted by symbols such as 1Y, but not limited). When considering the overall performance of the LPDDR chip, physical structural factors are fully considered. This ensures that the impact of physical performance parameters on the LPDDR chip's operating state is fully considered when determining parameters such as the chip's DVFSC mode and dynamic voltage, ensuring that the LPDDR chip operates with a stable physical structure and good electrical performance.

[0063] In some optional embodiments, determining the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table includes: when the parameter type is configured as the first type, searching the preset data table for a first mode corresponding to the first type, and configuring the DVFSC mode as the first mode; when the parameter type is configured as the second type, searching the preset data table for a second mode corresponding to the second type, and configuring the DVFSC mode as the second mode; when the parameter type is configured as the third type, searching the preset data table for a third mode corresponding to the third type, and configuring the DVFSC mode as the third mode; when the parameter type is configured as the fourth type, searching the preset data table for a fourth mode corresponding to the fourth type, and configuring the DVFSC mode as the fourth mode, wherein the first mode indicates a high frequency mode, and the second and third modes indicate a low frequency mode.

[0064] Specifically, the first type of parameters primarily refers to process parameters that indicate the electrical performance of transistors. These parameters have a critical impact on the electrical behavior and operating characteristics of the chip (hereinafter referred to as LPDDR chips). For example, characteristics such as high carrier mobility and short channel length (characteristics covered by the first type of parameters) indicate that the transistor has strong switching speed and current drive capability, enabling the chip to operate at higher frequencies for fast data reading, writing, and processing. Therefore, from a performance perspective, chips corresponding to these parameters are more suitable for high-frequency operation, thereby fully leveraging their electrical performance advantages and improving overall chip efficiency. The preset data table is compiled and constructed after extensive chip testing, simulation analysis, and actual application feedback. It records the mapping between different parameter types and corresponding DVFSC modes. When the parameter type is configured as the first type, the corresponding first mode is searched in the data table. Based on past experiments and experience, the data table includes a corresponding high-frequency mode as the first mode for the first type of parameters. This high-frequency mode will specify the corresponding voltage and frequency adjustment strategies. For example, in this mode, a higher operating voltage range (such as 1.05V) will be set to ensure that the transistor can be quickly turned on and off when working at high frequency. At the same time, in conjunction with the corresponding frequency adjustment rules, the chip can operate stably in a high-frequency state to meet the needs of high-performance data processing.

[0065] The second type of parameters refers to process parameters that indicate the electrical performance of load components. These parameters include parasitic capacitance and resistance within the chip, among other load component parameters. Large parasitic capacitance (characteristics reflected by the second type of parameters) can increase signal charge and discharge times, affecting signal transmission speed and consuming more energy during the charge and discharge process, hindering efficient chip operation at high frequencies. Furthermore, considering power consumption and signal stability, chips corresponding to these parameters are more suitable for operating in low-frequency mode. Lowering the operating frequency reduces signal transmission stress and power loss, ensuring stable data processing. While data transmission speeds are relatively slow, a better balance between power consumption and stability is achieved. The DVFSC mode is also determined based on a pre-set datasheet. The datasheet specifically defines a second mode for the second type of parameters, defined as low-frequency mode. In this low-frequency mode, voltage and frequency adjustment strategies prioritize reducing power consumption and maintaining signal stability. For example, a relatively low operating voltage (such as 0.9V) will be set to avoid excessive power consumption on the load components due to excessively high voltage. At the same time, the operating frequency will be adjusted to a suitable low-frequency range so that the chip can operate stably in this state, meeting the needs of some application scenarios that do not have high real-time requirements but focus on power consumption and stability.

[0066] The third type of parameters focuses on process parameters that indicate the physical performance of transistors, such as the physical dimensions of the transistors and the tightness of the fit between material layers. When these physical performance parameters exhibit certain characteristics, such as small transistor dimensions that may lead to heat dissipation issues or physical stability issues during high-frequency operation, these chips are unsuitable for prolonged high-frequency operation due to the impact of the physical structure on overall chip performance. Otherwise, risks such as overheating and physical structural damage may occur, impacting chip reliability and lifespan. Therefore, due to these physical performance limitations, the chip operates in a low-frequency mode to ensure physical structural stability and overall performance. According to the pre-set data table, a third mode is specified for the third type of parameters, and this mode is also set to low-frequency. In this third mode, the DVFSC voltage and frequency adjustment rules take into account transistor physical performance factors. For example, the operating voltage (e.g., 0.9V) is appropriately set based on the transistor's heat dissipation requirements and physical stability requirements to avoid exacerbating heat dissipation issues. The operating frequency is also controlled within the low-frequency range to ensure stable data reading, writing, and processing while maintaining a stable physical structure, extending the chip's lifespan and ensuring stable system operation.

[0067] The fourth type of parameters involves process parameters that indicate the physical performance of the load element, such as metal layer thickness, metal line spacing, and insulation layer thickness. For example, improper metal line spacing can lead to increased wiring capacitance and enhanced electromagnetic interference between signals, while insufficient insulation thickness can cause leakage. These physical performance issues can affect chip stability and normal operation. In this case, to ensure reliable chip operation and avoid signal transmission errors and leakage failures caused by physical structural factors, the chip is operated in a low-frequency mode. By reducing the frequency, the pressure on the physical structure is reduced, ensuring signal transmission stability and overall chip safety. The fourth mode corresponding to the fourth type of parameters is searched in the preset data table. This mode may be a low-frequency mode or an inoperative mode. The DVFSC strategy in this fourth mode prioritizes the impact of the load element's physical performance on the chip. For example, based on the physical characteristics of the metal layer and insulation layer, the appropriate operating voltage is set to avoid leakage risks. The operating frequency is also maintained at a low frequency, ensuring stable data processing while maintaining the stability of the load element's physical structure, thus meeting the system's chip reliability requirements.

[0068] In some optional embodiments, determining the dynamic voltage of the LPDDR chip according to the DVFSC mode, the preset data table and the process parameters includes: determining a target entry in the preset data table based on the DVFSC mode; determining the dynamic voltage according to the process parameters and the target entry, the dynamic voltage representing the voltage preset according to different process parameters.

[0069] Specifically, once the DVFSC mode used by the LPDDR chip is known, the corresponding section of the preset data table is located. For example, if the LPDDR chip determines that the DVFSC mode is high-frequency mode (assuming this mode was previously determined based on matching relevant parameter types), the data table is searched for an area specifically describing the high-frequency mode. Within this area, a search is conducted for an entry that matches or most closely matches the actual process parameters of the current chip. This entry is the target entry. The corresponding dynamic voltage is extracted from the target entry, enabling the chip to operate at dynamic voltage in this DVFSC mode, ensuring optimal performance in various aspects, such as performance, power consumption, and stability, or meeting established system requirements.

[0070] In some optional embodiments, after determining the target entry in the preset data table based on the DVFSC mode, the method further includes: determining a voltage calculation formula according to the target entry; and obtaining the dynamic voltage by substituting the process parameters into the voltage calculation formula for calculation.

[0071] Specifically, after finding the target entry in the preset data table based on the DVFSC mode, the voltage calculation formula is extracted from this entry and the actual process parameters of the LPDDR chip are substituted into the formula to accurately determine the dynamic voltage of the LPDDR chip. By fully leveraging the extensive experimental and empirical data integrated in the preset data table and combining it with the specific process parameters of the chip, accurate quantitative calculation of the dynamic voltage is achieved, ensuring that the chip operates at the appropriate voltage in the specific DVFSC mode, ensuring a good balance between chip performance, power consumption, and stability.

[0072] In some optional embodiments, determining the dynamic voltage based on the process parameters and the target entry includes: obtaining a first voltage corresponding to the first type of process parameters in the target entry; obtaining a second voltage corresponding to the second type of process parameters in the target entry; obtaining a third voltage corresponding to the third type of process parameters in the target entry; obtaining a fourth voltage corresponding to the fourth type of process parameters in the target entry; and determining the dynamic voltage based on the first voltage, the second voltage, the third voltage, and the fourth voltage.

[0073] Specifically, by obtaining the voltage values ​​associated with various process parameters in the target entry and then integrating them in a reasonable manner, the dynamic voltage suitable for the chip in a specific operating mode (determined by the DVFSC mode) is accurately determined. This approach fully considers the characteristics of the chip from multiple dimensions, ensuring that the dynamic voltage setting not only conforms to the physical and electrical structure characteristics of the chip, but also meets its performance, power consumption, and stability requirements in different application scenarios.

[0074] Type I process parameters are closely related to transistor electrical performance, such as the transistor's threshold voltage, carrier mobility, channel length and width, and doping concentration. These parameters fundamentally determine the transistor's electrical behavior and, in turn, significantly impact the overall chip's operating characteristics. For example, the threshold voltage determines the minimum voltage required for the transistor to begin conducting. A lower threshold voltage makes the transistor more likely to conduct, but it may also increase leakage current in the off state, affecting the chip's static power consumption. Carrier mobility affects the transistor's switching speed and current drive capability. A higher carrier mobility facilitates fast data read and write operations, improving the chip's operating frequency and processing performance. The target entry, a key record selected from a preset data table for the specific chip's specific conditions, sets a corresponding first voltage for the Type I process parameter. This first voltage is determined based on extensive experimental testing, simulation analysis, and practical application experience, taking into account the transistor's electrical performance characteristics as reflected by the Type I process parameters. The target entry clearly specifies the voltage value that corresponds to the specific DVFSC mode and the specific range or value of the Type I process parameter for the current chip.

[0075] In some embodiments, a suitable first voltage value, such as 1.0V (only an example value), is given in the target entry based on past test data of chips with similar parameters in the DVFSC mode. The first voltage can be obtained by searching the corresponding record.

[0076] The second type of process parameters primarily refers to parameters that indicate the electrical performance of load components, including parasitic capacitance and resistance within the chip. Similarly, the target entry is searched for a second voltage corresponding to the second type of process parameters.

[0077] The third type of process parameters focuses on parameters related to transistor physical performance, covering aspects such as the transistor's physical dimensions (such as overall size and thickness of each layer) and the closeness of the material layers. While these parameters primarily reflect the physical characteristics of the transistor, they indirectly affect the electrical performance and operating state of the transistor and, ultimately, the entire chip. For example, smaller transistor physical dimensions help increase chip integration, but may also lead to heat dissipation issues or physical stability issues during high-frequency operation. Insufficient closeness between transistor material layers can affect the efficiency of electron transfer at different material interfaces, thereby altering the transistor's electrical performance. Therefore, these physical performance parameters are also important factors to consider when determining the appropriate operating voltage for the chip. The corresponding third voltage is recorded in the target entry for the third type of process parameters. When a chip's transistor physical performance parameters exhibit specific conditions (such as small physical dimensions or poor material layer closeness), the corresponding third voltage value is specified in the target entry, taking into account the comprehensive consideration of chip stability and electrical performance under the current DVFSC mode. For example, according to the record in the target entry, for a chip with the physical performance characteristics of this type of transistor, in this DVFSC mode, the third voltage is set to 0.9V (for example only). By obtaining the voltage corresponding information related to the physical performance parameters of the transistor in the target entry, this third voltage can be obtained. It reflects the voltage situation adapted to ensure stable operation of the chip from the perspective of the physical structure of the transistor.

[0078] The fourth type of process parameters focuses on parameters that indicate the physical performance of the load component. These parameters include metal layer thickness, metal line spacing, and insulation layer thickness. These physical parameters directly determine the physical characteristics of the load component and affect chip stability, signal transmission, and power consumption. Search the target entry for the fourth voltage corresponding to the fourth type of process parameters.

[0079] In some embodiments, a corresponding fourth voltage value is assigned based on the actual physical performance parameters of the chip's load components, taking into account requirements such as maintaining chip stability, ensuring signal transmission quality, and controlling power consumption in the current DVFSC mode. For example, if the chip's metal layer thickness is thin, the metal line spacing is moderate, and the insulation layer thickness is within a certain range (these are the actual conditions of the fourth type of process parameters), the corresponding fourth voltage value is 0.7V (an example value) based on relevant experience and test data. This fourth voltage can be obtained by locating the portion of the target entry related to the physical performance of the load component. It reflects the voltage setting required for the chip to operate normally, considering the physical structure of the load component.

[0080] In some optional embodiments, determining the dynamic voltage based on the first voltage, the second voltage, the third voltage and the fourth voltage includes: obtaining a first weight coefficient of the first voltage, a second weight coefficient of the second voltage, a third weight coefficient of the third voltage and a fourth weight coefficient of the fourth voltage; and calculating the dynamic voltage based on the first voltage, the first weight coefficient, the second voltage, the second weight coefficient, the third voltage, the third weight coefficient, the fourth voltage and the fourth weight coefficient.

[0081] Specifically, by assigning corresponding weight coefficients (first, second, third, and fourth) to the voltages corresponding to different process parameters (first, second, third, and fourth voltages), and then performing a weighted calculation based on these weight coefficients, a dynamic voltage value is derived that comprehensively considers all aspects of the chip's characteristics. This more accurately adapts to the complex conditions of actual chip operation and fully accounts for the differences in the impact of different process parameters on chip voltage requirements. This ensures that the determined dynamic voltage strikes a good balance between performance, power consumption, and stability, ensuring stable and efficient chip operation in the corresponding DVFSC mode.

[0082] The first weight coefficient (corresponding to the first voltage, the voltage corresponding to the process parameters related to the electrical performance of the transistor): It reflects the relative importance of the electrical performance parameters of the transistor to the overall voltage requirements of the chip. For example, the electrical performance parameters of the transistor, such as the threshold voltage and carrier mobility, have a key impact on whether the chip can start normally, at what frequency it can work efficiently, and the power consumption level. If the operating performance and power consumption of the chip are highly sensitive to the electrical performance of the transistor, such as in some application scenarios with extremely high requirements for data processing speed, the switching speed of the transistor (closely related to carrier mobility) plays a decisive role, then the first weight coefficient will be relatively large to highlight the importance of the first voltage corresponding to this part of the parameters in determining the dynamic voltage.

[0083] The second weight coefficient (corresponding to the second voltage, the voltage corresponding to the process parameters related to the electrical performance of the load element): reflects the proportion of the load element electrical performance parameters in the overall voltage requirement of the chip. The electrical performance of load elements such as parasitic capacitance and resistance within the chip has a significant impact on signal transmission speed, power loss, etc. In some applications with high signal integrity requirements or strict power consumption limits, the impact of the load element electrical performance parameters cannot be ignored. In this case, the second weight coefficient will be reasonably set according to its importance to reflect the role of the second voltage in the comprehensive determination of the dynamic voltage.

[0084] The third weighting factor (corresponding to the third voltage, a voltage corresponding to process parameters related to transistor physical performance) primarily considers the weight of the impact of transistor physical performance parameters on the chip's voltage requirements. While transistor physical performance parameters (such as physical size and the tightness of material layer adhesion) indirectly affect the chip's electrical performance, undersized transistors can cause heat dissipation issues, which in turn affect the chip's stable operation under high loads. This issue requires appropriate voltage adjustments to mitigate the problem. Therefore, the third weighting factor is determined based on the impact of these physical performance parameters on the chip's overall performance and stability, indicating the contribution of the third voltage to the final dynamic voltage determination process.

[0085] The fourth weighting factor (corresponding to the fourth voltage, corresponding to process parameters related to the physical performance of the load component) represents the importance of the load component's physical performance parameters to the chip voltage setting. For example, load component physical performance parameters such as metal layer thickness, metal line spacing, and insulation layer thickness are related to chip stability, signal electromagnetic interference, and leakage. These parameters play a key role in ensuring reliable chip operation and avoiding failures caused by physical structural factors. Accordingly, the fourth weighting factor is assigned an appropriate value based on their importance.

[0086] The corresponding weight coefficients are determined by the performance goals that the chip focuses on, such as focusing on high-performance computing (in this case, the weight coefficient related to the electrical performance of the transistor is larger), low power consumption and long battery life (the weight coefficient related to the electrical performance and physical performance of the load element is larger), and other different application scenarios. For example, for LPDDR chips used in mobile devices, due to their sensitivity to power consumption, the second weight coefficient (involving the impact of the electrical performance of the load element on power consumption) and the fourth weight coefficient (the physical performance of the load element ensures stability and low leakage to save electricity) may be relatively higher to ensure that the need to reduce power consumption is fully considered when determining the dynamic voltage. Assuming the first voltage , the first weight coefficient ; Second voltage , the second weight coefficient ; The third voltage , the third weight coefficient ; Fourth voltage , the fourth weight coefficient , we can calculate: dynamic voltage By determining the dynamic voltage through this weighted calculation method, multiple chip characteristics, including transistor electrical performance, load component electrical performance, transistor physical performance, and load component physical performance, can be comprehensively considered.

[0087] The setting of different weight coefficients ensures that the proportion of the voltage corresponding to each process parameter in the final dynamic voltage is consistent with the actual situation of its overall impact on the chip, avoiding the problem of a single factor dominating or certain factors being ignored, making the determined dynamic voltage more scientific and reasonable, and better able to meet the chip's precise voltage requirements in different working states and application scenarios, ensuring that the chip runs stably and efficiently in the established DVFSC mode, and achieving optimization and coordination in multiple aspects such as performance, power consumption and stability.

[0088] Implementation of the embodiments of the present invention provides the following beneficial effects: The embodiments of the present invention provide a method for determining the dynamic voltage of an LPDDR chip, comprising: obtaining process parameters of the LPDDR chip; determining a parameter type based on the process parameters, wherein the parameter type represents the type of the process parameters; determining a DVFSC mode of the LPDDR chip based on the parameter type and a preset data table; and determining the dynamic voltage of the LPDDR chip based on the DVFSC mode, the preset data table, and the process parameters. This application can effectively address the shortcomings of existing methods by determining the DVFSC mode of the LPDDR chip based on the process parameters of the LPDDR chip, thereby calculating the dynamic voltage in the DVFSC mode. Therefore, when the DVFSC mode is a low-frequency mode, the corresponding dynamic voltage can be calculated, thereby improving the operational stability of the LPDDR chip.

[0089] Secondly, refer to Figure 2 An embodiment of the present invention provides a dynamic voltage determination system for an LPDDR chip, comprising:

[0090] The first module is used to obtain the process parameters of the LPDDR chip;

[0091] A second module is configured to determine a parameter type according to the process parameter, wherein the parameter type represents a type of the process parameter;

[0092] The third module is used to determine the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table;

[0093] The fourth module is used to determine the dynamic voltage of the LPDDR chip according to the DVFSC mode, the preset data table and the process parameters.

[0094] It can be seen that the contents of the above method embodiments are all applicable to the present system embodiments. The functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0095] Thirdly, refer to Figure 3 , an embodiment of the present invention provides a memory testing device, comprising:

[0096] at least one processor;

[0097] at least one memory for storing at least one program;

[0098] When at least one program is executed by at least one processor, the at least one processor implements the above method.

[0099] It can be seen that the contents of the above method embodiments are all applicable to the present device embodiments. The functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0100] In a fourth aspect, in addition, an embodiment of the present application further discloses a computer program product or a computer program, which is stored in a computer-storable medium. The processor of a computer device can read the computer program from a computer-readable storage medium, and the processor executes the computer program so that the computer device performs the above-mentioned method or the above-mentioned system. Similarly, the contents of the above-mentioned method embodiment are all applicable to the present storage medium embodiment, and the functions specifically implemented by the present storage medium embodiment are the same as those of the above-mentioned method embodiment, and the beneficial effects achieved are also the same as those achieved by the above-mentioned method embodiment.

[0101] It is understood that all or some steps, systems in the disclosed method above can be implemented as software, firmware, hardware and appropriate combinations thereof. Some physical components or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital information processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application specific integrated circuit. Such software can be distributed on a computer-readable medium, and the computer-readable medium can include computer storage media (or non-transitory media) and communication media (or temporary media). As known to those of ordinary skill in the art, the term computer storage medium is included in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data) and is volatile and non-volatile, removable and non-removable media. Computer storage media includes but is not limited to RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or can be used to store desired information and any other medium that can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in modulated data information such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0102] The embodiments of the present invention are described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made within the scope of knowledge possessed by ordinary technicians in the technical field without departing from the spirit of the present invention.

Claims

1. A method for determining the dynamic voltage of an LPDDR chip, characterized in that: include: Get the process parameters of the LPDDR chip; determining a parameter type according to the process parameter, wherein the parameter type represents a type of the process parameter; Determine the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table; The dynamic voltage of the LPDDR chip is determined according to the DVFSC mode, the preset data table and the process parameters, specifically including: determining a target entry in the preset data table based on the DVFSC mode, obtaining a first voltage corresponding to the first type of the process parameter in the target entry, obtaining a second voltage corresponding to the second type of the process parameter in the target entry, obtaining a third voltage corresponding to the third type of the process parameter in the target entry, obtaining a fourth voltage corresponding to the fourth type of the process parameter in the target entry, and determining the dynamic voltage according to the first voltage, the second voltage, the third voltage and the fourth voltage, wherein the dynamic voltage represents a voltage preset according to different process parameters.

2. The method according to claim 1, characterized in that Determining the parameter type according to the process parameter includes: determining a parameter performance based on the process parameter; In a case where the parameter performance characterizing the process parameter is an electrical performance parameter, configuring the process parameter indicating the electrical performance of the transistor to be of the first type, and / or configuring the process parameter indicating the electrical performance of the load element to be of the second type; In the case where the parameter performance characterizing the process parameter is a physical performance parameter, the process parameter indicating the physical performance of the transistor is configured as a third type, and / or the process parameter indicating the physical performance of the load element is configured as a fourth type.

3. The method according to claim 2, characterized in that The determining the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table includes: When the parameter type is configured as the first type, searching the preset data table for a first mode corresponding to the first type, and configuring the DVFSC mode as the first mode; When the parameter type is configured as the second type, searching the preset data table for a second mode corresponding to the second type, and configuring the DVFSC mode as the second mode; When the parameter type is configured as the third type, searching the preset data table for a third mode corresponding to the third type, and configuring the DVFSC mode to the third mode; In a case where the parameter type is configured as a fourth type, searching the preset data table for a fourth mode corresponding to the fourth type, configuring the DVFSC mode as the fourth mode, wherein the first mode indicates a high frequency mode, The second mode and the third mode indicate low frequency modes.

4. The method according to claim 1, wherein The determining the dynamic voltage according to the first voltage, the second voltage, the third voltage, and the fourth voltage includes: Obtaining a first weight coefficient of the first voltage, a second weight coefficient of the second voltage, a third weight coefficient of the third voltage, and a fourth weight coefficient of the fourth voltage; The dynamic voltage is calculated according to the first voltage, the first weight coefficient, the second voltage, the second weight coefficient, the third voltage, the third weight coefficient, the fourth voltage, and the fourth weight coefficient.

5. A dynamic voltage determination system for an LPDDR chip, characterized in that: include: The first module is used to obtain the process parameters of the LPDDR chip; A second module is configured to determine a parameter type according to the process parameter, wherein the parameter type represents a type of the process parameter; The third module is used to determine the DVFSC mode of the LPDDR chip according to the parameter type and the preset data table; The fourth module is used to determine the dynamic voltage of the LPDDR chip according to the DVFSC mode, the preset data table and the process parameters, specifically including: determining the target entry in the preset data table based on the DVFSC mode, obtaining the first voltage corresponding to the first type of the process parameter in the target entry, obtaining the second voltage corresponding to the second type of the process parameter in the target entry, obtaining the third voltage corresponding to the third type of the process parameter in the target entry, obtaining the fourth voltage corresponding to the fourth type of the process parameter in the target entry, and determining the dynamic voltage according to the first voltage, the second voltage, the third voltage and the fourth voltage, wherein the dynamic voltage represents the voltage preset according to different process parameters.

6. A memory testing device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the method according to any one of claims 1 to 4.

7. A computer-readable storage medium storing a program executable by a processor, characterized in that: The processor-executable program is used to perform the method according to any one of claims 1 to 4 when executed by the processor.

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