General decoupling IP unit for radio frequency microsystem

Abstract

The invention discloses a general decoupling IP unit for a radio frequency microsystem. The general decoupling IP unit comprises a compound-based radio frequency core particle, a silicon-based cavity, a silicon-based sealing cap, a TSV, Hot Via, an RDL, an IPD and a BGA, according to the invention, a radio frequency microsystem and a core particle manufacturing process are decoupled, an IP unit is in a silicon-based sealing cap single core particle packaging form, an external interconnection interface is unified as a BGA array, and the realization difficulty of a radio frequency microsystem packaging process is reduced; the electromagnetic compatibility of the radio frequency microsystem and the core particles is decoupled, so that the electromagnetic compatibility realization difficulty of the radio frequency microsystem is reduced; and the external interface layout of the IP unit further adapts to the design of the microsystem, so that the design difficulty of the radio frequency microsystem is reduced, and the design efficiency is greatly improved. The method has high innovativeness and engineering practicability, and has great significance in design and manufacturing of a radio frequency microsystem. The invention is suitable for a radio frequency microsystem with a DC-40GHz frequency band.

Description

Technical Field

[0001] The present invention belongs to the technical field of radio frequency microsystems, and in particular relates to a universal decoupling IP unit of a radio frequency microsystem. Background Art

[0002] For decades, Moore's Law has charted the course for the semiconductor industry, with successive generations of integrated circuits achieving higher transistor density and lower unit costs. New silicon process nodes are constantly being introduced, but the pace of Moore's Law has slowed compared to historical rates. The challenges facing the semiconductor industry are not just waiting longer for more transistors, but also growing design complexity and manufacturing costs.

[0003] Chiplet-based integration technology has attracted attention from the semiconductor industry as a solution that can continue Moore's Law. This technology divides the traditional system-level chip into multiple single-function or multi-function combination chips, and then interconnects them through a substrate in a package to form a complete complex function chip. Currently, industry giants such as AMD, Intel, TSMC, HiSilicon Semiconductor, and Xilinx have released products based on chiplet technology. In the future, chips such as CPU, GPU, DPU, FPGA, ADC / DAC, high-bandwidth memory, hardware accelerators, and high-speed interconnect interfaces are expected to be quickly integrated using chiplet technology to improve chip performance, increase product flexibility, and reduce chip time to market.

[0004] Chiplet technology has the following main advantages:

[0005] ① The processes of memory, digital logic, analog, RF, silicon photonics and other chips are different, and the speed of process size reduction is also different. Chiplet integration technology can meet the heterogeneous integration requirements of these devices under different processes;

[0006] ② In the chip design method based on chiplets, the yield rate can be improved because the area of ​​a single chip is reduced, thereby reducing the manufacturing cost of the chip;

[0007] ③ Chiplet can be reused in different products, reducing product launch time;

[0008] ④Through testing, classify and screen the performance of different chiplets to achieve better chiplet integration combination and product cost-effectiveness control.

[0009] In traditional chip design, there are many different functional units, and some functional units are designed in a modular way to facilitate multiple reuse and reduce design costs. Therefore, in chips designed based on the chiplet architecture, multiple functional units or modular units that are replicated multiple times are designed with multiple separate cores, and finally integrated through advanced packaging technology.

[0010] According to the usage scenarios, chiplet technology is currently mainly used in server processors, artificial intelligence processors, mobile and desktop processors, and other fields. RF microsystems will be one of the potential application areas of chiplet technology in the future, with bright prospects.

[0011] In order to achieve the best electrical performance, the best materials and manufacturing processes are selected according to the functions of the core particles. The physical and chemical properties of different materials vary greatly, which brings many new challenges to the design of RF microsystems, including thermal management design, mechanical stress design, etc., and affects the development of RF microsystem integration architecture and integration process. In addition, when the RF microsystem is integrated in high-density three-dimensional, the impact of the open mixed complex electromagnetic environment of multiple core particles on the overall electromagnetic compatibility of the RF microsystem cannot be ignored. In the existing technology, the RF microsystem is coupled with the core particle manufacturing process and coupled with the electromagnetic compatibility of the core particle. The integrated architecture and integration process of the RF microsystem are mismatched with the interface layout of the core particle. Summary of the invention

[0012] Purpose of the invention: The purpose of the present invention is to provide a universal decoupled IP unit for a radio frequency microsystem. The present invention decouples the radio frequency microsystem from the chip manufacturing process. The IP unit is a silicon-based capped single chip packaging form, and the external interconnection interface is unified as a BGA array, which reduces the difficulty of implementing the radio frequency microsystem packaging process; the radio frequency microsystem is decoupled from the electromagnetic compatibility of the chip, which reduces the difficulty of implementing the electromagnetic compatibility of the radio frequency microsystem; the external interface layout of the IP unit is further adapted to the microsystem design, which reduces the difficulty of radio frequency microsystem design and greatly improves the design efficiency. The present invention has strong innovation and engineering practicality, and is of great significance to the design and manufacture of radio frequency microsystems. The present invention is suitable for radio frequency microsystems in the DC to 40GHz frequency band.

[0013] Technical solution: A universal decoupling IP unit of a radio frequency microsystem of the present invention comprises a compound-based radio frequency core, a silicon-based cavity, a silicon-based cap, a through silicon via TSV, a thermal via Hot Via, a rewiring RDL, an integrated passive device IPD and a ball grid array BGA; the compound-based radio frequency core, the silicon-based cavity and the silicon-based cap constitute an IP unit package structure; the TSV is arranged inside the silicon-based cavity and the silicon-based cap, and the Hot Via is arranged inside the compound-based radio frequency core, and together serve as a vertical signal transmission medium in the Z direction; the RDL is arranged on the upper and lower end surfaces of the compound-based radio frequency core, the silicon-based cavity and the silicon-based cap, and serves as a signal plane wiring medium in the X and Y directions; the IPD is arranged inside the silicon-based cavity and the silicon-based cap to form an integrated passive device; the BGA is arranged on the lower end surface of the compound-based radio frequency core, and serves as an interconnection medium between the IP unit package and the external substrate, thereby improving the interconnection density of the radio frequency microsystem.

[0014] Furthermore, the compound-based RF core particles, silicon-based cavities and silicon-based caps are stacked in the Z direction through a wafer-level bonding process to form an IP unit packaging structure.

[0015] Furthermore, the compound-based RF core particles include compound semiconductor processes of GaAs, GaN, InP, and SiC.

[0016] Furthermore, the Hot Via is arranged inside the compound-based RF core particle, and the number and layout of the Hot Via are designed according to the requirements of the compound-based RF core particle.

[0017] Furthermore, the TSVs are arranged inside the silicon-based cavity and the silicon-based cap, and the number and layout of the TSVs are designed according to the application scenarios of the compound-based RF chip particles. The number and layout of the TSVs are different for the same chip particles in different application scenarios.

[0018] Furthermore, the RDL is arranged on the upper and lower end surfaces of the compound-based RF core particles, the silicon-based cavity and the silicon-based cap. The number and layout of the RDL are designed according to the application scenarios of the compound-based RF core particles. The number and layout of the RDL are different for the same core particles in different application scenarios.

[0019] Furthermore, the IPD is arranged inside the silicon-based cavity and the silicon-based sealing cap, and is designed according to the application scenario of the compound-based RF core particle.

[0020] Furthermore, the BGA is arranged on the lower end surface of the compound-based RF core particle, and the number and layout of the BGA are designed according to the application scenario of the compound-based RF core particle. The number and layout of the BGA are different for the same core particle in different application scenarios.

[0021] Beneficial effects: Compared with the prior art, the present invention has the following significant advantages:

[0022] (1) The universal decoupled IP unit of the RF microsystem of the present invention decouples the RF microsystem from the chip manufacturing process. The IP unit is a silicon-based capped single chip packaging form, and the external interconnection interface is transformed from the traditional multi-material and multi-form interface to a unified BGA array, which greatly simplifies the RF microsystem packaging process design, reduces the difficulty of implementing the RF microsystem packaging process, solves the pain points of the traditional RF microsystem packaging process, shortens the iteration cycle, is conducive to the rapid launch of products, seizes market opportunities, and is suitable for large-scale promotion in engineering.

[0023] (2) The universal decoupling IP unit of the RF microsystem of the present invention decouples the electromagnetic compatibility of the RF microsystem and the chip, and transforms the internal electromagnetic compatibility environment of the RF microsystem from the traditional open mixed complex electromagnetic environment of multiple chip particles into a silicon-based capped single chip packaged closed single electromagnetic environment, which greatly simplifies the electromagnetic compatibility design of the RF microsystem, reduces the difficulty of achieving the electromagnetic compatibility of the RF microsystem, and solves the pain points of the complex electromagnetic compatibility design of the traditional RF microsystem, and is highly innovative.

[0024] (3) The universal decoupling IP unit of the RF microsystem of the present invention is further adapted to the RF microsystem integration architecture and integration process on the basis of the traditional chip interface layout, which is more in line with the overall design requirements of the microsystem. It can be reused from design to process, which reduces the difficulty of RF microsystem design and solves the pain point of mismatch between chip and microsystem in traditional RF microsystem design. It greatly improves the design efficiency, has strong engineering practicality, and is suitable for large-scale promotion in engineering. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is an overall top view of a universal decoupling IP unit for a radio frequency microsystem.

[0026] Figure 2 It is an overall bottom view of a universal decoupling IP unit for a radio frequency microsystem.

[0027] Figure 3 It is an overall side view of a universal decoupling IP unit for a radio frequency microsystem.

[0028] Figure 4 It is a schematic diagram of a compound-based RF chip of a universal decoupling IP unit of an RF microsystem, where (a) is a top view and (b) is a bottom view.

[0029] Figure 5 It is a schematic diagram of a silicon-based cavity of a universal decoupling IP unit for a radio frequency microsystem.

[0030] Figure 6The figure is a schematic diagram of a silicon-based sealing cap of a universal decoupling IP unit of a radio frequency microsystem, wherein (a) is a top view and (b) is a bottom view.

[0031] Figure 7 It is a TSV schematic diagram of a universal decoupled IP unit for a radio frequency microsystem.

[0032] Figure 8 It is a Hot Via schematic diagram of a universal decoupled IP unit of a radio frequency microsystem.

[0033] Fig. 9 It is an RDL schematic diagram of a universal decoupling IP unit for a radio frequency microsystem.

[0034] Fig.10 It is an IPD schematic diagram of a universal decoupling IP unit for a radio frequency microsystem.

[0035] Fig.11 It is a BGA schematic diagram of a universal decoupling IP unit for RF microsystems.

[0036] Fig.12 It is a schematic diagram of electromagnetic compatibility decoupling of a universal decoupling IP unit of a radio frequency microsystem.

[0037] Among them, the figure numbers are explained as follows: 1-compound-based RF core particle, 2-silicon-based cavity, 3-silicon-based cap, 4-TSV, 5-Hot Via, 6-RDL, 7-IPD, 8-BGA. DETAILED DESCRIPTION

[0038] The technical solution of the present invention is further described below in conjunction with the accompanying drawings.

[0039] Combination Figure 1 to Figure 3 A universal decoupling IP unit for a radio frequency microsystem provided by the present invention is composed of 8 parts, including a compound-based radio frequency core particle 1, a silicon-based cavity 2, a silicon-based sealing cap 3, TSV 4, Hot Via 5, RDL 6, IPD 7, and BGA 8.

[0040] like Figure 4 As shown in (a) and (b), a universal decoupling IP unit of a radio frequency microsystem of the present invention has a lower layer based on a compound-based radio frequency core particle 1 to realize an IP unit package base structure, and the compound-based radio frequency core particle 1 includes but is not limited to compound semiconductor processes such as GaAs, GaN, InP, and SiC.

[0041] like Figure 5 As shown, a universal decoupled IP unit of a radio frequency microsystem of the present invention adopts a silicon-based cavity 2 in the middle layer to realize the cavity structure of the IP unit package.

[0042] like Figure 6As shown in (a) and (b), a universal decoupling IP unit of a radio frequency microsystem of the present invention adopts a silicon-based sealing cap 3 on the upper layer to realize the IP unit package cap structure.

[0043] like Figure 7 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention, TSV4 is arranged inside a silicon-based cavity 2 and a silicon-based sealing cap 3, and serves as a vertical signal transmission medium in the Z direction.

[0044] like Figure 8 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention, Hot Via5 is arranged inside the compound-based radio frequency core particle 1, serving as a vertical signal transmission medium in the Z direction.

[0045] like Fig. 9 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention, RDL6 is arranged on the upper and lower end surfaces of a compound-based radio frequency core particle 1, a silicon-based cavity 2 and a silicon-based sealing cap 3, serving as a signal plane wiring medium in the X and Y directions.

[0046] like Fig.10 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention, IPD7 is arranged inside a silicon-based cavity 2 and a silicon-based sealing cap 3 to form an integrated passive device.

[0047] like Fig.11 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention, BGA8 is arranged on the lower end surface of the compound-based radio frequency core particle 1, serving as an interconnection medium between the IP unit package and the external substrate, thereby improving the interconnection density of the radio frequency microsystem.

[0048] like Fig.12 As shown, a universal decoupling IP unit of a radio frequency microsystem of the present invention decouples the electromagnetic compatibility of the radio frequency microsystem from that of the chip, thereby reducing the difficulty of achieving the electromagnetic compatibility of the radio frequency microsystem.

[0049] The present invention provides a universal decoupling IP unit for a radio frequency microsystem, which creatively uses silicon-based three-dimensional integration technology for decoupling, and includes: a compound-based radio frequency core particle 1, a silicon-based cavity 2, a silicon-based sealing cap 3, TSV 4, Hot Via 5, RDL 6, IPD 7 and BGA 8, to achieve multiple functions: (1) the compound-based radio frequency core particle 1, the silicon-based cavity 2 and the silicon-based sealing cap 3 are stacked in the Z direction through a wafer-level bonding process to form an IP unit packaging structure; (2) TSV 4 is arranged inside the silicon-based cavity 2 and the silicon-based sealing cap 3, and serves as a signal vertical transmission medium in the Z direction; (3) Hot Via 5, RDL 6, IPD 7 and BGA 8 are used ... to form an IP unit packaging structure; ( Via5 is arranged inside the compound-based RF chip 1 as a vertical signal transmission medium in the Z direction; (4) RDL6 is arranged on the upper and lower surfaces of the compound-based RF chip 1, the silicon-based cavity 2 and the silicon-based cap 3 as a signal plane wiring medium in the X and Y directions; (5) IPD7 is arranged inside the silicon-based cavity 2 and the silicon-based cap 3 to form an integrated passive device; (6) BGA8 is arranged on the lower surface of the compound-based RF chip 1 as an interconnection medium between the IP unit package and the external substrate, thereby improving the interconnection density of the RF microsystem; (7) The RF chip 1 includes but is not limited to compound semiconductor processes such as GaAs, GaN, InP, and SiC. The RF microsystem is decoupled from the chip manufacturing process. The IP unit is a silicon-based capped single chip packaging form, and the external interconnection interface is converted into a unified BGA array, which reduces the difficulty of implementing the RF microsystem packaging process; (8) The RF microsystem and the chip electromagnetic compatibility are decoupled, which reduces the difficulty of implementing the RF microsystem electromagnetic compatibility; (9) The external interface layout of the IP unit is further adapted to the microsystem design, which reduces the difficulty of RF microsystem design and greatly improves the design efficiency. The present invention has strong innovation and engineering practicality, and is of great significance to the design and manufacture of RF microsystems. The present invention is suitable for RF microsystems in the DC to 40GHz frequency band.

Claims

1. A universal decoupling IP unit for a radio frequency microsystem, characterized in that: It includes a compound-based RF core, a silicon-based cavity, a silicon-based cap, a through silicon via TSV, a thermal via Hot Via, a rewiring RDL, an integrated passive device IPD and a ball grid array BGA; the compound-based RF core, the silicon-based cavity and the silicon-based cap constitute an IP unit package structure; the TSV is arranged inside the silicon-based cavity and the silicon-based cap, and the Hot Via is arranged inside the compound-based RF core, and together they serve as a vertical signal transmission medium in the Z direction; the RDL is arranged on the upper and lower end surfaces of the compound-based RF core, the silicon-based cavity and the silicon-based cap, and serves as a signal plane wiring medium in the X and Y directions; the IPD is arranged inside the silicon-based cavity and the silicon-based cap to form an integrated passive device; the BGA is arranged on the lower end surface of the compound-based RF core, and serves as an interconnection medium between the IP unit package and an external substrate.

2. A universal decoupling IP unit for a radio frequency microsystem according to claim 1, characterized in that: The compound-based RF core particles, silicon-based cavities and silicon-based sealing caps are stacked in the Z direction through a wafer-level bonding process to form an IP unit packaging structure.

3. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The compound-based RF core particles include compound semiconductor processes of GaAs, GaN, InP, and SiC.

4. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The Hot Via is arranged inside the compound-based RF core particle, and the number and layout of the Hot Via are designed according to the requirements of the compound-based RF core particle.

5. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The TSVs are arranged inside the silicon-based cavity and the silicon-based cap. The number and layout of the TSVs are designed according to the application scenarios of the compound-based RF core particles. The number and layout of the TSVs are different for the same core particles in different application scenarios.

6. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The RDL is arranged on the upper and lower end surfaces of the compound-based RF core particles, the silicon-based cavity and the silicon-based cap. The number and layout of the RDL are designed according to the application scenarios of the compound-based RF core particles. The number and layout of the RDL are different for the same core particles in different application scenarios.

7. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The IPD is arranged inside the silicon-based cavity and the silicon-based sealing cap, and is designed according to the application scenario of the compound-based RF core particle.

8. The universal decoupling IP unit of a radio frequency microsystem according to claim 1, characterized in that: The BGA is arranged on the lower end surface of the compound-based RF core particle. The number and layout of the BGA are designed according to the application scenario of the compound-based RF core particle. The number and layout of the BGA are different in different application scenarios for the same core particle.

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