Mutual inductor wiring state detection circuit and method

Abstract

The invention discloses a mutual inductor wiring state detection circuit and method, and belongs to the technical field of power system protection and measurement and control, the mutual inductor wiring state detection circuit is characterized by comprising a phase sequence identification detection circuit and a pole identification detection circuit; the phase sequence identification detection circuit comprises a first input filtering module, a first zero crossing point detection module and a phase sequence identification logic circuit which are connected in sequence; the polarity identification detection circuit comprises a second input filter circuit, a phase shift module, a second zero crossing point detection module and a polarity identification logic circuit which are connected in sequence; phase sequence identification of a three-phase voltage signal and polarity identification of a three-phase current transformer can be rapidly and accurately realized, and a level signal is directly output as a detection result.

Description

Technical Field

[0001] The invention belongs to the technical field of power system protection and measurement and control, and in particular relates to a transformer connection state detection circuit and method. Background Art

[0002] Protection devices are commonly used in power systems to detect the operating status of lines. When a fault occurs, the fault can be cleared in time to prevent the fault from expanding and affecting other normally operating lines.

[0003] The electrical status of the line is collected through voltage sensors and current sensors, which convert the primary high voltage and high current signals into weak voltage signals that can be used by the protection device. The power system adopts AC three-phase power supply, and voltage transformers and current transformers are installed on each phase sequence. When the three-phase transformer is connected to the primary electrical line, and during the connection between the transformer output and the protection device, errors such as three-phase wiring errors, transformer installation or reverse wiring often occur, resulting in signal errors that cause the equipment to fail to operate accurately.

[0004] Therefore, protection devices are generally required to have phase sequence recognition and transformer polarity recognition functions, and can give an alarm signal in time when an error is found, and can be corrected through software. At present, software algorithms are generally used in protection devices for judgment, but this will greatly increase the software's computing workload, increase the processor's load and power consumption, and affect the system's operating efficiency. Summary of the invention

[0005] The present invention provides a hardware-based transformer wiring state detection circuit and method, which can quickly and accurately realize the phase sequence recognition of three-phase voltage signals and the polarity recognition of three-phase current transformers, and directly output a level signal as a detection result.

[0006] In order to achieve the above object, the present invention adopts the following technical solution: A transformer connection state detection circuit, comprising a phase sequence identification detection circuit and a pole identification detection circuit; The phase sequence identification detection circuit includes a first input filter module, a first zero-crossing detection module and a phase sequence identification logic circuit connected in sequence; the polarity identification detection circuit includes a second input filter circuit, a phase shift module, a second zero-crossing detection module and a polarity identification logic circuit connected in sequence; The first zero-crossing detection module is used to convert the three-phase voltage signal output by the first input filtering module into a first three-phase voltage square wave signal; the phase sequence identification logic circuit is used to perform phase sequence logic judgment according to the first three-phase voltage square wave signal and output a phase sequence identification state signal; The phase shift module is used to shift the three-phase voltage signals output by the first input filter module by 90 degrees respectively to obtain the three-phase voltage signals after phase shift; the second zero-crossing detection module is used to convert the three-phase voltage signals after phase shift and the three-phase current signals output by the second input filter circuit into second three-phase voltage square wave signals and third-phase current square wave signals; the polarity identification logic circuit is used to perform logical judgment based on the second and third-phase voltage square wave signals and the three-phase current square wave signals, and output a polarity identification status signal.

[0007] Furthermore, the first input filter module includes three input filter circuits, and the input filter circuits are second-order active low-pass filter circuits.

[0008] Furthermore, the input filter circuit includes an operational amplifier A1, a resistor R1, a resistor R2, a resistor R7, a resistor R8, a capacitor C1 and a capacitor C2; the first end of the resistor R1 is grounded, and the second end is connected to the first end of the resistor R2 and the inverting input end of the operational amplifier A1, the second end of the resistor R2 is connected to the output end of the operational amplifier A1, the first end of the resistor R7 is connected to the input voltage signal, and the second end is connected to the first end of the resistor R8 and the first end of the capacitor C1, the second end of the resistor R8 is connected to the first end of the capacitor C2 and the non-inverting input end of the operational amplifier A1, the second end of the capacitor C1 is connected to the output end of the operational amplifier A1, and the second end of the capacitor C2 is grounded.

[0009] Furthermore, the cut-off frequency of the filter circuit is 100 Hz.

[0010] Furthermore, the first zero-crossing detection module includes three zero-crossing detection circuits, and the second zero-crossing detection module includes six zero-crossing detection circuits; the zero-crossing detection circuit includes an operational amplifier A3, a resistor R5, a resistor R6 and a resistor R10; the first end of the resistor R5 is connected to the voltage signal, the second end is connected to the first end of the resistor R6 and the non-phase input end of the operational amplifier A3, the second end of the resistor R6 is connected to the output end of the operational amplifier A3, the first end of the resistor R10 is grounded, and the second end is connected to the inverting input end of the operational amplifier A1.

[0011] Furthermore, the hysteresis interval ratio of the zero-crossing detection circuit is 1:100.

[0012] Furthermore, the phase sequence identification logic circuit includes a D trigger U1, a D trigger U2, an inverter U3 and an AND gate circuit U8, the input ends of the D trigger U1 and the D trigger U2 are connected to the output end of the first zero-crossing detection module, the input end of the inverter U3 is connected to the output end of the first zero-crossing detection module, and the output end is connected to the input end of the D trigger U2; the output ends of the D trigger U1 and the D trigger U2 are connected to the input end of the gate circuit U8.

[0013] Furthermore, the polarity identification logic circuit includes a D flip-flop U4, a D flip-flop U5, a D flip-flop U6 and an AND gate circuit U7, wherein the D flip-flop U4, the D flip-flop U5 and the D flip-flop U6 are connected to the output ends of the phase shift module and the second zero crossing detection module, and the output ends of the D flip-flop U4, the D flip-flop U5 and the D flip-flop U6 are all connected to the input end of the AND gate circuit U7.

[0014] A method for detecting a current transformer connection state based on the current transformer connection state detection circuit comprises the following steps: The three-phase voltage signal is input into the first zero-crossing detection module, and the first zero-crossing detection module converts the three-phase voltage signal into a square wave signal; the phase sequence recognition logic circuit performs phase sequence logic judgment according to the square wave signal and outputs a phase sequence recognition state signal; The three-phase voltage signal is input into the phase shift module, and the phase shift module performs phase shift on the three-phase voltage signal respectively, and the three-phase voltage signal is phase shifted by 90 degrees respectively to obtain the three-phase voltage signal after phase shift; Inputting the phase-shifted three-phase voltage signal and the three-phase current signal into the second zero-crossing detection module to obtain the phase-shifted three-phase voltage square wave signal and the three-phase current square wave signal; The polarity identification logic circuit performs logic judgment according to the phase-shifted three-phase voltage square wave signal and the three-phase current square wave signal, and outputs a polarity identification state signal.

[0015] Furthermore, before the three-phase voltage signal is subjected to phase shifting and zero-crossing detection, the three-phase voltage signal is filtered, and before the three-phase current signal is subjected to zero-crossing detection, the three-phase current signal is filtered.

[0016] Compared with the prior art, the present invention has at least the following beneficial technical effects: The state recognition circuit proposed in the present invention includes a filtering module, a phase shifting module, a zero-crossing detection module, a phase sequence recognition logic circuit and a polarity recognition logic circuit. The logic circuit is used to identify the phase sequence of the three-phase voltage signal and the polarity of the three-phase current transformer. The circuit can be integrated into the protection device or used as a detection module externally. The protection device can collect the state through external remote signaling and can be used to update and transform existing equipment that does not have this function.

[0017] Furthermore, the voltage signals in the phase sequence identification circuit and the polarity identification circuit share an input filter circuit, which simplifies the circuit structure, improves the circuit's operating efficiency, and reduces the time delay of signal processing.

[0018] Furthermore, the cutoff frequency of the input filter circuit is 100 Hz, which reduces the influence of high-frequency interference signals and harmonic content on the accuracy of zero-crossing detection.

[0019] Furthermore, the hysteresis interval ratio of the zero-crossing detection circuit is 1:100, so as to avoid phase shift caused by too large a hysteresis range, which affects the accuracy of phase recognition and polarity recognition.

[0020] The state recognition method proposed in the present invention is based on the above-mentioned state recognition circuit, uses a logic circuit to identify the phase sequence of the three-phase voltage signal and the polarity of the three-phase current transformer, and directly outputs a level signal as a detection result. It does not require software calculation, does not increase the load on the processor, and ensures the operating efficiency of the system.

[0021] Furthermore, before performing phase shifting and zero-crossing detection, the input voltage and current signals are amplified and conditioned by an input filter circuit to filter out high-frequency interference signals, especially interference generated by harmonic content at the zero-crossing point, to avoid multiple conversions at the zero-crossing point. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the state recognition circuit; Figure 2 It is a phase sequence identification circuit; Figure 3 It is a polarity identification circuit; Figure 4 It is the input filter circuit; Figure 5 It is the principle diagram of phase shift circuit; Figure 6 Output waveform for zero-crossing detection circuit; Figure 7 It is a zero-crossing detection circuit; Figure 8 It is a three-phase alternating current waveform diagram; Fig. 9 This is the schematic diagram of the phase sequence identification module; Fig.10 This is the schematic diagram of the polarity recognition module. DETAILED DESCRIPTION

[0023] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

[0024] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0025] It should be noted that when an element is referred to as being "disposed on" another element, it may be directly on the other element or there may be another element centered thereon. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be another element centered thereon at the same time. The terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inside", "outside", etc. used herein indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0027] Example 1 The transformer wiring state detection circuit comprises two parts: a phase sequence identification detection circuit and a pole identification detection circuit.

[0028] Reference Figure 1 and Figure 2 The phase sequence identification detection circuit is composed of three parts, namely, a first input filter module, a first zero-crossing detection module and a phase sequence identification logic circuit, which are connected in sequence. The first input filter module includes a first input filter circuit, a second input filter circuit and a third input filter circuit, and the first zero-crossing detection module includes first to third zero-crossing detection circuits.

[0029] The three-phase voltages UA, UB and UC enter the first input filter circuit, the second input filter circuit and the third input filter circuit respectively, and low-pass filtering is performed on the three-phase voltage signals to filter out high-frequency interference signals and high-order harmonic signals to avoid affecting the accuracy of zero-crossing point detection; the first to third zero-crossing point detection circuits are used to determine the zero-crossing point of the three-phase voltage signal and convert the sinusoidal wave signal into a square wave signal; the phase sequence identification logic circuit performs phase sequence logic judgment based on the square wave signal output by the zero-crossing point detection circuit, and outputs a phase sequence identification status signal.

[0030] Reference Figure 1 and Figure 3The polarity identification detection circuit is composed of four parts, which are connected in sequence: a second input filter circuit, a phase shift module, a second zero-crossing detection module and a polarity identification logic circuit. The second input filter circuit includes the first to sixth filter circuits, the phase shift module includes the first to third phase shift circuits, and the second zero-crossing detection module includes the fourth to ninth zero-crossing detection circuits.

[0031] The three-phase voltage signal is low-pass filtered by the first to third input filter circuits, and the three-phase current signal is low-pass filtered by the fourth to sixth input filter circuits respectively, to filter out high-frequency interference signals and high-order harmonic signals to avoid affecting the accuracy of zero-crossing point detection; the first phase shift circuit, the second phase shift circuit and the third phase shift circuit respectively perform phase shift processing on the three-phase voltage signal, and shift the three-phase voltage signal by 90 degrees for subsequent polarity identification and judgment; the fourth to ninth zero-crossing point detection circuits are used to judge the zero-crossing points of the three-phase voltage signal and the three-phase current signal, and convert the sine wave signal into a square wave signal; the polarity identification logic circuit performs logic judgment according to the voltage and current square wave signals of the square wave output by the fourth to ninth zero-crossing point detection circuits, and outputs a polarity identification state signal; To simplify the circuit, the voltage signals in the phase sequence identification circuit and the polarity identification circuit can share an input filter circuit.

[0032] The following is a detailed description of each circuit 1) Input filter circuit The input filter circuit amplifies and conditions the input voltage and current signals, filters out high-frequency interference signals, especially the interference caused by harmonic content at the zero crossing point, and avoids multiple conversions at the zero crossing point. The schematic diagram of the input filter circuit is as follows.

[0033] Figure 4 The circuit shown is a second-order active low-pass filter circuit, which has the functions of low-pass filtering and signal amplification, and can improve the accuracy of the zero-crossing point.

[0034] The second-order active low-pass filter circuit includes an operational amplifier A1, a resistor R1, a resistor R2, a resistor R7, a resistor R8, a capacitor C1 and a capacitor C2. The first end of the resistor R1 is grounded, the second end is connected to the first end of the resistor R2 and the inverting input end of the operational amplifier A1, the second end of the resistor R2 is connected to the output end of the operational amplifier A1, the first end of the resistor R7 is connected to the input voltage signal, the second end is connected to the first end of the resistor R8 and the first end of the capacitor C1, the second end of the resistor R8 is connected to the first end of the capacitor C2 and the non-inverting input end of the operational amplifier A1, the second end of the capacitor C1 is connected to the output end of the operational amplifier A1, and the second end of the capacitor C2 is grounded.

[0035] To simplify the calculation, in general, R7=R8=R; C1=C2=C.

[0036] Cut-off frequency of the filter circuit: In this circuit, in order to reduce the influence of high-frequency interference signals and harmonic content on the accuracy of zero-crossing detection, the cut-off frequency f is set to 100Hz.

[0037] Amplification factor of filter circuit: , can be determined according to the amplitude of the input signal and the input range of the op amp. In this circuit, in order to improve the accuracy of zero-crossing detection, the current signal filter circuit does not need to consider the saturation of the op amp output, and the amplification factor A can be set to a larger value, but considering the gain parameter of the op amp, the amplification factor in this circuit is set to 20 times. Since the voltage signal also needs to be phase-shifted, the output signal cannot be saturated, and the discharge multiple of the voltage filter circuit needs to be determined according to the amplitude of the input signal and the input range of the op amp.

[0038] 2) Phase shift circuit The phase shift circuit performs phase shift processing on the input voltage signal, and outputs the phase-shifted voltage signal for polarity recognition logic judgment.

[0039] The phase shift circuit includes an operational amplifier A2, a resistor R3, a resistor R4, a resistor R9, and a capacitor C3. The first end of the resistor R3 is grounded, the second end is connected to the first end of the resistor R4 and the inverting input end of the operational amplifier A2, the second end of the resistor R4 is connected to the output end of the operational amplifier A2, the first end of the resistor R9 is connected to the input voltage signal, the second end is connected to the non-inverting input end of the operational amplifier A1 and the first end of the capacitor C3, and the second end of the capacitor C3 is grounded. Figure 5 The circuit shown is an active phase shift circuit, which has the functions of signal phase shifting and amplification. The phase shift angle and amplification factor can be set through the peripheral circuit. A2 in the circuit is an operational amplifier.

[0040] Phase shift angle of phase shift circuit In this circuit, R9=100K, C3=1uF, the phase shift angle is -88°, that is, the output signal lags the input by 88°. When the designed output signal lags the input by 88°, the phase shift requirement of 90° can be met.

[0041] Circuit magnification: Since the RC phase shift circuit will attenuate the signal, the signal needs to be amplified. The amplification factor A is determined according to the amplitude of the input signal and the input range of the op amp. In this circuit, when the amplification factor A=30, the output signal can be made substantially equal to the input signal amplitude. In order to improve the accuracy of the post-stage zero-crossing point detection, there is no need to consider the saturation of the op amp output. The amplification factor A can be set to a larger value. In this circuit, it can be designed as 100 times.

[0042] 3) Zero-crossing detection circuit The function of the zero-crossing detection circuit is to extract the zero-crossing point from the sine wave signal and convert it into a square wave signal with the same phase as the sine wave signal, which is used for the polarity recognition logic judgment of the subsequent stage, such as Figure 6 As shown, vi is the input sinusoidal wave signal, and vo is the square wave signal output by the zero-crossing detection circuit.

[0043] Figure 7 The zero-crossing detection circuit shown is implemented using a hysteresis voltage comparator circuit. When the input signal is greater than zero, the output is a high level; when the input signal is less than zero, the output is a low level. A3 in the circuit is a high-precision comparator.

[0044] Reference Figure 7 The zero-crossing detection circuit includes an operational amplifier A3, a resistor R5, a resistor R6 and a resistor R10. The first end of the resistor R5 is connected to the voltage signal, the second end is connected to the first end of the resistor R6 and the non-inverting input end of the operational amplifier A3, the second end of the resistor R6 is connected to the output end of the operational amplifier A3, the first end of the resistor R10 is grounded, and the second end is connected to the inverting input end of the operational amplifier A1.

[0045] In order to increase the rising speed of the output signal and avoid repeated changes in the output caused by signal fluctuations at the zero point of the input signal, the sampling hysteresis voltage comparison method is used. By changing R6 and R5, the range of the hysteresis voltage can be adjusted. In this circuit, in order to ensure the accuracy of the zero point and avoid phase shift caused by a large hysteresis range, which affects the accuracy of phase recognition and polarity recognition, the hysteresis range ratio is selected as 1:100, that is, R5:R6≈1:100.

[0046] 4) Phase sequence identification logic circuit The phase sequence recognition logic circuit is the key to this patent. According to the characteristics of three-phase AC sinusoidal electrical, each phase differs by 120 degrees. The A, B, and C three-phase voltage waveforms in the positive phase sequence are as follows: Fig. 9 shown.

[0047] According to the characteristics of the above three-phase waveform, with the B-phase voltage as the reference, the voltage polarity of the C-phase voltage is collected when the falling edge of the B-phase voltage passes through the zero point. When the three-phase voltage is in the positive sequence, the C-phase is at a high level; the voltage polarity of the A-phase voltage is collected when the rising edge of the B-phase voltage passes through the zero point. When the three-phase voltage is in the positive sequence, the A-phase is at a high level. If both the A-phase and the C-phase are detected to be high levels, the three-phase voltage is in the positive sequence, otherwise it is in the negative sequence.

[0048] In order to realize the acquisition method of the above-mentioned level polarity, a D logic trigger circuit is used to realize the above-mentioned function. The D trigger is a logic circuit that collects input signals on the rising edge and maintains the state, where D is the input signal, CLK is the clock input signal of the trigger, and Q is the output signal. At the rising edge of CLK, if the input is 1, the output value is 1; if the input is 0, the output value is 0. At the falling edge and other fixed levels, the output value remains unchanged.

[0049] According to this principle, the following phase sequence identification circuit is designed. Fig. 9 shown.

[0050] Reference Fig. 9 The phase sequence identification logic circuit includes an inverter U3, a D flip-flop U1, a D flip-flop U2 and an AND gate circuit U8, wherein the D input terminal of the D flip-flop U1 is connected to the output terminal of the operational amplifier A3 in the first zero-crossing detection circuit, and the CLK input terminal of the D flip-flop U1 is connected to the output terminal of the operational amplifier A3 in the second zero-crossing detection circuit; The input end of the inverter U3 is connected to the output end of the operational amplifier A3 in the second zero-crossing detection circuit, the output end of the inverter U3 is connected to the CLK input end of the D flip-flop U2, and the D input end of the D flip-flop U2 is connected to the output end of the operational amplifier A3 in the third zero-crossing detection circuit; The output port of the D flip-flop U1 and the output port of the D flip-flop U2 are respectively connected to two input ports of the AND gate circuit U8, and the output end of the AND gate circuit U8 is the output end of the phase sequence identification circuit.

[0051] Fig. 9 In the phase sequence identification circuit shown, the B-phase square wave signal Dub is used as a clock signal and is directly input into the CLK input terminal of the trigger U1, and the A-phase square wave signal is input into the D input terminal of the D trigger U1; the B-phase square wave signal is level-inverted by the inverter U3 and then input into the CLK input terminal of the D trigger U2, and the C-phase square wave signal is input into the D input terminal of the D trigger U2; the output signals of the D trigger U1 and the D trigger U2 enter the signal input terminal of the AND gate circuit U8.

[0052] The trigger U1 collects the level state of the A-phase square wave signal at the rising edge of the B-phase square wave signal, outputs it and holds it; the trigger U2 collects the level state of the C-phase square wave signal at the falling edge of the B-phase square wave signal, outputs it and holds it; the signal output by the trigger U1 and the signal output by the trigger U2 enter the AND gate circuit U8 for logical AND operation, and outputs the phase sequence identification result. When the outputs of U1 and U2 are both high level, the output of the AND gate circuit U8 is high level, indicating that the three-phase voltage is in positive phase sequence; when the output of the AND gate circuit U8 is low level, it indicates that the three-phase voltage is in negative phase sequence.

[0053] 5) Polarity recognition logic circuit The phase sequence identification logic circuit is also the key to this patent, which is used to determine whether the installation direction of the transformer and the wiring of the current transformer are correct. In the power system, the flow direction is used to indicate the transmission direction of the electric power on the line. When the flow direction is positive, the power factor of the line is greater than zero; when the flow direction is reverse, the power factor of the line is less than zero.

[0054] Under normal operating conditions, the power line is generally in the positive direction, so the power factor collected by the protection device is greater than 0 and less than 1, that is, the phase difference between voltage and current is less than 90 degrees. If the monitored phase difference is greater than 90 degrees, the line flow may be reversed, or the polarity of the transformer may be reversed.

[0055] This polarity identification circuit recognizes and judges the polarity of the transformer according to the phase difference between the voltage signal and the current signal. When the phase difference between the detected voltage and the current is less than 90 degrees, a high-level signal is output, indicating that the polarity is normal; when the phase difference between the detected voltage and the current is greater than 90 degrees, a low-level signal is output, indicating that the polarity is abnormal.

[0056] Based on the above principle, at the peak value of the voltage signal (i.e. 90 degrees), the polarity of the current signal is collected. If the phase difference between the current signal and the voltage signal is less than 90 degrees, the current signal collected at this time is positive polarity; if the phase difference between the current signal and the voltage signal is greater than 90 degrees, the current signal collected at this time is negative polarity; In order to realize the acquisition of current signal at 90 degrees, the above-mentioned phase shift circuit is used to shift the phase of the voltage signal by 90 degrees, and then the above-mentioned zero-crossing detection circuit is used to collect the zero-crossing point, and the square wave signal is output for the trigger signal of the subsequent trigger circuit. The phase of this square wave signal lags behind the voltage signal by 90 degrees, and when the voltage signal is 90 degrees, the rising edge signal is output. The voltage square wave signal and the current square wave signal with a phase shift of 90 degrees enter the polarity recognition circuit for judgment.

[0057] The schematic diagram of polarity recognition logic circuit is as follows Fig.10 As shown, it includes a D flip-flop U4, a D flip-flop U5, a D flip-flop U6 and an AND gate circuit U7, the D input terminal of the D flip-flop U4 is connected to the output terminal of the operational amplifier A3 in the seventh zero-crossing detection circuit, and the CLK input terminal of the D flip-flop U4 is connected to the output terminal of the operational amplifier A3 in the fourth zero-crossing detection circuit; the D input terminal of the D flip-flop U5 is connected to the output terminal of the operational amplifier A3 in the eighth zero-crossing detection circuit, and the CLK input terminal of the D flip-flop U5 is connected to the output terminal of the operational amplifier A3 in the fifth zero-crossing detection circuit; the D input terminal of the D flip-flop U6 is connected to the output terminal of the operational amplifier A3 in the ninth zero-crossing detection circuit, and the CLK input terminal of the D flip-flop U6 is connected to the output terminal of the operational amplifier A3 in the sixth zero-crossing detection circuit.

[0058] The output port of the D flip-flop U4, the output port of the D flip-flop U5 and the output port of the D flip-flop U6 are respectively connected to the three input ports of the AND gate circuit U7, and the output end of the AND gate circuit U7 is the output end of the polarity recognition logic circuit.

[0059] In the polarity identification logic circuit, D flip-flops U4, D flip-flops U5 and D flip-flops U6 respectively realize the identification of the polarities of the three-phase inductors A, B and C; the three-input AND gate circuit U7 performs a logic AND operation on the three-phase polarity detection results.

[0060] The principle and characteristics of the D flip-flop have been introduced above, so I will not repeat them here. Here, we will take phase A as an example to illustrate the principle of polarity recognition.

[0061] The phase-shifted A-phase voltage square wave signal Dua' is used as a clock signal and input to the CLK input terminal of the trigger U4, and the phase-A current square wave signal DIa is input to the D input terminal of U4; the trigger U4 collects the level state of the phase-A current square wave signal at the rising edge of the phase-shifted A-phase voltage square wave signal Dua', outputs it and holds it. When the polarity of the transformer is normal, the phase difference between the current signal and the voltage signal is less than 90 degrees, and the trigger U4 outputs a high level; when the polarity of the transformer is wrong, the phase difference is greater than 90 degrees, and the trigger U4 outputs a low level.

[0062] The signals output by trigger U4, trigger U5, and trigger U6 enter the AND gate circuit U7 for logic AND operation, and output the phase sequence identification judgment result. When the outputs of trigger U4, trigger U5, and trigger U6 are all high level, the output of AND gate circuit U7 is high level, indicating that the polarity of the three-phase inductor is correct; when the output of AND gate circuit U7 is low level, it indicates that there is a polarity error in the three-phase inductor. If you need to further determine which phase inductor has the wrong polarity, you can directly collect the output level states of the three triggers of trigger U4, trigger U5, and trigger U6 to make a judgment.

[0063] Example 2 This embodiment provides a method for detecting a connection state of a transformer, based on a connection state detection circuit of a transformer provided in Embodiment 1, comprising the following steps: S1, input the three-phase voltage signals UA, UB, and UC into the first input filter circuit, the second input filter circuit, and the third input filter circuit respectively, and perform low-pass filtering on the three-phase voltage signals to obtain filtered three-phase voltage signals UA', UB', and UC'; Input the three-phase current signals IA, IB, and IC into the fourth input filter circuit, the fifth input filter circuit, and the sixth input filter circuit respectively, and perform low-pass filtering on the three-phase current signals to obtain filtered three-phase current signals IA', IB', and IC'; S2, inputting the filtered three-phase voltage signals UA', UB', UC' into the first zero-crossing detection circuit, the second zero-crossing detection circuit and the third zero-crossing detection circuit respectively, the first zero-crossing detection circuit, the second zero-crossing detection circuit and the third zero-crossing detection circuit convert the three-phase voltage signals UA', UB', UC' into square wave signals; the phase sequence recognition logic circuit performs phase sequence logic judgment according to the square wave signal, and outputs a phase sequence recognition state signal; The filtered three-phase voltage signals UA', UB', and UC' are respectively input into the first phase shift circuit, the second phase shift circuit, and the third phase shift circuit, which respectively perform phase shift processing on the filtered three-phase voltage signals UA', UB', and UC', and shift the three-phase voltage signals by 90 degrees to obtain a phase-shifted A-phase voltage signal Dua, a phase-shifted B-phase voltage signal Dub, and a phase-shifted C-phase voltage signal Duc; Input the phase-shifted A-phase voltage signal Dua, the phase-shifted B-phase voltage signal Dub and the phase-shifted C-phase voltage signal Duc into the fourth to sixth zero-crossing detection circuits, and convert the sinusoidal phase-shifted A-phase voltage signal Dua, the phase-shifted B-phase voltage signal Dub and the phase-shifted C-phase voltage signal Duc into the phase-shifted A-phase voltage square wave signal Dua', the phase-shifted B-phase voltage square wave signal Dub' and the phase-shifted C-phase voltage square wave signal Duc'; The filtered three-phase current signals IA', IB', IC' are input into the seventh to ninth zero-crossing detection circuits respectively to obtain the A-phase current square wave signal Dia', the B-phase current square wave signal Dib' and the C-phase current square wave signal Dic'; The polarity identification logic circuit performs logical judgment based on the phase-shifted A-phase voltage square wave signal Dua', the phase-shifted B-phase voltage square wave signal Dub', the phase-shifted C-phase voltage square wave signal Duc', the A-phase current square wave signal Dia', the B-phase current square wave signal Dib' and the C-phase current square wave signal Dic', and outputs a polarity identification status signal.

[0064] The present invention can be widely used in power distribution protection devices such as comprehensive protection devices of power substations, distribution station terminals, feeder terminals, etc. in power systems, and is used to detect whether the phase sequence of the input signal of the three-phase voltage transformer is correct and whether the polarity of the current transformer is correct, thereby avoiding electrical quantity calculation errors and fault identification errors caused by incorrect voltage transformer phase sequence wiring and incorrect current transformer polarity, and improving the safe operation level of the protection device.

[0065] The term "consisting of" describing a combination shall include the identified elements, ingredients, parts or steps and other elements, ingredients, parts or steps that do not substantially affect the basic novel characteristics of the combination. The use of the terms "comprising" or "including" to describe a combination of elements, ingredients, parts or steps herein also contemplates embodiments that consist essentially of these elements, ingredients, parts or steps. By using the term "may", it is intended to illustrate that any of the attributes described that "may" be included are optional.

[0066] Multiple elements, ingredients, parts or steps can be provided by a single integrated element, ingredient, part or step. Alternatively, a single integrated element, ingredient, part or step can be divided into separate multiple elements, ingredients, parts or steps. The disclosure "one" or "an" used to describe an element, ingredient, part or step is not intended to exclude other elements, ingredients, parts or steps.

[0067] It should be understood that the above description is for illustration and not for limitation. Many embodiments and many applications beyond the examples provided will be apparent to those skilled in the art upon reading the above description. Therefore, the scope of the present teachings should not be determined with reference to the above description, but rather with reference to the foregoing claims and the full scope of equivalents to which such claims are entitled. For the purpose of comprehensiveness, all articles and references, including disclosures of patent applications and publications, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not intended to be a waiver of such subject matter, nor should it be considered that the applicant has not considered such subject matter to be part of the disclosed inventive subject matter.

Claims

1. A transformer connection state detection circuit, characterized in that: It includes a phase sequence identification detection circuit and a pole identification detection circuit; The phase sequence identification detection circuit includes a first input filter module, a first zero-crossing detection module and a phase sequence identification logic circuit connected in sequence; the polarity identification detection circuit includes a second input filter circuit, a phase shift module, a second zero-crossing detection module and a polarity identification logic circuit connected in sequence; The first zero-crossing detection module is used to convert the three-phase voltage signal output by the first input filtering module into a first three-phase voltage square wave signal; the phase sequence identification logic circuit is used to perform phase sequence logic judgment according to the first three-phase voltage square wave signal and output a phase sequence identification state signal; The phase shift module is used to shift the three-phase voltage signals output by the first input filter module by 90 degrees respectively to obtain the three-phase voltage signals after phase shift; the second zero-crossing detection module is used to convert the three-phase voltage signals after phase shift and the three-phase current signals output by the second input filter circuit into second three-phase voltage square wave signals and third-phase current square wave signals; the polarity identification logic circuit is used to perform logical judgment based on the second and third-phase voltage square wave signals and the three-phase current square wave signals, and output a polarity identification status signal.

2. A transformer connection state detection circuit according to claim 1, characterized in that: The first input filter module includes three input filter circuits, and the input filter circuit is a second-order active low-pass filter circuit.

3. A transformer connection state detection circuit according to claim 2, characterized in that: The input filter circuit includes an operational amplifier A1, a resistor R1, a resistor R2, a resistor R7, a resistor R8, a capacitor C1 and a capacitor C2; the first end of the resistor R1 is grounded, and the second end is connected to the first end of the resistor R2 and the inverting input end of the operational amplifier A1, the second end of the resistor R2 is connected to the output end of the operational amplifier A1, the first end of the resistor R7 is connected to the input voltage signal, and the second end is connected to the first end of the resistor R8 and the first end of the capacitor C1, the second end of the resistor R8 is connected to the first end of the capacitor C2 and the non-inverting input end of the operational amplifier A1, the second end of the capacitor C1 is connected to the output end of the operational amplifier A1, and the second end of the capacitor C2 is grounded.

4. A transformer connection state detection circuit according to claim 2, characterized in that: The cut-off frequency of the filter circuit is 100 Hz.

5. A transformer connection state detection circuit according to claim 1, characterized in that: The first zero-crossing detection module includes three zero-crossing detection circuits, and the second zero-crossing detection module includes six zero-crossing detection circuits; the zero-crossing detection circuit includes an operational amplifier A3, a resistor R5, a resistor R6 and a resistor R10; the first end of the resistor R5 is connected to a voltage signal, and the second end is connected to the first end of the resistor R6 and the non-inverting input end of the operational amplifier A3, the second end of the resistor R6 is connected to the output end of the operational amplifier A3, the first end of the resistor R10 is grounded, and the second end is connected to the inverting input end of the operational amplifier A1.

6. A transformer connection state detection circuit according to claim 5, characterized in that: The hysteresis interval ratio of the zero-crossing detection circuit is 1:

100.

7. A transformer connection state detection circuit according to claim 1, characterized in that: The phase sequence identification logic circuit includes a D trigger U1, a D trigger U2, an inverter U3 and an AND gate circuit U8, the input ends of the D trigger U1 and the D trigger U2 are connected to the output end of the first zero-crossing detection module, the input end of the inverter U3 is connected to the output end of the first zero-crossing detection module, and the output end is connected to the input end of the D trigger U2; the output ends of the D trigger U1 and the D trigger U2 are connected to the input end of the gate circuit U8.

8. A transformer connection state detection circuit according to claim 1, characterized in that: The polarity identification logic circuit includes a D flip-flop U4, a D flip-flop U5, a D flip-flop U6 and an AND gate circuit U7. The D flip-flops U4, U5 and U6 are connected to the output ends of the phase shift module and the second zero-crossing detection module. The output ends of the D flip-flops U4, U5 and U6 are all connected to the input end of the AND gate circuit U7.

9. A method for detecting a connection state of a mutual inductor based on the connection state detection circuit of the mutual inductor according to claim 1, characterized in that: The following steps are involved: The three-phase voltage signal is input into the first zero-crossing detection module, and the first zero-crossing detection module converts the three-phase voltage signal into a square wave signal; the phase sequence recognition logic circuit performs phase sequence logic judgment according to the square wave signal and outputs a phase sequence recognition state signal; The three-phase voltage signal is input into the phase shift module, and the phase shift module phase-shifts the three-phase voltage signal by 90 degrees to obtain the three-phase voltage signal after phase shift; Inputting the phase-shifted three-phase voltage signal and the three-phase current signal into the second zero-crossing point detection module to obtain the phase-shifted three-phase voltage square wave signal and the three-phase current square wave signal; The polarity identification logic circuit performs logic judgment according to the phase-shifted three-phase voltage square wave signal and the three-phase current square wave signal, and outputs a polarity identification state signal.

10. A method for detecting a connection state of a mutual inductor according to claim 9, characterized in that: Before the three-phase voltage signal is phase-shifted and zero-crossing detected, the three-phase voltage signal is filtered, and before the three-phase current signal is zero-crossing detected, the three-phase current signal is filtered.

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