Software security protection method and device based on memory access control list

Abstract

The invention provides a software security protection method and device based on a memory access control list. The method comprises the following steps: acquiring a current memory operation generated by a memory access instruction when a target program runs; based on a pre-stored memory access control list, matching the current memory operation to obtain a memory operation matching result; and determining to execute the current memory operation or stop the current memory operation according to the memory operation matching result. According to the method, the memory access instruction is monitored in real time in a mode of filtering the current memory operation through the memory access control list, the lightweight level is realized on hardware, any extra performance overhead during operation is not introduced during monitoring, range matching support only needs to be provided for some low significant bits, the hardware overhead is greatly reduced, and the hardware performance is improved. And different types of vulnerabilities can be relieved.

Description

Technical Field

[0001] The present invention relates to the field of software security technology, and in particular to a software security protection method and device based on a memory access control list. Background Art

[0002] Software vulnerabilities are one of the most significant security threats facing computer systems. These vulnerabilities include not only the most popular memory corruption vulnerabilities, but also non-memory corruption vulnerabilities such as command injection and logic errors. Whether they are memory corruption vulnerabilities or non-memory corruption vulnerabilities, these vulnerabilities may lead to adverse consequences such as information leakage, arbitrary code execution, privilege escalation or unauthorized access after being exploited.

[0003] In response to this, researchers have proposed many protection solutions from various aspects to mitigate these vulnerabilities. These protection solutions are either based on pure software or assisted by hardware.

[0004] Among them, the first type of protection scheme fundamentally eliminates the root cause of a specific type of vulnerability, such as spatial and temporal memory safety schemes for memory corruption vulnerabilities. In order to overcome the design complexity and high overhead of the first type of protection scheme, the second type of protection scheme efficiently detects and blocks specific popular attack types or exploits, such as control flow integrity schemes for control flow hijacking attacks. Some other protection schemes limit the ability of vulnerabilities by ensuring that specific security invariants are not violated, such as in-process isolation mechanisms and software tailoring schemes.

[0005] A small number of the above protection solutions have been widely deployed in real-world systems due to their efficiency and effectiveness. However, these protection solutions only focus on specific attack types caused by memory corruption vulnerabilities, such as stack canaries for buffer overflows on the stack and Intel CET (Control-flow Enforcement Technology) for control flow hijacking attacks, and cannot mitigate other types of attacks or protect against non-memory corruption vulnerabilities.

[0006] Furthermore, most of the solutions mentioned above require code insertion and code transformation based on the source code of the software to be hardened, so they cannot process binary executable files. Although some solutions can process binary executable files, static disassembly and accurate binary code rewriting are not easy and remain open problems. At the same time, dynamic binary code rewriting will introduce non-negligible performance overhead.

[0007] Unlike the solutions mentioned above, which can only mitigate fixed types of vulnerabilities, monitors are a flexible and programmable class of solutions that can be used to implement a variety of security policies, usually monitoring processes while they are executing.

[0008] Researchers have proposed many monitor schemes. Software-based monitors usually occupy a dedicated general-purpose processor core to analyze the collected information and make decisions. Some commercial processors also provide relevant hardware features to accelerate the collection of program runtime information, such as Intel PT (Processor Trace) and ARM CoreSight. In addition, many hardware-assisted techniques have been proposed to filter the collected information, thereby reducing the amount of collected information that needs to be processed. However, when a general-purpose processor core is occupied by a monitor, it cannot perform other ordinary tasks. Therefore, the additional overhead introduced by this type of monitor is quite significant in terms of total CPU time and chip area.

[0009] Other monitors are mainly hardware-based, and there are several typical architectural designs.

[0010] The first type of design associates each memory word with a tag as metadata, propagates and calculates tags according to the configured strategy, and finally makes a decision. Specific examples of this type of design include Harmoni and PUMP. As a monitor based on memory tags, depending on the size of the tags, the storage and management of tags will inevitably introduce non-negligible hardware and performance overhead. Some of the solutions in this type of design even require the modification of components throughout the entire computer architecture, from memory to registers.

[0011] The second type of design integrates a reconfigurable structure (i.e., FPGA, Field-Programmable Gate Array) into the system on chip, and uses the programmable logic in the FPGA to analyze the collected program runtime behavior information and ultimately make decisions. A typical design in this category is FlexCore. Since the clock frequency of the FPGA is much lower than that of a high-performance modern processor core, when the FPGA cannot process the large amount of collected information, it will block the execution of the processor core, thereby introducing a large performance overhead. Reconfiguring the FPGA is also slow, and it also introduces a large performance overhead when the process context switches.

[0012] The last design integrates a coprocessor into the SoC and uses the coprocessor to analyze the collected information and make decisions. PHMon is the most advanced design in this category. Similar to the second category, since the performance of the coprocessor is lower than that of the general-purpose processor core (otherwise, the coprocessor will occupy a larger chip area), this type of design will also introduce a large performance overhead when the coprocessor cannot process the collected information. Reprogramming the coprocessor during process context switching also introduces a non-negligible performance overhead.

[0013] An important property of a monitor is whether it can support real-time monitoring. Specifically, for example, monitors that collect and analyze program execution traces or commit logs usually do not support real-time monitoring. This is because program execution traces and commit logs are only generated by the processor core after the execution of the instructions of interest is completed. In this case, before the monitor detects any abnormal behavior and generates an exception to terminate the process, malicious side effects caused by the executed instructions may have already occurred. For example, I / O requests to some critical devices may have been issued, or network packets carrying some sensitive information may have been sent. In other words, the exceptions generated by the monitor are asynchronous, not real-time.

[0014] In summary, how to solve the problem that the monitor solution in the existing software security protection method technology has high hardware and / or performance overhead and does not support real-time monitoring is an important issue that needs to be solved urgently in the computer field. Summary of the invention

[0015] The present invention provides a software security protection method and device based on memory access control list, which are used to overcome the defects of the monitor scheme in the existing software security protection method technology having high hardware and / or performance overhead and not supporting real-time monitoring. It will not introduce any runtime performance overhead during monitoring, can greatly reduce hardware overhead, and can also alleviate different types of vulnerabilities.

[0016] On the one hand, the present invention provides a software security protection method based on a memory access control list, comprising: obtaining a current memory operation generated by a memory access instruction when a target program is running; matching the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; and determining whether to execute the current memory operation or block the current memory operation based on the memory operation matching result.

[0017] Furthermore, the current memory operation includes several fields, and the several fields include at least the instruction address of issuing the memory operation, the memory operation type, the memory address pointed to by the memory operation, and the memory content accessed by the memory operation; accordingly, the memory access control list includes several memory access rules, each memory access rule includes the expected values ​​of the several fields, the mask for matching, and the action for execution, and the action is to allow the memory operation to be executed or to prevent the memory operation.

[0018] Furthermore, the current memory operation is matched based on the pre-stored memory access control list to obtain a memory operation matching result, including: matching several fields included in the current memory operation with several memory access rules in the memory access control list using values ​​and masks to obtain a memory operation matching result; wherein, the memory operation matching result is a matched rule or a non-matched rule.

[0019] Furthermore, determining to execute the current memory operation or to block the current memory operation based on the memory operation matching result includes: when the memory operation matching result is a matched rule, determining to execute the current memory operation or to block the current memory operation according to the action included in the matched target rule; when the memory operation matching result is a failed match to the rule, executing according to a default action; wherein the default action is to allow the current memory operation to be executed or to block the current memory operation and return an abnormal termination of the current process.

[0020] Furthermore, a global status register is maintained for each thread of the process; accordingly, the current memory operation includes several fields, and the several fields include at least the instruction address of issuing the memory operation, the memory operation type, the memory address pointed to by the memory operation, the memory content accessed by the memory operation, and the current state of the status register; the memory access control list includes several memory access rules, each memory access rule includes the expected values ​​of the several fields, the mask for matching, and the action for execution, and the action is to allow the memory operation to be executed or to prevent the memory operation.

[0021] Furthermore, the memory access instructions include memory access instructions in the RISC-V instruction set.

[0022] In a second aspect, the present invention provides a software security protection device based on a memory access control list, comprising: a current memory operation acquisition module, used to obtain the current memory operation generated by the memory access instruction when the target program is running; a current memory operation matching module, used to match the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; a current memory operation execution module, used to determine whether to execute the current memory operation or block the current memory operation according to the memory operation matching result.

[0023] In a third aspect, the present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the software security protection method based on the memory access control list as described above is implemented.

[0024] In a fourth aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the software security protection methods based on a memory access control list as described above.

[0025] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the software security protection method based on the memory access control list as described above is implemented.

[0026] The software security protection method based on memory access control list provided by the present invention obtains the current memory operation generated by the memory access instruction when the target program is running, and matches the current memory operation based on the pre-stored memory access control list to obtain the memory operation matching result, and then determines to execute the current memory operation or block the current memory operation according to the memory operation matching result. The method monitors the memory access instruction in real time by filtering the current memory operation through the memory access control list, and is relatively lightweight in hardware. It does not introduce any runtime performance overhead during monitoring, and only needs to provide range matching support for some low-significant bits, which greatly reduces the hardware overhead and can also alleviate different types of vulnerabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1It is a flowchart of a software security protection method based on a memory access control list provided in an embodiment of the present invention.

[0029] Figure 2 It is a schematic diagram of the framework of a software security protection method based on a memory access control list provided in an embodiment of the present invention.

[0030] Figure 3 It is a schematic diagram of the overall flow of a software security protection method based on a memory access control list provided by an embodiment of the present invention.

[0031] Figure 4 It is a structural diagram of a software security protection device based on a memory access control list provided in an embodiment of the present invention.

[0032] Figure 5 It is a schematic diagram of the physical structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] It should be noted that the monitor solution in the existing software security protection method technology has high hardware and / or performance overhead and does not support real-time monitoring. In order to solve this problem, the present invention proposes a new monitor solution, namely, a software security protection method based on memory access control lists.

[0035] Before describing the software security protection method based on memory access control list provided by the present invention, the reason for taking memory access instructions as real-time monitoring targets is briefly explained below.

[0036] Specifically, the present invention first examines different types of instructions in the instruction set architecture. Specifically, the present invention mainly focuses on the RISC-V instruction set. Since the RISC-V instruction set is representative, the present invention can be easily extended to other instruction set architectures. Among them, the security check of system calls and breakpoints is carefully completed by the operating system kernel. At the same time, user-mode applications are not allowed to perform privileged operations. Therefore, the present invention only needs to examine the remaining instruction types.

[0037] In the sense of side effects, ALU (Arithmetic Logic Unit) operations only perform calculations, while branches, direct jumps, and direct function calls only transfer the control flow to a predefined fixed location. Therefore, these instructions have almost no side effects and are safe.

[0038] Indirect jumps and function calls are common targets for control-flow hijacking attacks because they can transfer control flow to locations determined at runtime. However, the targets of these control-flow transfers are usually read from memory by memory-access instructions earlier in the program. Memory-access instructions can read or modify the contents of memory, and therefore can have lasting side effects throughout the life of the process. In low-level software, such as operating system kernels or user-mode device drivers, these instructions can even access peripherals and affect the physical world. In addition, if the results of ALU operations are used later, the program will eventually use memory-access instructions to write these results to memory. Therefore, memory-access instructions are critical targets for effective monitoring.

[0039] In terms of monitoring performance, since ALU operations, branches, jumps, and function calls are executed very quickly in high-performance processor cores, usually with only 0~1 clock cycle latency, the monitor cannot make decisions about these instructions and their operands in such a short time. Therefore, these instruction classes are not suitable for real-time monitoring. In contrast, memory access instructions usually require more clock cycles to complete, even with the use of TLB and cache to speed up, which provides monitor solutions with ample time to analyze these instructions and make decisions while they are executing but before their side effects occur. Therefore, memory access instructions are convenient targets for efficient and real-time monitoring.

[0040] In general, for an effective, efficient and real-time monitor solution, memory access instructions are a crucial and convenient target. The monitor solution provided by the present invention takes memory access instructions as monitoring targets.

[0041] Regarding the software security protection method based on memory access control list, Figure 1 A flowchart of a software security protection method based on a memory access control list provided in an embodiment of the present invention is shown.

[0042] like Figure 1As shown, the method includes steps S110-S130, and steps S110-S130 and related steps will be described in detail below.

[0043] S110, obtaining the current memory operation generated by the memory access instruction when the target program is running.

[0044] It is understandable that when a target program is executed by a processor core, each memory access instruction in the target program will generate a memory operation, ie, a current memory operation.

[0045] The target program includes any currently running program.

[0046] Memory access instructions include, but are not limited to, memory read instructions, memory write instructions, swap instructions, conditional store instructions, and atomic operation instructions.

[0047] Memory read instructions are used to read data from memory and copy it to registers or other storage units. Memory write instructions are used to write data in registers or other storage units to a certain address in memory. Swap instructions are used to exchange data directly between memory locations and registers without having to load them into registers and then store them back. Conditional store instructions are used to store data in memory only when specific conditions are met. Atomic operation instructions are used to ensure that access to shared resources in a multi-threaded environment is mutually exclusive.

[0048] The current memory operation includes several fields, which include at least the instruction address of issuing the memory operation, the memory operation type, the memory address pointed to by the memory operation, and the memory content accessed by the memory operation. The memory operation type includes but is not limited to memory read and memory write.

[0049] It should be noted that both the instruction address and the memory address in the current memory operation are virtual addresses.

[0050] Based on the current memory operation generated by the memory access instruction when the target program is running acquired in step S110, step S120 is further executed.

[0051] S120, matching the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result.

[0052] It can be understood that after each memory access instruction in the target program generates a memory operation, under normal circumstances, these memory operations will go to the first-level and possibly lower-level data TLB for address translation and permission checking, and then go to the first-level and possibly lower-level data cache to access the contents in the memory.

[0053] Different from the usual situation, this embodiment makes some improvements to this process. Specifically, while these memory operations will go to the first-level and possibly lower-level data TLBs for address translation and permission checks, a pre-stored memory access control list is used to check / filter each memory operation going to the TLB and cache.

[0054] Specifically, the memory operation is used as input and matched in the pre-stored memory access control list to determine which memory operation can access the required memory and which memory operation cannot access the required memory.

[0055] Specifically, in this step, the current memory operation obtained is taken as input, and the memory access rules in the pre-stored memory access control list are used for matching to obtain a memory operation matching result.

[0056] The memory access control list stores several memory access rules, which contain the expected values ​​of the fields covered by the current memory operation and the mask used for matching. These values ​​and the mask determine the value set of values ​​that are allowed to match. In addition, these memory access rules also include an action for execution, which can be to allow the current memory operation to be executed or to prevent the current memory operation.

[0057] There are two situations for the memory operation matching results, namely, matching the rule and not matching the rule. This embodiment has different processing methods for these two different situations, and the details can be found in step S130.

[0058] S130: Determine whether to execute the current memory operation or to prevent the current memory operation according to the memory operation matching result.

[0059] Specifically, when the memory operation matching result is a matched rule, the current memory operation can be directly executed according to the action included in the matched memory access rule, that is, the current memory operation is allowed to be executed or the current memory operation is blocked.

[0060] If the memory operation matching result is that the rule is not matched, the current memory operation is executed according to the default action, that is, the current memory operation is allowed to be executed or the current memory operation is blocked. For example, in a specific embodiment, the pre-configured default action is "allow the current memory operation to be executed".

[0061] Among them, when the current memory operation is blocked by the memory access control list, the processor core will generate / return an abnormal termination of the current process to block the ongoing attack.

[0062] In this embodiment, the current memory operation generated by the memory access instruction when the target program is running is obtained, and the current memory operation is matched based on the pre-stored memory access control list to obtain the memory operation matching result, and then the execution of the current memory operation or the blocking of the current memory operation is determined according to the memory operation matching result. This method monitors the memory access instruction in real time by filtering the current memory operation through the memory access control list, and is relatively lightweight in hardware. It does not introduce any runtime performance overhead during monitoring, and only needs to provide range matching support for some low-significant bits, which greatly reduces hardware overhead and can also alleviate different types of vulnerabilities.

[0063] On the basis of the above-mentioned embodiment, the process of checking / filtering / matching the current memory operation by using the memory access control list will be described in detail below.

[0064] Based on the pre-stored memory access control list, the current memory operation is matched to obtain a memory operation matching result, including: matching several fields included in the current memory operation with several memory access rules in the memory access control list using values ​​and masks to obtain a memory operation matching result; wherein the memory operation matching result is a matched rule or a non-matched rule.

[0065] It is easy to understand that the current memory operation includes several fields, which include but are not limited to the instruction address that issued the memory operation, the memory operation type of the memory operation, the memory address pointed to by the memory operation, and the memory content accessed by the memory operation.

[0066] Correspondingly, the memory access control list has the concepts of subject, object and the operation performed by the subject on the object. In this embodiment, the subject is the memory operation or the instruction to generate the memory operation, the object is the accessed memory location and the content therein, and the operation is the memory read or memory write operation.

[0067] In other words, the memory access control list stores the contents corresponding to the fields included in the current memory operation. Specifically, the memory access control list includes several memory access rules, each of which includes the expected values ​​of several fields, a mask for matching, and an action for execution, where the action is to allow or block the memory operation.

[0068] Among them, it is worth mentioning that since this embodiment uses the memory access control list to filter the current memory operation before it goes to the TLB, the physical address is not yet ready at this time. Therefore, this embodiment chooses to use virtual addresses to represent memory access instructions and memory locations to achieve good compatibility and performance.

[0069] It should also be noted that the several memory access rules in the memory access control list can be pre-written and stored before the program starts running, and can also be modified and adjusted while the program is running, which is not specifically limited here.

[0070] After pre-storing the memory access control list, this embodiment monitors the memory access instruction in real time. Specifically, the current memory operation is first obtained, and then the current memory operation is input into the memory access control list, and the current memory operation is matched with several memory access rules in the memory access control list by means of value and mask, and several fields included in the current memory operation are matched with several memory access rules in the memory access control list. If a match is found, the memory operation matching result is a matched rule; otherwise, the memory operation matching result is a failed matched rule.

[0071] The match is performed using values ​​and masks, where the value represents the actual data to be checked, which can be any information that can be represented in binary, such as instruction address, memory operation type, memory address or memory content, and the mask is used to indicate which bits are important and which bits can be ignored. The mask usually consists of a series of "0" and "1", "1" indicates that the corresponding bit needs to be checked, and "0" indicates that the corresponding bit can be ignored. Both the value and the mask have been pre-defined and stored in the memory access control list.

[0072] In a specific embodiment, the value corresponding to a memory access rule is 0011, and the mask is 1010. Then, as long as the current memory operation corresponds to any one of the binary representations of "0010", "0011", "0110", and "0111", it is considered a match. Otherwise, it is not a match.

[0073] It should also be noted that this embodiment uses the memory content to be accessed by the current memory operation as the matching field, which can greatly improve the flexibility of the solution implementation, that is, performing different actions on the same memory access instruction when the actual data is different.

[0074] It is worth mentioning that, since codes or data with related functions are usually located in corresponding continuous memory areas, the present invention also provides range matching support for instruction addresses and memory addresses, which is convenient for users to use and can reduce the number of rules. However, although mask matching is easy to implement in hardware using pure logic or TCAM, the cost of range matching is slightly higher. Fortunately, since codes or data with related functions are usually located in the same function, object file, or other file, the range matching support is not as good as the range matching support. Or in memory objects, and their size is usually relatively small, the present invention only needs to provide range matching support for some low-significant bits, which will greatly reduce hardware overhead.

[0075] In this embodiment, a memory operation matching result is obtained by matching several fields included in the current memory operation with several rules in the memory access control list in the form of values ​​and masks, and then determining whether to execute the current memory operation or block the current memory operation according to the memory operation matching result. This method monitors memory access instructions in real time by filtering the current memory operation through the memory access control list, and is relatively lightweight in hardware. It does not introduce any runtime performance overhead during monitoring, and only needs to provide range matching support for some low-significant bits, which greatly reduces hardware overhead and can also mitigate different types of vulnerabilities.

[0076] On the basis of the above embodiment, the process of determining whether to execute the current memory operation or to prevent the current memory operation according to the memory operation matching result will be described in detail below.

[0077] According to the memory operation matching result, determine whether to execute the current memory operation or block the current memory operation, including: when the memory operation matching result is a matched rule, determine to execute the current memory operation or block the current memory operation according to the action included in the matched target rule; when the memory operation matching result is a failed match to the rule, execute according to the default action; wherein the default action is to allow the current memory operation to be executed or to block the current memory operation and return an exception to terminate the current process.

[0078] It is easy to understand that when the current memory operation can match the rules in the memory access control list, the current memory operation is directly executed according to the matched memory access rule (target rule). In other words, if the target rule allows the current memory operation, then the current memory operation is allowed to proceed normally; if the target rule blocks the current memory operation, then an exception is generated to terminate the current process to block the ongoing attack.

[0079] When the current memory operation fails to match the rules in the memory access control list, the next operation is determined based on the default action. If the default action is to allow the current memory operation, it will be allowed even if it does not match any rules. This strategy is suitable for a more relaxed security environment or a scenario where most operations are trusted by default. If the default action is to block the current memory operation, it will be blocked when the current memory operation does not match the rules, and an exception may be triggered, which may cause the current process to be terminated. This strategy is stricter and is suitable for environments that require high security.

[0080] For example, in a specific embodiment, the pre-stored memory access control list includes the following memory access rules: Rules 1 to 3, the default action is to block the current memory operation and return an exception.

[0081] Rule 1: Instruction address range 0x100000~0x200000, memory address range 0x100000000~0x200000000, memory read operation or memory write operation are allowed to execute.

[0082] Rule 2: Instruction address range 0x200000~0x300000, memory address range 0x200000000~0x300000000, memory read operation or memory write operation are allowed to execute.

[0083] Rule 3: In the memory address range 0xE00000000~0xF00000000, memory read operations or memory write operations are allowed to execute.

[0084] In one case, the current memory operation is: the instruction address is 0x100480, and the data at 0x100000080 is read. The value and mask method is used to match the current memory operation with memory access rules 1 to 3. Memory access rule 1 is matched. At this time, the current memory operation is allowed to execute and read the data at 0x100000080.

[0085] In another case, the current memory operation is: the instruction address is 0x2005C0, and the data at 0x100000090 is written. The value and mask are used to match the current memory operation and memory access rules 1 to 3. If no rule is matched, the current memory operation is blocked, the write operation is blocked, an exception is returned, and the current process is terminated.

[0086] In this embodiment, when the memory operation matching result is a matching rule, according to the action contained in the matching target rule, it is determined to execute the current memory operation or block the current memory operation. When the memory operation matching result is a non-matching rule, it is executed according to the default action; wherein the default action is to allow the current memory operation to be executed or to block the current memory operation and return an abnormal termination of the current process. This method monitors the memory access instruction in real time by filtering the current memory operation through the memory access control list. It is relatively lightweight in hardware, does not introduce any runtime performance overhead during monitoring, and only needs to provide range matching support for some low-significant bits, which greatly reduces the hardware overhead and can also alleviate different types of vulnerabilities.

[0087] On the basis of the above embodiments, the process of stateful rule matching will be further described in detail below.

[0088] It is easy to understand that this embodiment also uses a memory access control list to filter unsafe current memory operations, but performs rule matching in a stateful manner, which can achieve better filtering effects and further improve software security.

[0089] To achieve this, existing memory tag-based monitors associate each memory word with a tag as metadata and maintain the tag when performing actions. However, the storage and management of tags will inevitably introduce non-negligible hardware and performance overhead, and the components that may need to be modified are throughout the entire computer architecture.

[0090] In contrast, this embodiment maintains a global status register for each thread's memory access rule of the access control list. Specifically, this embodiment adds the current state of the status register to the memory access rule matching process, and updates the status register according to the memory access rule when executing an action.

[0091] Unlike increasing the status register by a specific number or transferring the status register to a specific state, in the design of this embodiment, the update operation of the status register can simultaneously clear and set some bits in the status register. Combined with the mask used for matching memory access rules, this feature makes each bit in the status register independent of each other. In other words, each memory access rule can independently use a portion of the status bit. Therefore, as long as the memory access rules from different security policies use different parts of the status bit, they can simply be stored together in the access control list of the present invention.

[0092] Furthermore, if two update operations of the status register modify different status bits respectively, it is safe to swap the two update operations. This can simplify the implementation of the processor core, especially the implementation of a high-performance out-of-order execution processor core. Ultimately, the status register enables the present embodiment to match the memory operation sequence, thereby enabling the present embodiment to track the internal state and context of the monitored thread, such as the function call stack, and thus making the filtering process more accurate, expressive and stateful.

[0093] The current state of the status register is added to the process of matching the memory access rules, so that the current memory operation includes several fields, which at least include the instruction address of issuing the memory operation, the memory operation type, the memory address pointed to by the memory operation, the memory content accessed by the memory operation and the current state of the status register.

[0094] Correspondingly, the memory access control list includes several memory access rules, each of which includes expected values ​​of several fields, masks for matching, and actions for execution, where the actions are to allow or block memory operations.

[0095] In this embodiment, by adding the current state of the status register to the memory access rule matching process, the internal state and context of the monitored thread can be tracked, thereby making the filtering process more accurate, more expressive and stateful, further improving software security.

[0096] In some embodiments, Figure 2 A schematic diagram of a framework of a software security protection method based on a memory access control list provided in an embodiment of the present invention is shown.

[0097] like Figure 2 As shown in FIG. 1 , when the target program is executed by a processor core, each memory access instruction in the target program will generate a memory operation. In general, these memory operations will go to the first-level and possibly lower-level data TLB for address translation and permission check, and then go to the first-level and possibly lower-level data cache to access the contents in the memory.

[0098] The solution of the present invention slightly expands this process and uses a memory access control list to check each memory operation going to the TLB and cache. The memory access control list includes a series of memory access rules, which use the current state of the status register and the operands of the memory operation as inputs and determine which memory operations can access the memory they need and which operations cannot. When a memory operation is blocked by the memory access control list, the processor core will generate an exception to terminate the corresponding process, thereby blocking the ongoing attack.

[0099] In some embodiments, Figure 3 The overall flow chart of the software security protection method based on memory access control list provided by an embodiment of the present invention is shown.

[0100] like Figure 3 As shown, firstly, the processor core is slightly modified to add the matching and checking logic of the present invention, such as TCAM, next to the existing TLB and PTW. The input of the logic is the current state of the status register and the current memory operation, and the output is whether the memory operation is allowed to access the required memory, and the status update signal fed back to the status register. Then, if the memory page permission check passes and the present invention allows the memory operation, the memory operation will be executed in a conventional manner. Otherwise, the processor core will generate an exception to notify the operating system kernel.

[0101] Secondly, the present invention modifies the operating system kernel to increase support for the present invention, thereby providing an API for setting rules for user-mode applications, maintaining rules for processes, and handling exceptions generated by hardware supporting the present invention. Finally, the present invention provides a utility program for users, which can configure rules for applications that need protection with the help of the API provided by the operating system kernel.

[0102] Specifically, each memory access rule in the memory access control list can be represented by a string, and the utility can parse these rule strings. In each rule, all fields used for matching, namely the operation type, instruction address, memory address accessed, data content written, and current value of the status register, are optional and have masks. If the user omits a field, the utility will treat its mask as all zeros and make the field match any value. In particular, the instruction address and the memory address accessed support range matching for some low-significant bits, and the specific number of bits depends on the specific implementation.

[0103] In some other embodiments, it is necessary to make a small modification to the processor core to add the logic of the solution of the present invention, modify the operating system kernel to increase the support for the solution of the present invention, and develop a utility program for the user. Specifically, this embodiment implements the prototype system of the present invention on an FPGA development board based on the open source RISC-V BOOM processor core and the Linux kernel.

[0104] In a specific embodiment, a detailed description is provided for TCAM simulation on FPGA.

[0105] Considering that hardware access control lists are usually implemented using TCAM, this embodiment also uses TCAM to implement the matching and checking logic of the present invention in the processor core. However, the FPGA used in this embodiment does not have native TCAM primitives. Therefore, this embodiment chooses to use shift registers to simulate TCAM on the FPGA. This method is a commonly used method. This embodiment finds that two SRL16E primitives, i.e., two 16-bit shift registers, can be laid out in the same LUTRAM (Look-Up Table Random Access Memory) primitive, thereby efficiently simulating a 4-bit wide × 2 table entry deep TCAM.

[0106] Specifically, a SRL16E can be shifted in 16 bits in total, one bit per clock cycle, and has a 4-bit wide address input for the user to read any bit from it. Therefore, for any 4-bit wide TCAM table entry, this embodiment uses the value and mask of the table entry to pre-calculate the matching result for each 4-bit input (a total of 16 possibilities), and stores the calculated result in an SRL16E. Thereafter, the SRL16E can output whether a certain input matches the TCAM table entry. Then, this embodiment cascades multiple SRL16Es to form a wider and deeper TCAM. When a certain input matches multiple table entries, this embodiment uses a priority encoder to select the table entry with the highest priority, that is, the table entry with the lowest address.

[0107] This embodiment also implements range matching for the above-mentioned SRL16E-based TCAM to support the rules of the present invention. In the implementation of this embodiment, each 4-bit wide range matching table entry has a lower bound and an upper bound, and needs to occupy 4 SRL16Es. For the lower bound, one SRL16E is used to store whether the input is greater than or equal to the lower bound, that is, whether it is within the boundary. At the same time, another SRL16E is used to store whether the input is equal to the lower bound. The previous SRL16E usually outputs the final matching result when possible. At the same time, since the matching result is uncertain when only the most significant bit of the input is equal to the lower bound, this embodiment requires a subsequent SRL16E when cascading. In this case, this embodiment needs to compare the least significant bits of the input and the lower bound. The matching of the upper bound is similar.

[0108] Finally, this embodiment connects the traditional memory with the above-mentioned TCAM to store the actions of the rules of the present invention.

[0109] In another specific embodiment, modification of a processor core is described in detail.

[0110] This embodiment modifies the processor core to integrate a TCAM, adds the matching and checking logic of the present invention, introduces a status register and its update logic, and provides an interface to the software through the CSR register to manage the rules of the present invention.

[0111] Specifically, the processor core used in this embodiment is based on the RISC-V BOOM core, and supports the 64-bit RISC-V instruction set architecture with Sv39 virtual memory (i.e., 39-bit virtual address). Note that the operation type, instruction address (whose least significant bit is fixed to 0), accessed memory address, written data content, and current value of the status register in a rule occupy 1, 38, 39, 64, and 16 bits, respectively. This embodiment first instantiates a 158-bit wide TCAM, in which the least significant 16 bits of the instruction address and the accessed memory address, a total of 32 bits, support range matching. Subsequently, this embodiment integrates the TCAM into the processor core.

[0112] Secondly, this embodiment uses the input micro-operation (micro-operation) and memory write queue (store queue) entries of the LSU (Load / Store Unit, memory access unit, in the lsu.scala file) in the processor core to form the input of the TCAM for matching. A memory read operation will generate a memory read micro-operation, and the information in the memory read micro-operation will be used as the input of the TCAM. However, a memory write operation will generate two micro-operations, one for calculating the address and the other for calculating the data to be written. If the calculation of a micro-operation is completed before another, the processor core will save its result to the memory write queue, and then match it in the TCAM when the address and data are ready.

[0113] Then, the TCAM will output the action and status update information of the matched rule. If there is no matching rule in the TCAM, the present invention will allow the memory operation by default. If the matched rule prevents the memory operation, the present invention will generate an access fault exception and cancel the operation. The processor core will record this exception in the ROB (Re-Order Buffer) and generate the exception when the corresponding instruction is committed. If the matched rule allows the memory operation, the present invention will store the status update information in the memory read queue (load queue) or the memory write queue.

[0114] Finally, this embodiment adds a status register in the processor core, and updates the status register according to the information in the memory read queue or the memory write queue when the corresponding instruction is submitted.

[0115] It is worth noting that this embodiment does not support any form of renaming of the status register to reduce hardware and performance overhead. In the scheme of this embodiment, although delaying the status update until the instruction is submitted may cause the present invention to use stale status values ​​when matching rules, this embodiment believes that in practice, the distance between interesting memory operations will be far enough apart that they will not be affected by this feature.

[0116] In order to provide an interface for software to manage the rules of the present invention, this embodiment introduces a series of CSR registers in the processor core and connects them to the TCAM. These CSR registers can only be accessed by the code in the S state (i.e., the operating system kernel). User-state applications should access them through the operating system kernel. Among these CSR registers, there are 8 staging registers, namely aclInsnAddr, aclInsnAddrMask, aclMemAddr, aclMemAddrMask, aclMemData, aclMemDataMask, aclStateAndMask and aclAction, which are used to temporarily store the rules that need to be written.

[0117] In addition, aclIndex is used to store the index of the rule that needs to be written and acts as a trigger. Once aclIndex is written, the TCAM begins its update process and writes the rule into the table entry at the corresponding index (i.e. address). Finally, aclState is directly mapped to the state register for software access.

[0118] In order to write a rule into the TCAM, the user needs to write into 8 temporary registers. Furthermore, when the context is switched, the operating system kernel needs to write the entire access control list with several rules into the TCAM, which will require writing into the temporary registers more times. However, the existing CSR implementation in the RISC-V BOOM core refreshes the entire pipeline once before and after the execution of a CSR instruction, resulting in a large delay (about 20 clock cycles) for a single CSR instruction and making the usage of this embodiment inefficient. Since the existing code does not have such an access pattern, it is not affected by this feature.

[0119] In order to optimize the usage of this embodiment, this embodiment first detects any instruction that writes to the temporary CSR register in the instruction decoding unit, and makes the instruction not refresh the pipeline. Then, in the execution unit, since the instruction may still be in the predictive execution stage at this time, unlike directly modifying the CSR register, this embodiment saves the new value of the CSR register to the ROB. Thereafter, when the corresponding instruction is submitted, this embodiment writes the saved value to the CSR register. Finally, the instruction that writes to the temporary CSR register will be as fast as the ALU instruction.

[0120] In yet another specific embodiment, operating system kernel support is described in detail.

[0121] The Linux kernel is modified to provide system calls for user mode to manage the rules of the present invention, maintain rules and status registers for processes, and switch rules and status registers when process context switches. It is worth noting that when the present invention blocks a memory operation, the access error exception generated by the processor core can be recognized and processed by the kernel. In this case, the kernel will terminate the process with the exception.

[0122] Specifically, the present embodiment modifies the prctl() system call to add several new functional options, which can read and set the rules and priorities of the present invention for the caller process and other processes. In particular, for the prctl() call that operates the rules of other processes, the present embodiment follows the permission check of ptrace(), i.e., ptrace_may_access(), to check whether the call is legal, so that the modification of the present embodiment does not introduce new security issues.

[0123] Then, this embodiment maintains a linked list for each process (or more specifically, each address space, i.e., each mm_struct structure) to store the rules configured in the access control list. This embodiment keeps the linked list in order according to the priority of the rules therein, and its life cycle is the same as the life cycle of the corresponding address space.

[0124] Each time prctl() is called to modify the linked list or the kernel performs a context switch, the kernel will write the rule into the hardware via the CSR register. The index used by the kernel when operating the hardware of the present invention is the rank of the rule in the linked list, not the priority configured by prctl(). It is worth noting that although the priority number in the hardware, i.e., the index, may be different from the configured priority, the relative relationship between the priorities of the rules will remain consistent.

[0125] In addition, this embodiment reserves two highest priority rules for the kernel in hardware. Then, this embodiment configures these two rules to allow the kernel code to arbitrarily access the entire virtual memory space, thereby preventing the user state from configuring malicious rules for the kernel and launching a denial-of-service attack.

[0126] Previous research has observed that only a small number of processes have potential vulnerabilities and therefore need to be protected. For the present invention, this means that only a small number of processes will have non-empty access control lists. Therefore, this embodiment first records a pointer in the kernel, pointing to the memory access control list currently configured in the hardware. Whenever the kernel switches the context to a new process with a non-empty access control list, the embodiment writes the access control list into the hardware and updates the pointer. Then, when the kernel switches the context from the current process to a new process with an empty memory access control list, the embodiment only needs to configure the highest priority rule to allow the new process to access the entire virtual memory space, without clearing the entire hardware memory access control list. Thereafter, when the kernel switches the context back to the previous process with a non-empty access control list, the embodiment checks whether the access control list pointer stored in the kernel matches the process. If it matches, the embodiment only needs to restore the highest priority rule, without rewriting the entire access control list into the hardware, because only the highest priority rule was previously overwritten by a process with an empty access control list. Otherwise, this indicates that the hardware access control list has been overwritten by other processes, and this embodiment cannot perform this optimization.

[0127] Furthermore, this embodiment can also use some bits in the status register to store an address space identifier for each rule in the hardware, and use the identifier to identify different rules of different processes, similar to the address space identifier in the TLB. In this way, multiple different processes can share the same access control list hardware at the same time.

[0128] In other embodiments, a detailed description is provided for the user-mode utility program.

[0129] This embodiment provides a utility program for users to flexibly configure the rules of the present invention for an application program. The utility program supports starting a new process to execute a new binary executable file with the rules of the present invention loaded, and also supports configuring rules for an existing process.

[0130] Specifically, to configure the rules, the utility first parses the input rule file, where each line of the input file is a rule string. Then, the utility configures the highest priority rule through a prctl() call, allowing the corresponding process to access the entire virtual memory space, that is, turning off all subsequent rules. This step is necessary to prevent incomplete rules configured in the hardware from acting incorrectly.

[0131] Subsequently, the utility configures all other rules except the highest priority rule. Finally, the utility configures the highest priority rule to the desired value. In this way, the present embodiment can configure the rules of the present invention for a new process or an existing process without interrupting execution.

[0132] Corresponding to the software security protection method based on memory access control list described in the above embodiments, the present invention also provides a software security protection device based on memory access control list, specifically, Figure 4 A schematic diagram of the structure of a software security protection device based on a memory access control list provided by an embodiment of the present invention is shown.

[0133] like Figure 4 As shown, the device includes: a current memory operation acquisition module 410, which is used to obtain the current memory operation generated by the memory access instruction when the target program is running; a current memory operation matching module 420, which is used to match the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; a current memory operation execution module 430, which is used to determine whether to execute the current memory operation or block the current memory operation according to the memory operation matching result.

[0134] In this embodiment, the current memory operation generated by the memory access instruction when the target program is running is obtained by the current memory operation acquisition module 410, and the current memory operation matching module 420 matches the current memory operation based on the pre-stored memory access control list to obtain the memory operation matching result, and then the current memory operation execution module 430 determines to execute the current memory operation or block the current memory operation according to the memory operation matching result. The device monitors the memory access instruction in real time by filtering the current memory operation through the memory access control list, and is relatively lightweight in hardware. It does not introduce any runtime performance overhead during monitoring, and only needs to provide range matching support for some low-significant bits, which greatly reduces hardware overhead and can also alleviate different types of vulnerabilities.

[0135] It should be noted that the software security protection device based on memory access control list provided in this embodiment can correspond to the software security protection method based on memory access control list described in the above embodiments, and will not be repeated here.

[0136] Figure 5 A schematic diagram of the physical structure of an electronic device is shown. Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 communicate with each other through the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute a software security protection method based on a memory access control list, the method comprising: obtaining the current memory operation generated by the memory access instruction when the target program is running; matching the current memory operation based on the pre-stored memory access control list to obtain a memory operation matching result; and determining to execute the current memory operation or to block the current memory operation according to the memory operation matching result.

[0137] In addition, the logic instructions in the above-mentioned memory 530 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a smart phone, a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0138] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the software security protection method based on the memory access control list provided by the above methods. The method includes: obtaining the current memory operation generated by the memory access instruction when the target program is running; matching the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; and determining to execute the current memory operation or block the current memory operation based on the memory operation matching result.

[0139] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it is implemented to execute the software security protection method based on the memory access control list provided by the above-mentioned methods. The method includes: obtaining the current memory operation generated by the memory access instruction when the target program is running; matching the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; and determining to execute the current memory operation or block the current memory operation based on the memory operation matching result.

[0140] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0141] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a computer software product, which can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a smart phone, a personal computer, a server or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0142] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A software security protection method based on memory access control list, characterized in that: include: Get the current memory operation generated by the memory access instruction when the target program is running; Based on a pre-stored memory access control list, the current memory operation is matched to obtain a memory operation matching result; According to the memory operation matching result, it is determined to execute the current memory operation or to prevent the current memory operation.

2. The software security protection method based on memory access control list according to claim 1 is characterized in that: The current memory operation includes a plurality of fields, wherein the plurality of fields include at least an instruction address for issuing the memory operation, a memory operation type, a memory address pointed to by the memory operation, and memory content accessed by the memory operation; Correspondingly, the memory access control list includes a plurality of memory access rules, each memory access rule includes expected values ​​of the plurality of fields, a mask for matching, and an action for execution, wherein the action is to allow execution of a memory operation or to prevent a memory operation.

3. The software security protection method based on memory access control list according to claim 2 is characterized in that: The matching of the current memory operation based on the pre-stored memory access control list to obtain a memory operation matching result includes: Matching the fields included in the current memory operation with the memory access rules in the memory access control list in a value and mask manner to obtain a memory operation matching result; The memory operation matching result is a match on the rule or a failure to match the rule.

4. The software security protection method based on memory access control list according to claim 3 is characterized in that: The determining, according to the memory operation matching result, to execute the current memory operation or to prevent the current memory operation includes: When the memory operation matching result is a matching rule, determining to execute the current memory operation or to prevent the current memory operation according to the action included in the matched target rule; If the memory operation matching result is that the rule is not matched, the default action is executed; The default action is to allow the current memory operation to be executed or to prevent the current memory operation and return an abnormal termination of the current process.

5. The software security protection method based on memory access control list according to claim 1 is characterized in that: For each thread of the process, a global status register is maintained; Accordingly, the current memory operation includes several fields, and the several fields include at least the instruction address for issuing the memory operation, the memory operation type, the memory address pointed to by the memory operation, the memory content accessed by the memory operation, and the current state of the status register; The memory access control list includes a plurality of memory access rules, each of which includes expected values ​​of the plurality of fields, a mask for matching, and an action for execution, wherein the action is to allow execution of a memory operation or to prevent a memory operation.

6. The software security protection method based on memory access control list according to any one of claims 1 to 5, characterized in that: The memory access instructions include memory access instructions in the RISC-V instruction set.

7. A software security protection device based on memory access control list, characterized in that: include: A current memory operation acquisition module is used to acquire the current memory operation generated by the memory access instruction when the target program is running; A current memory operation matching module, used to match the current memory operation based on a pre-stored memory access control list to obtain a memory operation matching result; The current memory operation execution module is used to determine whether to execute the current memory operation or to prevent the current memory operation according to the memory operation matching result.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the software security protection method based on the memory access control list as described in any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the software security protection method based on a memory access control list as described in any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the software security protection method based on a memory access control list as described in any one of claims 1 to 6 is implemented.

Images