Dual-package switching power supply device

Abstract

The invention relates to a dual-package switching power supply device. An electronic device (100) includes: a first semiconductor die (121) bonded to a first conductive die bonding pad (111) and having a first electronic component; a second semiconductor die (122) bonded to the second conductive die bonding pad (112) and having a second electronic component; a first package structure (108) enclosing the first semiconductor die (121) and a portion of the first die attach pad (111); a second package structure (108) enclosing the second semiconductor die (122) and a portion of the second die attach pad (112); and a conductive metal structure (119) electrically connected to the first and second electronic components and extending between the first and second encapsulation structures (108), the conductive metal structure (119) being exposed outside the first and second encapsulation structures (108).

Description

Technical Field

[0001] The present disclosure relates to a dual-package switching power supply device. Background Art

[0002] Power systems are used in a variety of applications, such as automotive components, industrial systems, computing devices, smartphones, etc. As advanced systems become smaller, power converter designs require smaller footprints, ease of use, and lower costs. All in one power module is desirable for miniaturization, but considering the cost and flexibility of design, in some cases, it may be better to design power circuits with discrete products, and component product offerings must provide design flexibility and device capabilities to accommodate different design approaches. Many AC-DC or DC-AC circuits require at least two switching power devices, driver circuit systems, and passive components in a half-bridge circuit. Summary of the invention

[0003] In one aspect, an electronic device includes: a first semiconductor die attached to a first conductive die attach pad and having a first electronic component; and a second semiconductor die attached to a second conductive die attach pad and having a second electronic component. The electronic device includes: a first packaging structure enclosing the first semiconductor die and a portion of the first die attach pad; and a second packaging structure enclosing the second semiconductor die and a portion of the second die attach pad; and a conductive metal structure electrically connected to the first and second electronic components and extending between the first and second packaging structures, wherein the conductive metal structure is exposed outside the first and second packaging structures.

[0004] In another aspect, a system includes a circuit board and an electronic device attached to the circuit board. The electronic device includes: a first semiconductor die attached to a first conductive die attach pad and having a first electronic component; and a second semiconductor die attached to a second conductive die attach pad and having a second electronic component. The electronic device includes: a first packaging structure enclosing the first semiconductor die and a portion of the first die attach pad; and a second packaging structure enclosing the second semiconductor die and a portion of the second die attach pad; and a conductive metal structure electrically connected to the first and second electronic components and extending between the first and second packaging structures, wherein the conductive metal structure is exposed outside the first and second packaging structures.

[0005] In another aspect, a method for manufacturing an electronic device includes: attaching a first semiconductor die to a first die attach pad in a first column of a row of a lead frame panel array; attaching a second semiconductor die to a second die attach pad in an adjacent second column of the row of the lead frame panel array; forming a first packaging structure enclosing the first semiconductor die along the first column; forming a second packaging structure enclosing the second semiconductor die along the second column; trimming conductive leads along a longitudinal side between the first column and an adjacent third column of the row of the lead frame panel array; trimming conductive leads along another longitudinal side between the second column and an adjacent fourth column of the row of the lead frame panel array; selectively trimming less than all conductive leads along another longitudinal side between the first column and the second column of the lead frame panel array to leave a conductive metal structure electrically connected to the first and second semiconductor dies and extending between the first and second packaging structures of the corresponding first and second columns, the conductive metal structure being exposed outside the first and second packaging structures; and separating the first and second packaging structures along the row from other rows of the lead frame panel array to separate the electronic device from the lead frame panel array. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a top perspective view of an electronic device including a half-bridge circuit having high-side transistors and low-side transistors in respective sections and a switching node clip extending through a middle section.

[0007] Figure 1A yes Figure 1 A top plan view of an electronic device.

[0008] Figure 1B Among them Figure 1 and 1A A top plan view of a power conversion system with electronic devices attached to a circuit board.

[0009] Figure 1C yes Figure 1B Simplified schematic diagram of the power conversion system.

[0010] Figure 2 is a flow chart of a method of manufacturing an electronic device.

[0011] Figure 3-8 is a lead frame panel array undergoing a manufacturing process in a column and adjacent first and second rows Figure 1-1C A partial top view of an electronic device.

[0012] Fig. 9 is a top perspective view of another electronic device including a transistor. DETAILED DESCRIPTION

[0013] In the drawings, the same reference numerals refer to the same elements throughout the text, and various features do not have to be drawn to scale. In addition, the term "coupling (couple)" or "coupling (couples)" includes indirect or direct electrical connection or mechanical connection or a combination thereof. For example, if the first device is coupled to the second device or coupled with the second device, the connection can be via direct electrical connection, or via an indirect electrical connection of one or more intervening devices and connections. The following describes one or more operating characteristics of various circuits, systems and / or components in the context of function, which are generated by the configuration and / or interconnection of various structures when the circuit system is powered on and operated in some cases. Unless otherwise stated, the "about", "roughly" or "substantially" in front of the value means + / -10% of the stated value. The following describes one or more operating characteristics of various circuits, systems and / or components in the context of function, which are generated by the configuration and / or interconnection of various structures when the circuit system is powered on and operated in some cases. For the convenience of description in conjunction with particular figures, one or more structures, features, aspects, components, etc. may be referred to as first, second, third, etc. in this document, such as first and second terminals, first, second and third wells, etc., wherein these descriptions should not be construed as limitations on the claims.

[0014] First reference Figure 1 and 1A , Figure 1 An electronic device 100 is shown that includes a half-bridge circuit having a high-side transistor and a low-side transistor in respective portions and a switching metal structure that extends through a middle portion in a transistor outline (TO) leadless package arrangement (TOLL) having a dual-molded package structure 108. Figure 1A A top view of the electronic device 100 is shown. Figure 1B A top view of a power conversion system in which the electronic device 100 is attached to a circuit board is shown, and Figure 1C Shown Figure 1B The electronic device 100 provides a modular power stage function, wherein two driver and transistor units are connected through a switch node conductive metal structure 119 to implement a half-bridge module that can be used in a power system.

[0015] Figure 1 and 1A The electronic device 100 is shown in an example position in a three-dimensional space having a first direction X, a perpendicular (orthogonal) second direction Y ( Figure 1A ), and a third direction Z that is perpendicular (orthogonal) to the corresponding first direction X and second direction Y. Structures or features along any two of these directions are orthogonal to each other.

[0016] like Figure 1 As shown in FIG. 1 , the electronic device 100 has opposite first (e.g., bottom) sides 101 and second (e.g., top) sides 102, respectively, which are spaced apart from each other along a third direction Z in the orientation shown. The electronic device 100 has opposite third and fourth sides 103 and 104 ( Figure 1 and 1A ), also referred to herein as longitudinal ends 103 and 104, which are spaced apart from each other along the first direction X and extend along the second direction Y. The electronic device 100 also includes a respective fifth side 105 and a sixth side 106, also referred to as opposite lateral sides 105 and 106, which are spaced apart from each other along the second direction Y in the illustrated position.

[0017] like Figure 1 and 1A As best shown in , the electronic device 100 has two molded encapsulation structures 108 that form part of respective device sides 101-106. The encapsulation structure 108 has a notch 107 that extends into the lateral sides 105 and 106. In the example shown, the respective sides 101-106 are generally planar, with the bottom side 101 and the top side 102 extending in respective XY planes, and the longitudinal ends 103 and 104 extending in respective YZ planes of the second direction Y and the third direction Z. The electronic device 100 has a middle portion M that is located approximately in the middle of the longitudinal ends 103 and 104 along a centerline C. The encapsulation structure 108 also has a first portion P1 that extends between the middle portion M and one of the longitudinal ends 103 and includes the first encapsulation structure 108, and a second portion P2 that extends between the middle portion M and the other of the longitudinal ends 104 and includes the second encapsulation structure 108.

[0018] like Figure 1 and 1AAs further shown in FIG. 1 , the electronic device 100 has a first set of conductive leads 114 and a second set of conductive leads 109, the first set of conductive leads being partially exposed outside the first encapsulation structure 108 along the longitudinal end 103, and the second set of conductive leads being partially exposed outside the second encapsulation structure 108 along the other longitudinal end 104. The illustrated example also includes a third set of conductive leads 109, the third set of conductive leads being partially exposed outside the first encapsulation structure 108 and extending along the first direction X toward the second encapsulation structure 108. In the illustrated example, the third set of conductive leads 109 provide signal connections for a driver circuit in the first portion P1, and some of the second set of conductive leads 109 along the longitudinal end 104 provide signal connections for a second driver circuit in the second portion P2. In this example, the first set of conductive leads 114 provide a first drain connection for a first transistor component in the first portion P1, and another of the second set of conductive leads 109 along the longitudinal end 104 provide a second source connection for a second transistor component in the second portion P2.

[0019] Figure 1 and 1A The first portion P1 of the transistor includes a first conductive metal die attach pad 111, and a first transistor drain lead frame portion 113 having a first set of conductive leads 114 along the longitudinal end 103. The second portion P2 includes a second conductive metal die attach pad 112 connected to an additional conductive lead of the second set of conductive leads 109 along the longitudinal end 104. The second portion P2 also includes a second transistor drain lead frame portion 115 having an untrimmed (e.g., uncut) conductive lead structure 116. The first portion P1 also includes an untrimmed conductive lead structure, Figure 1 and 1A The untrimmed conductive lead structure, referenced as 109, abuts a first conductive metal die attach pad 111. In one example, the lead structures 109, 114, and 116, as well as the die attach pads 111 and 112 and the lead frame portions 113 and 115 are or include copper or other suitable conductive metal.

[0020] In one example, the bottoms of the conductive leads 109, 114, and 116, the bottom sides of the conductive metal die attach pads 111 and 112, and the bottom sides of the lead frame portions 113 and 115 are exposed outside of the corresponding package structure 108 along the first side or bottom side 101 of the electronic device 100. Figure 1B), the bottoms of the conductive leads 109, 114, and 116 can be soldered to corresponding conductive metal features (e.g., pads) of a host circuit board to provide electrical connections to the circuitry of the electronic device 100, and the bottom sides of the conductive metal die attach pads 111 and 112 and one or more of the bottom sides of the lead frame portions 113 and 115 can also be soldered to the host circuit board. In addition, the sides of one or more of the conductive leads 109, 114, and / or 116 can be adapted to adhere to solder, for example, to promote solder wetting and proper solder connection during attaching the electronic device 100 to the host circuit board.

[0021] like Figure 1 and 1A As further shown in FIG. 1 , the electronic device includes a conductive metal structure 119 extending between the first and second package structures 108 and exposed outside the package structure 108 in the middle portion M. The electronic device 100 includes a first semiconductor die 121, the first semiconductor die 121 being connected to the first portion P1 by solder 120 ( Figure 1 ) is attached to the first conductive metal die attach pad 111 and enclosed by the first packaging structure 108. The electronic device 100 also includes a second semiconductor die 122, which is connected to the first conductive metal die attach pad 111 and is enclosed by the first packaging structure 108. Figure 1 ) is bonded to the second conductive metal die bonding pad 112.

[0022] The first semiconductor die 121 and the second semiconductor die 122 may be or include any suitable semiconductor material, such as silicon, gallium nitride, etc. The first semiconductor die 121 and the second semiconductor die 122 have corresponding first transistor electronic components and second transistor electronic components (e.g., Figure 1C Field effect transistors Q1 and Q2 are schematically shown in FIG. Figure 1C The transistor Q1 in (for example, Figure 1 and 1A The transistor of the first semiconductor die 121 in the embodiment of the present invention is configured as a high-side transistor of the half-bridge circuit, and the high-side transistor includes a Figure 1 The schematically connected first drain electrode D1 and first source electrode S1, and the first gate electrode G1 ( Figure 1C ). In this example, the second transistor Q2 is configured as a low-side transistor of the half-bridge circuit, the low-side transistor having a second drain D2, a second source S2, and a second gate G2.

[0023] The conductive metal structure 119 is electrically connected to the first electronic component Q1 and the second electronic component Q2. In the example shown, the conductive metal structure 119 and the first die attach pad 111 are a continuous metal structure.

[0024] like Figure 1 and 1A As further shown in FIG. 1 , the electronic device 100 also includes bond wires 144 that form electrical connections. The example shown includes bond wires 144 to form an electrical connection between the first transistor drain lead frame portion 113 and a conductive drain terminal on a top side of the first semiconductor die 121, thereby providing a first drain connection D1 to the conductive leads 114 along the longitudinal end 103 of the electronic device 100. In this example, another set of bond wires 144 are attached to form an electrical connection between the first pair of conductive leads 109 of the second portion P2 and a conductive source terminal on a top side of the second semiconductor die 122, thereby providing a second source connection S2 along the longitudinal end 106 of the electronic device 100. In another embodiment, a metal clip connection (not shown) may be used to provide electrical interconnection of the first drain D1 and / or the second source S2, and the associated bond wires may be omitted.

[0025] In the example shown, the electronic device 100 also includes an onboard driver circuit system, wherein a first driver die 141 is enclosed by the first packaging structure 108 in the first portion P1 and is attached to a portion of the top side of the first semiconductor die 121 by an adhesive 140 (e.g., epoxy). The electronic device also includes a second driver die 142, which is enclosed by the second packaging structure 108 in the second portion P2 and is attached to a portion of the top side of the second semiconductor die 122 by the adhesive 140.

[0026] The electronic device 100 further includes a bonding wire 144 (at Figure 1 In the figure and also in Figure 1A 1 and 12), the bonding wires 144 being enclosed by respective ones of the first and second packaging structures. Bonding wires 144 form circuit connections between respective driver dies 141 and 142 and transistor electronic components of semiconductor dies 121 and 122, as well as connections to respective ones of conductive leads 109, 114, 116, for example, to enable transistor terminal connections and connections to transistor switching control signals from other components or systems of a host printed circuit board. In another example, one or more conductive metal clips (not shown) may be used to form one or more circuit connections in either or both of portions P1 and / or P2, either alone or in combination with one or more bonding wires 144.

[0027] The conductive metal structure 119 electrically couples the source of the first electronic component Q1 of the first semiconductor die 121 to the drain of the second transistor Q2 of the second semiconductor die 122 to form a switching node SW of the half-bridge circuit. The electronic device 100 provides an integrated half-bridge transistor circuit that can be used as a module in building a variety of different power converter architectures, thereby providing a compact module that can be integrated with other external components on, for example, a host printed circuit board, as described below in conjunction with Figure 1B and 1C Further shown and described.

[0028] It should also be noted that the structure shown can be modified by cutting along the center line C to provide an independent single transistor module that can be used as a component in, for example, a power converter or other transistor circuit, as described below in conjunction with Fig. 9 Further shown and described.

[0029] The conductive metal structure 119 in the electronic device 100 advantageously provides interconnection of the high-side circuitry and the low-side circuitry in the respective first portion P1 and second portion P2 through a conductive metal switching node structure that can carry high currents associated with the power conversion circuitry. In this regard, the conductive metal structure 119 can be formed of copper or other suitable metal, have a thickness and shape that supports the flow of switching node currents during operation, and can be the same thickness as the structures 109 and 111-116 of the starting lead frame to advantageously utilize existing lead frame structures (e.g., having a thickness of approximately 0.5 mm). The electronic device 100 and its variations also facilitate sharing tools and machines with other power conversion system components and modules when constructing full-bridge power conversion systems and half-bridges in other circuit topologies.

[0030] In addition, the illustrated example provides a modular half-bridge module that uses a transistor outline no-lead (TOLL) structure to enable compact system design while providing high switch node current capability compared to standard printed circuit board copper traces to interconnect switch nodes with inductors or other power converter components. The TOLL package of the illustrated example facilitates use in high current applications such as automotive systems, industrial systems, computers, smart phones, battery chargers, etc., and can facilitate high power applications with good efficiency, low electromagnetic interference (EMI) performance, and / or good thermal performance in compact high circuit density applications.

[0031] Additionally, the high current capabilities of the conductive metal structures 119 and various circuit nodes of the electronic device 100 advantageously contribute to low parasitic inductance, low impedance, and improved thermal performance in power conversion and other system applications. The modular construction of the electronic device 100 can help reduce component count, cost, and circuit area in surface mount technology (SMT) implementations of a host printed circuit board, and allow for ease of manufacturing and low cost for the end user.

[0032] Also refer to Figure 1B and 1C , Figure 1B A top view of a power conversion system 150 is shown in which the electronic device 100 is attached to a circuit board 151, and Figure 1CA simplified schematic diagram of a power conversion system 150 is shown. In this example, the conductive leads 109, 114, and 116 of the electronic device 100 are soldered to corresponding conductive pads on the top side of the circuit board 151 and other components on the top side of the circuit board 151 using conventional surface mount technology processes.

[0033] Figure 1C The example power conversion circuit in the embodiment includes: a gate drive power regulator 152, such as Figure 1B A low voltage drop (LDO) circuit formed by various components on the circuit board 151; and a controller chip 154, the controller chip is implemented as a soldered Figure 1B 151. The circuit board 151 also includes various passive components, such as input capacitor CI and output capacitor CO, respectively, a switching inductor L connected between the output node and the switching node SW, and various terminals allowing power signals and control signals to be connected to the circuit board 151.

[0034] In this example, electronic device 100 includes onboard driver circuit dies 141 and 142 that can implement Figure 1C , a gate driver circuit, a bootstrap diode, isolation and level shifting circuitry, etc. of the buck converter circuit shown in . As noted above, the provision of separate driver dies 141 and 142 in the respective first and second portions P1, P2 of the electronic device 100 facilitates selective cutting along the center line C to selectively provide individual single transistor modules that can (but need not) be interconnected in a half-bridge circuit. In another embodiment, a single driver die (not shown) may be provided in the first portion P1 or the second portion P2 in the half-bridge electronic device 100, or such a single driver die may extend at least partially in the middle portion M or in any two or more of the portions P1, P2, and M shown.

[0035] Reference now Figure 2-8 , Figure 2 A method 200 of manufacturing an electronic device is presented, and Figure 3-8 The electronic device 100 is shown undergoing a manufacturing process in a first row and adjacent first and second columns of a lead frame panel array, as well as other electronic devices simultaneously undergoing a manufacturing process in a lead frame panel array.

[0036] The method 200 begins with a starting leadframe panel array having conductive metal features (eg, copper, aluminum, etc.) formed in rows R and columns C. FIG. Figure 3A portion of an example lead frame panel array 302 is shown having a single composite cell region 304 that includes two adjacent (e.g., first and second) columns CN and CN+1 in a first row RN in an array configuration and portions of adjacent rows RN-1 and RN+1 and columns CN-4, CN-3, CN-2, CN-1, CN+2, and CN+3. In this example, the illustrated example first column CN of the first row RN in the cell region 304 corresponds to the first portion P1 of the intended electronic device 100 described above, and the second column CN+1 of the row RN corresponds to the second portion P2 of the intended electronic device 100 described above.

[0037] Figure 2 The method 200 in the embodiment includes a die attach process at 202, including attaching of a first (e.g., power) semiconductor die 121 and a second (e.g., power) semiconductor die 122. The die attach process at 202 and other processing steps of the method 200 are shown in the figure with respect to the illustrated unit area 304 and the designated first row RN, and these processing steps may include similar processing in other unit areas of the lead frame panel array 302 that are not shown in the figure.

[0038] Figure 3 An example is shown in which a die attach process 300 is performed to attach a first semiconductor die 121 to a first die attach pad 111 in a first column CN of a row RN of a lead frame panel array 302. The die attach process 300 also attaches a second semiconductor die 122 to a second die attach pad 112 in an adjacent column CN+1 of a row RN of the lead frame panel array 302. The die bonding process 300 may also include bonding other semiconductor dies in other unit areas of the lead frame panel array 302, such as by dispensing, printing, or otherwise providing solder and other electronic devices or conductive or non-conductive adhesives in selected portions of the top side of certain lead frame features, and placing the semiconductor dies at corresponding locations on the solder paste or adhesive (e.g., using automated pick and place equipment, not shown), and subsequent solder reflow and / or curing processing (e.g., thermal reflow, thermal adhesive curing, UV adhesive curing, etc.) for adhering the semiconductor dies to corresponding locations of the lead frame panel array.

[0039] Method 200 Figure 2 The process continues at 203 with optional driver die bonding. Figure 4An example is shown in which another die attach process 400 is performed to attach driver dies 141 and 142 in respective columns CN and CN+1 of the first row RN as shown, as well as in other cell regions of the lead frame panel array 302. In one embodiment, the die attach process 400 includes dispensing an adhesive (e.g., Figure 1 The adhesive 140 in the adhesive 140), and the driver tube cores 141 and 142 are selectively and automatically placed in the specified parts of the top sides of the corresponding first semiconductor tube core 121 and the second semiconductor tube core 122, and one or more any suitable adhesive curing steps (for example, thermal adhesive curing steps, UV adhesive curing steps, etc.).

[0040] Method 200 Figure 2 The process continues at 204 with wire bonding or other electrical connection processing (eg, via a conductive metal clip). Figure 5 An example is shown in which a wire bonding process 500 is performed that creates bond wires 144 to achieve circuit connections of semiconductor die 121 and 122, driver die 141 and 142, and any other desired electrical interconnections discussed above. In another embodiment, additional and / or different bond wires (not shown) and / or solder metal clips may be created and / or installed at 204, for example, to provide connections between one or more transistor die terminals and corresponding leads in cell region 304, for example, as an alternative or in addition to the electrical connections provided by the bond wires 144 shown.

[0041] Method 200 Figure 2 The process continues with a molding process at 206 to form a molded package structure 108 along columns C of the lead frame panel array 302 . Figure 6 An example is shown in which the molding process 600 is performed using a mold having downwardly extending features between adjacent columns and pillars to form the package structure recesses 107 described above.

[0042] In the example shown, the downwardly extending pillars engage portions of the first die attach pads 111 and the second die attach pads 112 in the illustrated cell region 304 and other die attach pad structures in other rows and columns of the lead frame panel array 302, for example, to allow the molding compound 108 to flow properly during a mold filling operation so that the bottoms of the illustrated die attach pads 111 and 112 are not covered by the molding compound and will eventually be exposed outside the bottom side 101 of the finished electronic device 100 (e.g., the top side). Figure 1 ). Figure 6The depicted portion of the lead frame panel array 302 is shown after removal of the upper mold structure, wherein the molding process 600 creates openings that expose portions of the conductive metal die attach pads 111 and 112 .

[0043] In addition, in the example shown, the mold features may engage the switch node metal structures 119, and the column length molded package structure 108 exposes the conductive metal structures 119 in the cell region 304 shown, but this is not a strict requirement for all possible embodiments. The example shown forms the package structure 108 as a continuous molded structure extending along each of the columns of the lead frame panel array 302, and the column length molded package structure 108 in the first column CN and the second column CN+1 encloses the corresponding first semiconductor die 121 and the second semiconductor die 122 and the bonding wires 144 in the cell region 304 shown.

[0044] exist Figure 2 At 208 in the method 200, the selective partial column-wise lead trimming continues. In the example shown, the electronic device 100 is intended to be a leadless structure, wherein the bottom of the conductive leads 109, 114, and 116 and the conductive metal structure 119 are suitable for soldering to a host printed circuit board. In another example, other forms of leads and corresponding lead frame structures may be used, for example, to form gull-wing leads, J-shaped leads, etc., and the processing at 208 may include both lead trimming and formation.

[0045] Figure 7 An example is shown in which certain of the intended leads of the lead frame panel array 302 are trimmed by process 700 (e.g., cutting), such as using sawing, laser cutting, chemical etching, or other suitable cutting or trimming processes, to separate the structures of the illustrated columns CN and CN+1 from adjacent or neighboring columns CN-1 and CN+2, and to selectively trim certain of the internal leads 109 between the illustrated columns CN and CN+1, while avoiding separating the conductive metal structures 119 between the first and second packaging structures 108 of the illustrated columns CN and CN+1.

[0046] In the example shown, Figure 7, the starting lead frame metal features along the boundaries between alternating columns are completely trimmed or cut along cut lines 702, while the starting lead frame metal features along the boundaries between other columns (e.g., including between columns CN and CN+1 as shown) are only partially cut along cut lines 704. In one example, the selective cutting is performed by a suitable die tool (not shown). In other embodiments, other suitable tools and equipment may be used. In another example, the separation process 700 may be performed by automated and / or reconfigurable blade cutting equipment (not shown) that may selectively cut or not cut between specified pairs of adjacent columns and / or portions thereof in one or more of the rows of the lead frame panel array 302. For example, inserting a corresponding partial cutting blade between columns CN and CN+1 may allow for selective separation of the third group of conductive leads 109 (e.g., the upper Figure 1 ), while keeping the corresponding conductive metal structure 119 uncut in the cell area 304 shown, and inserting a complete cutting blade in another portion of the lead frame panel array can allow the simultaneous separation of adjacent single-transistor electronic devices (e.g., the following Fig. 9 ). This selectivity allows for cost-effective, selectable fabrication of single transistor devices and / or composite half-bridge electronic devices 100 for a given lead frame panel array process sequence with little or no added cost or complexity.

[0047] Method 200 Figure 2 The packaging separation continues in the row direction at 210. Figure 8 An example of a suitable singulation process is shown in which a row-wise cutting or singulation process 800 (eg, sawing, laser cutting, chemical etching, etc.) is performed that cuts through the molded package structure 108 along lines 802. Figure 8 As shown in FIG. 8 , the process 800 separates the packaged electronic devices 100 from the lead frame panel array 302 , and the process 800 cuts along lines 802 between all adjacent rows of the lead frame panel array 302 .

[0048] Fig. 9 An example of another electronic device 900 is shown, the electronic device including a transistor in a single instance of a first semiconductor die 121 and the above with respect to Figure 1-1CThe other structural features described in the first portion P1 of the example electronic device 100 are shown. In this example, the electronic device 900 provides a single transistor module, optionally including an onboard driver die 141, wherein suitable conductive metal leads 109 and 114 are exposed along the sides 103 and 104 to allow suitable electrical connection of the transistor of the semiconductor die 121 and the driver circuit system of the driver die 141 to a host circuit board, such as in a half-bridge or full-bridge circuit with other components, or as a single transistor. In the lead frame panel array design 302 shown, the method 200 allows the single transistor device 900 to be selectively manufactured while manufacturing the half-bridge module electronic device 100 described above.

[0049] Modifications to the described examples are possible, and other implementations are possible, within the scope of the claims.

Claims

1. An electronic device, comprising: a first semiconductor die attached to a first conductive die attach pad and having a first electronic component; a second semiconductor die attached to the second conductive die attach pad and having a second electronic component; a first packaging structure enclosing the first semiconductor die and a portion of the first die attach pad; a second packaging structure enclosing the second semiconductor die and a portion of the second die attach pad; as well as A conductive metal structure is electrically connected to the first and second electronic components and extends between the first and second packaging structures, the conductive metal structure being exposed outside the first and second packaging structures.

2. The electronic device according to claim 1, comprising: opposite longitudinal ends spaced apart from one another along a first direction; opposing lateral sides spaced apart from one another along a second direction orthogonal to the first direction; a middle portion located in the middle of the longitudinal ends; a first portion extending between the middle portion and one of the longitudinal ends and comprising the first semiconductor die, the first conductive die attach pad, the first package structure, and a first set of conductive leads, the first set of conductive leads being partially exposed outside the first package structure along the one of the longitudinal ends; as well as a second portion extending between the intermediate portion and the other of the longitudinal ends and comprising the second semiconductor die, the second conductive die attach pad, the second package structure, and a second set of conductive leads, the second set of conductive leads being partially exposed outside the second package structure along the other of the longitudinal ends; Wherein the conductive metal structure extends through the intermediate portion between the first and second portions. 3 . The electronic device of claim 2 , wherein bottom sides of the first and second die attach pads are exposed outside bottom sides of the corresponding first and second package structures. 4 . The electronic device according to claim 2 , comprising a third group of conductive leads, the third group of conductive leads being partially exposed outside the first packaging structure and extending along the first direction toward the second packaging structure. 5 . The electronic device of claim 1 , wherein the conductive metal structure and the first die attach pad are a continuous structure. 6 . The electronic device according to claim 5 , comprising a conductive lead partially exposed outside the first packaging structure and extending along the first direction toward the second packaging structure.

7. The electronic device according to claim 1, wherein: The first electronic component of the first semiconductor die is a first transistor; The second electronic component of the second semiconductor die is a second transistor; and The conductive metal structure electrically couples the source of the first transistor to the drain of the second transistor to form a switching node of a half-bridge circuit.

8. A system comprising: Circuit boards; as well as An electronic device attached to the circuit board and comprising: a first semiconductor die attached to a first conductive die attach pad and having a first electronic component; a second semiconductor die attached to the second conductive die attach pad and having a second electronic component; a first packaging structure enclosing the first semiconductor die and a portion of the first die attach pad; a second packaging structure enclosing the second semiconductor die and a portion of the second die attach pad; and A conductive metal structure is electrically connected to the first and second electronic components and extends between the first and second packaging structures, the conductive metal structure being exposed outside the first and second packaging structures.

9. The system of claim 8, wherein the electronic device comprises: opposite longitudinal ends spaced apart from one another along a first direction; opposing lateral sides spaced apart from one another along a second direction orthogonal to the first direction; a middle portion located in the middle of the longitudinal ends; a first portion extending between the middle portion and one of the longitudinal ends and comprising the first semiconductor die, the first conductive die attach pad, the first package structure, and a first set of conductive leads, the first set of conductive leads being partially exposed outside the first package structure along the one of the longitudinal ends and soldered to the circuit board; as well as a second portion extending between the middle portion and the other of the longitudinal ends and comprising the second semiconductor die, the second conductive die attach pad, the second package structure, and a second set of conductive leads, the second set of conductive leads being partially exposed outside the second package structure along the other of the longitudinal ends and soldered to the circuit board; Wherein the conductive metal structure extends through the intermediate portion between the first and second portions.

10. The system of claim 9, wherein bottom sides of the first and second die attach pads are exposed outside bottom sides of the respective first and second package structures and are soldered to the circuit board.

11. The system of claim 9, wherein: The electronic device includes a third group of conductive leads, the third group of conductive leads are partially exposed outside the first packaging structure and extend along the first direction toward the second packaging structure; and The third set of conductive leads are soldered to the circuit board.

12. The system of claim 8, wherein the conductive metal structure and the first die attach pad are a continuous structure.

13. The system of claim 12, wherein: The electronic device comprises a conductive lead, the conductive lead being partially exposed outside the first packaging structure and extending along the first direction toward the second packaging structure; and The conductive leads are soldered to the circuit board.

14. The system of claim 8, wherein the conductive metal structure is soldered to the circuit board.

15. The system of claim 8, wherein: The first electronic component of the first semiconductor die is a first transistor; The second electronic component of the second semiconductor die is a second transistor; and The conductive metal structure electrically couples the source of the first transistor to the drain of the second transistor to form a switching node of a half-bridge circuit.

16. A method of manufacturing an electronic device, the method comprising: attaching a first semiconductor die to a first die attach pad in a first column of a row of the lead frame panel array; attaching a second semiconductor die to a second die attach pad in an adjacent second column of the row of the lead frame panel array; forming a first packaging structure enclosing the first semiconductor die along the first column; forming a second packaging structure enclosing the second semiconductor die along the second column; trimming conductive leads along longitudinal sides between the first column and an adjacent third column of the rows of the lead frame panel array; trimming the conductive leads along another longitudinal side between the second column and an adjacent fourth column of the row of the lead frame panel array; selectively trimming less than all of the conductive leads along another longitudinal side between the first column and the second column of the lead frame panel array to leave a conductive metal structure electrically connected to the first and second semiconductor dies and extending between the first and second package structures of the respective first and second columns, the conductive metal structure being exposed outside the first and second package structures; as well as The first and second package structures along the row are separated from other rows of the lead frame panel array to separate electronic devices from the lead frame panel array.

17. The method of claim 16, further comprising, before forming the first and second encapsulation structures: electrically connecting a first electronic component of the first semiconductor die to the conductive metal structure; and A second electronic component of the second semiconductor die is electrically connected to the conductive metal structure.

18. The method of claim 17, wherein: electrically connecting the first electronic component to the conductive metal structure comprises wire bonding a terminal of the first electronic component to a portion of the conductive metal structure in the first column of the row of the lead frame panel array; as well as Electrically connecting the second electronic component to the conductive metal structure includes wire bonding a terminal of the second electronic component to a portion of the conductive metal structure in the second column of the row of the lead frame panel array.

19. The method of claim 17, further comprising, before forming the first and second encapsulation structures: electrically connecting the first semiconductor die to one of the conductive leads along the longitudinal side; and The second semiconductor die is electrically connected to one of the conductive leads along the other longitudinal side.

20. The method of claim 16, further comprising, before forming the first and second encapsulation structures: attaching a first driver die to a side of the first semiconductor die; and A second driver die is attached to a side of the second semiconductor die.

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