Method and apparatus for estimating cyclic thermal stress

Abstract

The invention relates to a method and apparatus for estimating cyclic thermal stress. A method and apparatus for estimating cyclic thermal stress of a power semiconductor device, the apparatus (20) being configured to receive temperature data indicative of a temperature associated with the power semiconductor device (10); extracting thermal cycle data regarding a characteristic quantity of one or more thermal cycles of the power semiconductor device (10) from the received temperature data; determining a thermal cycle operating point of the power semiconductor device (10) based on the extracted thermal cycle data; and determining an estimated value of a cyclic thermal stress of the power semiconductor device (10) on the basis of the determined thermal cycle operating point of the power semiconductor device and a cyclic thermal stress model of the power semiconductor device, wherein the cycle thermal stress model includes data indicative of a stress level of the power semiconductor device at a predetermined thermal cycle operating point of the power semiconductor device.

Description

Technical Field

[0001] The present invention relates to estimating cyclic thermal stress, and more particularly, to estimating cyclic thermal stress of power semiconductor devices. Background Art

[0002] Power semiconductor devices, such as power transistors, thyristors and diodes or modules thereof, can be used in power electronic devices, such as electric power converter devices or components thereof. Examples of electric power converter devices include variable frequency drives and grid-fed inverters. An example of a power transistor is an insulated gate bipolar transistor (IGBT).

[0003] One example of a stress source for power semiconductor devices such as IGBT modules is temperature. For example, potentially excessive stress caused by temperature cycling can greatly accelerate, for example, material fatigue, which can cause, for example, premature component failure. Therefore, the ability to monitor or evaluate cyclic thermal stress of power semiconductor devices would be beneficial in establishing control over the life of the power semiconductor devices.

[0004] One problem related to the above is that power electronic devices and systems including such power semiconductor devices may have little or no insight into the thermal stress levels of the power semiconductor devices therein. Summary of the invention

[0005] Therefore, it is an object of the present invention to provide a method and an apparatus for implementing the method in order to overcome the above-mentioned problems or at least alleviate the problems. The objects of the present invention are achieved by a method, a computer program, a computer readable medium and an apparatus, which are characterized by what is stated in the independent claims. Preferred embodiments of the invention are disclosed in the dependent claims.

[0006] The present invention is based on the following ideas: extracting thermal cycle data of characteristic quantities about one or more thermal cycles of a power semiconductor device from temperature data; determining a thermal cycle operating point of the power semiconductor device based on the extracted thermal cycle data; and determining an estimated value of the cyclic thermal stress of the power semiconductor device based on the determined thermal cycle operating point of the power semiconductor device and a cyclic thermal stress model of the power semiconductor device, wherein the cyclic thermal stress model includes data indicating a stress level of the power semiconductor device at a predetermined thermal cycle operating point of the power semiconductor device.

[0007] An advantage of the solution of the invention is that the solution enables determination of an estimate of the cyclic thermal stress of a power semiconductor device, which estimate can then be used to assess the impact of temperature cycling on the power semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In the following, the present invention will be described in more detail with reference to the accompanying drawings by means of preferred embodiments, in which

[0009] Figure 1 A block diagram of an exemplary system is illustrated;

[0010] Figure 2 A block diagram of an exemplary system is illustrated;

[0011] Figure 3 An example according to an embodiment is illustrated;

[0012] Figure 4 An example according to an embodiment is illustrated;

[0013] Figure 5 An example according to an embodiment is illustrated;

[0014] Figure 6 illustrates a flow chart according to an embodiment; and

[0015] Figure 7 An example according to an embodiment is illustrated. DETAILED DESCRIPTION

[0016] The following embodiments are exemplary. Although the description may refer to "one", "one" or "some" embodiments (one or more) in several locations, this does not necessarily mean that each such reference refers to the same embodiment (one or more), or that the feature is only applicable to a single embodiment. The individual features of different embodiments may also be combined to provide other embodiments. In general, all terms and expressions used should be interpreted broadly, and they are intended to illustrate rather than limit the embodiments. The accompanying drawings only illustrate the parts necessary for understanding the various embodiments. For example, the number and / or configuration of the various elements and generally their implementation may be different from the examples shown in the figures.

[0017] Different embodiments and examples may be described below using a single unit, model, equipment and memory, without limiting the embodiments / examples to such solutions. Concepts referred to as cloud computing and / or virtualization may be used. Virtualization may allow a single physical computing device to host one or more instances of a virtual machine that appears and operates as an independent computing device, so that a single physical computing device may dynamically create, maintain, delete or manage virtual machines. It is also possible that device operations will be distributed among multiple servers, nodes, devices or hosts. In possible cloud computing network devices, computing devices and / or storage devices may provide shared resources. Some other technological advances, such as software defined networks (SDNs), may enable one or more of the functionality described below to be migrated to any corresponding abstraction or device or equipment. Therefore, all words and expressions should be interpreted broadly, and they are intended to illustrate rather than limit the embodiments discussed.

[0018] The various embodiments described herein are generally applicable to various power semiconductor devices (e.g., components), such as power transistors, thyristors and diodes or modules thereof (such as power electronic modules including two or more power semiconductor components), and are combined therewith. Some possible examples of such power semiconductor devices may include, for example, controllable power semiconductor switches, such as IGBTs (insulated gate bipolar transistors) or FETs (field effect transistors). Such power semiconductor devices (one or more) may be present in power electronic devices or systems. An example of such power electronic devices is an electric drive, which generally refers to an electronic device in this article, for example, which can be used to adjust the performance of an electric motor or another electric load. For example, the electric drive can control the power, frequency and / or current supplied to the motor or other load. The electric drive and the electric motor controlled by the electric drive can form an electric drive system. The electric drive may include one or more electric power converter units or modules, such as rectifiers, inverters and / or frequency converters, for example, which may include various power semiconductor devices.

[0019] Figure 1 is a simplified block diagram of an example that illustrates a general context in which, for example, the various embodiments described herein may be implemented and utilized. Figure 1 Some equipment (eg, devices, apparatuses, nodes) and functional entities (blocks) are shown, and their implementation and / or number and / or configuration may be different from Figure 1 as shown in the example. Figure 1 The connections shown are logical connections, and the corresponding actual physical connections may be different. Such a system may also include other equipment, functional entities and / or structures, for example, some of which are used or used for big data, data management, and communications in the system or in any part of the system. In addition, for example, any communication protocols used may vary and may depend on, for example, system characteristics. In this example, temperature data indicating the temperature associated with the physical power semiconductor device 10 can be obtained, for example, by a suitable measuring device or estimation device in box 11. Possible measurements can be performed with the aid of one or more temperature sensors, which are configured to measure the temperature inside and / or outside the power semiconductor device 10, such as at one or more predetermined locations in the power semiconductor device. The device temperature data is analyzed, and a cyclic thermal stress estimate of the power semiconductor device 10 is determined based on the analyzed temperature data in a cyclic stress estimator box 20 that receives the device temperature data. The determined cyclic thermal stress estimate of the power semiconductor device 10 can then be further utilized in various ways, for example to analyze the impact of thermal stress and / or temperature cycling of the power semiconductor device 10 on the device life. In Figure 1In the example of , the determined cycle thermal stress estimate is transmitted to the block 30, which can be a client system or any other system that can utilize the determined cycle thermal stress estimate. As an example, further stress analysis can be performed based on the cycle thermal stress estimate of the power semiconductor device 10, taking block 31 as an example.

[0020] Temperature data indicating a temperature associated with the power semiconductor device 10, obtained, for example, by suitable measurements or by estimation, may be associated with a specific predetermined point of the power semiconductor device 10 or a specific predetermined point within the power semiconductor device 10, such as a housing or junction temperature measurement or other reliable estimates from a thermal model. For example, a cyclic thermal stress estimate of the power semiconductor device 10 may provide a stress estimate of the power semiconductor device at a predetermined weak point in one or more of the predetermined weak points of the device, such as those mentioned. For example, in this case, the concept of a weak point generally means a physical location where the power semiconductor device 10 is most likely to fail when subjected to continuous cyclic thermal stress. For example, if the power semiconductor device 10 has multiple weak points susceptible to temperature cycling, multiple cyclic thermal stress estimates may be determined in parallel. For example, in an IGBT module manufactured using a laminate packaging process, one possible weak point susceptible to temperature cycling may be a chip solder laminate. Degradation of this layer may ultimately impair the cooling capacity of the component, ultimately leading to overheating and failure of the IGBT module. Therefore, the temperature data indicating a temperature associated with the power semiconductor device 10 may be a measured or estimated temperature of a known or generally predetermined point (such as a weak point) of the power semiconductor device.

[0021] According to the embodiment, Figure 6 For example, a method for estimating cyclic thermal stress of a power semiconductor device includes receiving 100 temperature data indicating a temperature associated with the power semiconductor device, and extracting 101 thermal cycle data of characteristic quantities of one or more thermal cycles of the power semiconductor device from the received temperature data. The method also includes determining 102 a thermal cycle operating point of the power semiconductor device based on the extracted thermal cycle data, and determining 103 an estimated value of the cyclic thermal stress of the power semiconductor device based on the determined thermal cycle operating point of the power semiconductor device and a cyclic thermal stress model of the power semiconductor device, wherein the cyclic thermal stress model includes data indicating a stress level of the power semiconductor device at a predetermined thermal cycle operating point of the power semiconductor device.

[0022] Figure 2 is a simplified block diagram illustrating an example of the operation of the cyclic stress estimator 20 according to an embodiment. The exemplary cyclic stress estimator 20 may implement a method for estimating cyclic thermal stress of a power semiconductor device, and its functionality may be implemented, for example, according to any embodiment described herein by a suitable device configured to implement the steps of the method or the corresponding functionality. Figure 2 The exemplary solution shown includes three main blocks: a data extraction block 21, a thermal cycling operating point determination block 22, and a cyclic thermal stress model block 23. The operations performed in the cyclic stress estimator 20 are described in more detail below according to an exemplary embodiment.

[0023] Generally speaking, according to the embodiment, in Figure 2 In the example of , a device temperature signal including device temperature data (i.e., data generally indicating a temperature associated with the power semiconductor device 10) is received by a data extraction block 21 that extracts predetermined information about temperature cycles (i.e., thermal cycle data). In addition, a thermal cycle operation point determination block 22 determines a thermal cycle operation point of the device 10 based on the extracted thermal cycle data. Finally, a cyclic thermal stress model block 23 converts the determined device thermal cycle operation point into a corresponding cyclic thermal stress estimate, and the estimate may be output in a suitable manner. According to an embodiment, the cyclic stress estimator 20 may observe cyclic changes in the device temperature signal continuously or, for example, at predetermined time periods. According to an embodiment, the goal may be to extract a temperature cycle that causes strains in an elastic region that exceeds the elastic material deformation at a weak point. The method for extracting such cyclic information from the temperature signal is a matter of design choice. For example, the rain flow counting algorithm is a mature method for capturing stress cycles associated with material fatigue in physical components (devices). Therefore, according to an embodiment, the rain flow counting algorithm may be used to process real-time device temperature signals and extract, for example, the most significant changes in each cycle of the temperature cycle. Preferably, the sampling frequency of the temperature signal should be high enough to capture the shortest meaningful cycle of the temperature cycle. For example, if the shortest meaningful period of a thermal cycle is 100 milliseconds, then the sampling frequency should be no less than 20 Hz. However, the specific sampling frequency used may vary and may depend on system characteristics.

[0024] Figure 3 An example of a device temperature signal including device temperature data is shown. In this example, three temperature cycles with different cycle lengths have been shown in detail. According to an embodiment, possible characteristic quantities (variables) of each such single cycle may be, for example, the cycle length time, the (e.g. local) minimum (temperature) point T of the temperature cycle, min [°C] and / or the (e.g. local) maximum (temperature) point T of the temperature cycle max [℃] and the temperature cycle change ΔT [℃]. In this example, the reference temperature used is the ambient temperature T of the device. ambient [° C.] However, it should be noted that other characteristic quantities (variables) may be used instead to describe the temperature cycle and included in the thermal cycle data extracted from the temperature data.

[0025] According to an embodiment, for example, any basis spanning the space of all possible forms of periodic (temperature) signals may be used to represent information about temperature cycles over time and corresponding device thermal cycle operating points. As an illustrative example, a basis consisting of the following three variables may be used herein: the lowest point T of the temperature cycle; min [℃], temperature cycle change ΔT[℃] and the average frequency of thermal cycles f cyc [cycles per time period] According to an embodiment, the triple (T min , ΔT, f cyc ), i.e., a single value of the variable, can determine the current thermal cycle operating point of the power semiconductor device 10. As an example of an alternative basis, if it happens to be more convenient, the triple (T min , T max , f cyc ) can also be used to represent temperature cycles, where T max [℃] is the highest point of the temperature cycle.

[0026] According to an embodiment, the frequency of thermal cycling may refer to a count of tracking a number of temperature cycles within a predetermined, e.g., meaningful, time period. In addition, according to an embodiment, obtaining possible long-term temperature cycling patterns may require appropriate processing of the temperature cycling data, e.g., using a sufficiently long observation period to detect the lowest meaningful cycle frequency f cyc >0. Therefore, according to an embodiment, the thermal cycle data includes data of one or more thermal cycles of the power semiconductor device, wherein the determination of the thermal cycle operating point of the power semiconductor device includes averaging the thermal cycle data of the power semiconductor device over a predetermined time period. Therefore, one possible method of extracting such a long-term cycle trend from the device load curve is to take the thermal cycle triplet (T min， ΔT,f cyc ) to determine the device thermal cycle operating point. According to an embodiment, for example, such averaging can be implemented by using a suitable window length in a moving window manner. In any case, the exact method of thermal cycle data processing to determine the device thermal cycle operating point depends on the system characteristics and requirements, as it essentially has a filtering effect on the resulting output of the method.

[0027] Therefore, the power semiconductor device thermal cycle operating point determined based on the extracted thermal cycle data is fed into the cyclic thermal stress model 23, which can encode the ability of the power semiconductor device to withstand thermal cycles relative to its expected life. The cyclic thermal stress model 23 can then be used to convert the device thermal cycle operating point (e.g., triple (T min， ΔT, fcyc )) is converted into an estimate of the cyclic thermal stress of the device. An example of a possible implementation of the cyclic thermal stress model is provided below.

[0028] According to an embodiment, the cyclic thermal stress model 23 includes data indicating the stress level of the power semiconductor device at a predetermined thermal cycle operating point of the power semiconductor device. Therefore, it can encode knowledge about the ability of the power semiconductor device 10 to withstand cyclic thermal stress for a certain period of time. This knowledge is preferably in the form of statistical data, which contains, for example, empirical evidence of the expected life of the component when operating under an electrical load that causes temperature changes. For example, historical data of power semiconductor devices or device types and / or data obtained by simulation can be used. From now on, the cyclic thermal stress model data will be referred to as stress model data or SMD. The way of obtaining and verifying such data can vary and depends on the device and / or system mentioned. However, it can generally be assumed that, for example, a protocol that conforms to material science standards can be used to obtain SMD.

[0029] According to an embodiment, the SMD may include one or more sets D (τ) , where τ∈R ≥0 Represents the expected life cycle. Each such data set D (τ) It may consist of a predetermined thermal cycle operating point for the power semiconductor device at which the effects of thermal stress limit the device life expectancy to a certain period of time (e.g., days / months / years) represented by τ. According to an embodiment, the expected life cycle represented by τ may therefore indicate a stress level, such as such that the lower the expected life cycle, the higher the corresponding stress level, and vice versa. Therefore, the expected life cycle represented by τ may be used to define a predetermined stress threshold level, which will be explained in more detail in the examples below. Just like the thermal cycle information, for example, although it may be preferred to use the same representation for the cyclic thermal stress model as the determined device thermal cycle operating point, the SMD format may vary depending on system characteristics and designer preferences.

[0030] As an example, consider two exemplary sets D( 10 . 5 ) and SMD of D(15). The first set of triples consists of predetermined thermal cycle operating points of the power semiconductor device at which the effect of thermal stress corresponds to an expected lifetime of τ1 = 10.5 years. By definition, any point in the cycle defined by D (10.5) Thermal cycling operation points above the threshold level formed by the points in all pose a high risk of failure before the expected life of 10.5 years. Similarly, the second set of triples consists of a thermal cycling threshold corresponding to an expected lifetime of τ2 = 15 years, which means that (10.5)Compared with thermal stress, the impact is lower. Two SMD example sets are shown as Figure 4 Therefore, Figure 4 is a visual representation of exemplary stress model data consisting of two example sets of points: (marked as circles in the figure) indicates a higher stress threshold, and (marked as diamonds in the figure) represents the lower stress threshold point for thermal cycling operation.

[0031] According to an embodiment, as many D as needed may be provided, depending on, for example, data availability. (τ) Data sets, because, for example, more data allows for more accurate stress estimates. According to an embodiment, any SMD consisting of n∈{1, 2, ..., +∞} sets should preferably satisfy the following conditions:

[0032] i. Specific collection All points within should preferably have the same physical interpretation. That is, they represent the same expected life cycle τ. i Thermal cycle operating points of all power semiconductor devices. For different sets where j≠i, All points within correspond to the expected life cycle τ j , so that τ j ≠τ i , where i, j are integer indices in the range 1 to n. ii. For multiple sets in the SMD, the sets should preferably be organized in ascending order, starting with the shortest lifetime and ending with the longest lifetime. Formally, when n>1, for each i∈{2,...,n}, it should maintain τ i-1 <τ i , and for every point There is a corresponding point Make

[0033] According to an embodiment, for example, if D (τ) can be generated by simulation algorithm, or for any τ∈R ≥0 Formulated analytically, the SMD can have an infinite number of sets. For example, the so-called SN curves commonly used in fatigue testing, where S represents the stressor input and N is the number of cycles that the component (device) can withstand before failure when subjected to the stress input S. These SN curves are sometimes presented in analytical form for all possible combinations of stressor inputs. It is then possible to construct any D from the SN curves. (τ ), because at the frequency measurement value When the component is subjected to temperature change stress S (here, the ordered pair (T min,ΔT) represents the expected number of thermal cycles N(T min , ΔT). That is, for each thermal cycle input (T min , ΔT), the cycle frequency can be calculated from N as follows:

[0034]

[0035] Where k is the time unit of τ converted to the corresponding A conversion procedure for periodic time units.

[0036] According to an embodiment, for example, if analytical representations are not readily available, the SMD data may be presented in a format similar to Figure 4 The example forms shown are obtained from a limited number of measurements. For this case, the set All SMDs may consist of a finite number of discrete points. However, the domain of the thermal cycle is continuous. That is, the SMD may not provide an exhaustive coverage of the stress threshold, but only outline a trend. In order to make the SMD information practical, the data should preferably be extrapolated to the entire (continuous) domain of the thermal cycle. Therefore, according to an embodiment, the data of the cyclic thermal stress model or SMD include at least one continuous set of predetermined thermal cycle operating points of the power semiconductor device defining a predetermined stress threshold level. According to an embodiment, the data of the cyclic thermal stress model may include an infinite number of such continuous sets of predetermined thermal cycle operating points of the power semiconductor device defining a predetermined stress threshold level. In general, the number of such continuous sets of predetermined thermal cycle operating points of the power semiconductor device may be 1, 2, 3, 4, 5 or more. According to an embodiment, the data of the cyclic thermal stress model or SMD includes at least a first continuous set of predetermined thermal cycle operating points of the power semiconductor device and a second continuous set of predetermined thermal cycle operating points of the power semiconductor device, the first continuous set defining a first predetermined stress threshold level, and the second continuous set defining a second predetermined stress threshold level. According to an embodiment, the first predetermined stress threshold level represents a stress level higher than the second predetermined stress threshold level. Some examples are provided below.

[0037] According to an embodiment, it is possible to construct D in a continuous domain, for example, by fitting a suitable regression model to the SMD points. (τ) A continuous variable with a threshold set (one or more) defines a predetermined stress threshold level. In this solution, a regression model can be defined as the regression of temperature to (T min , ΔT) is mapped to the corresponding cycle frequency threshold The nonlinear parameter function μ: R 2 →R. That is, Where (vector) p = [p1, ..., pm ] is a list of length m of the parameter values ​​required by the model μ.

[0038] For example, a list of model parameters p can be obtained by solving a least squares optimization problem. In the following example, two lists of parameters are found:

[0039]

[0040] The solution for the parameter p can be based on data from the SMD ensemble. That is, to obtain the parameters of the higher stress model List of, for collections The points in solve the optimization problem. Similarly, the parameters of the low stress model The list is created using of data obtained.

[0041] In general, the choice of regression model μ is a design choice and may depend on, for example, the stress-strain characteristics of the power semiconductor device weak point(s) that are sensitive to temperature cycling. The only requirement for the selected model may be that the resulting regression fit satisfies SMD properties (i) and (ii). For example, even if finding a suitable analytical representation is difficult, the regression model may be formulated as a piecewise function, e.g., using each set in the SMD Linear interpolation between discrete points.

[0042] The capture temperature variation (T min , ΔT) and cycle frequency threshold An example of a model of the relationship between:

[0043]

[0044] In this example, the model μ has eight (m=8) parameters p=[p1, ..., p8]. In practice, the designer needs to find a suitable compromise between model accuracy (the number of parameters) and complexity (the cost of model execution). Therefore, the number of parameters can vary. Regression models can generally be nonlinear. In addition, when solving for the parameter vector p, the objective function may become a non-convex function, which may increase the challenge of solving the associated optimization problem. However, classical optimization methods, such as gradient descent or the Levenberg-Marquardt algorithm, often exhibit very robust convergence behavior for the class of regression models that satisfy the SMD property.

[0045] With the help of the regression model μ, the discrete SMD set can now be extended in the continuous domain and reformulated as the continuous set and

[0046]

[0047] in and contains approximate thermal cycle thresholds in the continuous domain. For example, for (T min ,ΔT)∈R 2 All meaningful combinations of , a continuous set of higher stress thresholds The cycle frequency can be estimated as Similarly, the estimated cycle frequency can be used To construct a continuous set of lower stress thresholds

[0048] any The values ​​of are all the result of regression fitting and can therefore deviate from the points given in the SMD. It is up to the skilled person to select such a model (or models) μ so that The approximated values ​​in are sufficiently accurate and ensure that they satisfy the SMD properties, which may depend on system and / or device characteristics, for example.

[0049] Figure 5 The figure shows a set obtained by fitting the regression model μ to the corresponding points of the SMD data. Example of a continuous set of thermal cycling stress thresholds The visual representation of is drawn as a smooth surface 220 covering every point in the domain. The same applies to any other set As with their discrete counterparts from SMD, the continuous sets and Stress threshold levels can be distinguished, but in a continuous domain.

[0050] According to an embodiment, the concept of power semiconductor device cyclic thermal stress may generally be viewed as a metric for quantifying the impact of temperature cycling on the long-term life expectancy of the device.

[0051] In the simplest case, the cyclic thermal stress estimate can be formulated as a classifier. Therefore, according to an embodiment, determining the estimate of the cyclic thermal stress of the power semiconductor device includes determining the relative position of the determined thermal cycle operating point of the power semiconductor device relative to one or more predetermined stress threshold levels of predetermined stress threshold levels defined by one of a plurality of continuous sets of predetermined thermal cycle operating points of the power semiconductor. According to an embodiment, if two or more continuous sets of predetermined thermal cycle operating points of the power semiconductor define two or more predetermined stress threshold levels, the relative position of the determined thermal cycle operating point of the power semiconductor device relative to each of the two or more stress threshold levels can be determined. As an example, continuing the example in the previous section, by, for example, two continuous sets and The constructed cyclic thermal stress model makes it possible to classify the power semiconductor device thermal cycle operating points as, for example, high stress, low stress or medium stress. 3 →{high, low, moderate} can be formulated, for example as follows:

[0052]

[0053] Such a classified cyclic thermal stress estimate (ie, classifier γ) may already be a useful indicator of the operating condition of the power semiconductor device, even though its resolution is rather low.

[0054] For some purposes, it may be helpful to know not only whether a thermal cycle operating point is high stress or low stress, i.e. its relative position, but also to quantify, for example, how high / low it is on a relative numerical scale. Thus, the cyclic thermal stress estimate may be formulated as a numerical stress measurement. Thus, according to an embodiment, determining an estimate of the cyclic thermal stress of a power semiconductor device may additionally or alternatively include determining at least one distance between a determined thermal cycle operating point of the power semiconductor device and one or more predetermined stress threshold levels defined by one of a plurality of continuous sets of predetermined thermal cycle operating points of the power semiconductor. According to an embodiment, if two or more continuous sets of predetermined thermal cycle operating points of the power semiconductor define two or more predetermined stress threshold levels, the distance between the determined thermal cycle operating point of the power semiconductor device and each of the two or more stress threshold levels may be determined.

[0055] As an example, let us introduce a stress measure ψ: R 3 →R ≥0 , which maps the thermal cycling operating points of power semiconductor devices to non-negative values. The SMD properties explained previously allow the construction of a formal definition for ψ. According to the previously described SMD properties (i), All data points of should preferably have the same physical interpretation. Thus, it is possible to give All points are assigned the same stress value Similarly, one can give All points are assigned corresponding values Make According to this, the stress measurement value ψ receives the corresponding manifold and The two relevant mappings are:

[0056]

[0057] With these two mappings defined, it is now possible to extrapolate the stress estimate to the entire domain of thermal cycling operating points of the power semiconductor device by choosing an appropriate relationship. For example, assuming a linear correlation between the cycling frequency and the lifetime of the power semiconductor device, the stress measure ψ can be defined as cyc Linear trend of the axis:

[0058]

[0059] in is the slope, is the y-intercept point, and the previously defined and is in (T min ,ΔT)∈R 2 The cycle frequency threshold.

[0060] Although the example stress measurement ψ is intrinsically linked to the expected lifetime of the power semiconductor device, by using only two reference points and It can be challenging to establish an accurate relationship between stress magnitude and power semiconductor device lifetime. Therefore, stress measurements that are estimates of cyclic thermal stress should not be considered lifetime predictions. Instead, the goal can be to provide a univariate numerical scale of relative stress magnitudes that tells how close the power semiconductor device thermal cycling operating point is to the known stress level(s). and How far is the power semiconductor device thermal cycle operating point from the known stress level(s)? This information can be useful, for example, if a finer representation of stress than that provided by classifier γ is required.

[0061] According to an embodiment, more collections can be added to the SMD To further improve the accuracy of the cyclic thermal stress estimate. Then, for each i∈{2,...,n} and n≥2, and The stress estimates between can be considered as rough life predictions over the time interval [τi-1...τi]. For example, and The example stress measurements ψ output between τ1 = 10.5 and τ2 = 15 can reasonably be interpreted as life predictions for the corresponding time interval [10.5...15] years. Obviously, by adding more sets And introduce the corresponding stress measurement value It is possible to construct more life intervals and fit more complex stress / life prediction models than provided by ψ.

[0062] According to an embodiment, in an extreme case, when D (τ) For any τ∈R ≥0 When formulated analytically, such as in the previous example with the SN curve, it is possible to formulate any triple (T min ,ΔT,f cyc ) is directly mapped to the corresponding life prediction value Function ξ: R 3 →R ≥0 Formally, this function can be given by an equation, which is a direct consequence of equation (1) defined above:

[0063]

[0064] Where N(T min , ΔT) can be calculated with the help of the SN curve, and k is the time unit of τ converted into the corresponding f cyc A conversion procedure for periodic time units.

[0065] Figure 7 An example of how the determined cyclic thermal stress estimate may be output, such as to be displayed to a user or operator in the form of a percentage is shown. For example, if during operation of the equipment, the equipment cyclic thermal stress estimate exceeds 100%, this may indicate that the equipment may fail before its expected life unless the cyclic thermal load is reduced. Conversely, a cyclic thermal stress estimate of less than 100% would indicate a low probability of equipment failure within its expected life, thereby ensuring the expected equipment life.

[0066] According to an embodiment, the power semiconductor device 10 may be controlled directly or indirectly in response to the determined cyclic thermal stress estimate. As an example, in response to the determined cyclic thermal stress estimate indicating that the cyclic thermal stress is above a predetermined threshold, the power semiconductor device 10 may be controlled so that the cyclic thermal stress of the power semiconductor device is reduced. For example, it is also possible to control the device or system in which the power semiconductor device 10 resides in response to the determined cyclic thermal stress estimate of the power semiconductor device. This can be implemented, for example, by controlling the voltage, current and / or switching time values ​​of the power semiconductor device 10 and / or the device or system in which the power semiconductor device 10 resides. However, appropriate control may depend on device and / or system characteristics.

[0067] According to embodiments, possible stress analyses based on the determined cyclic thermal stress estimates, such as classifiers γ or stress measurements ψ, may be implemented in various ways. For example, it may be possible to detect excessive thermal cycling stresses in, for example, equipment operating in the field based on the determined cyclic thermal stress estimates. For example, an operator or user of the equipment may then take timely action to mitigate the risk of premature component failure and / or unexpected production interruptions. Another possible use of the determined cyclic thermal stress estimates and the stress information they provide is to help determine component dimensions for cyclic applications. As an example, if a cyclic load curve is known, the thermal response may be derived. Then, for example, the stress estimates provided by the various embodiments may be used to identify appropriate sizing margins.

[0068] According to embodiments, the performance of determining cyclic thermal stress estimates according to various embodiments and combinations thereof may be substantially continuous and / or may be triggered based on, for example, monitoring needs, such as criticality of an application, changes in parameters, etc., and / or any other trigger that may depend on the characteristics of the system in question.

[0069] According to an embodiment, a system may include a power semiconductor device and an apparatus configured to perform the functionality of any one of the embodiments described herein or a combination thereof. According to an embodiment, the system may also include one or more temperature sensors configured to measure the temperature inside the power semiconductor device and send the temperature data to the apparatus.

[0070] The cyclic stress estimator 20 or other devices or combinations thereof for implementing at least part of the functionality of any one of the embodiments herein may be implemented as one physical unit or configured to implement two or more separate physical units of the functionality. Here, the term "unit" generally refers to a physical or logical entity, such as a physical device or a part thereof or a software routine. The cyclic stress estimator 20 or other devices for implementing at least part of the functionality of any one of the embodiments herein may be implemented at least in part by means of, for example, one or more computers or corresponding digital signal processing (DSP) equipment equipped with suitable software. Such a computer or digital signal processing equipment preferably includes at least a working memory (RAM) and a central processing unit (CPU) providing a storage area for arithmetic operations, such as a general-purpose digital signal processor. The CPU may include a set of registers, an arithmetic logic unit, and a control unit. The CPU control unit is controlled by a sequence of program instructions transferred from the RAM to the CPU. The CPU control unit may contain a number of microinstructions for basic operations. The implementation of the microinstructions may vary depending on the CPU design. The program instructions can be encoded by a programming language, which can be a high-level programming language, such as C, Java, etc., or a low-level programming language, such as a machine language or assembly language. The computer can also have an operating system, which can provide system services to the computer program written with the program instructions. The computer or other device implementing various embodiments or a part thereof can also include a suitable input device for receiving, for example, measurement and / or control data, and an output device for outputting, for example, control or any other data (such as a determined heat load). It is also possible to use one or more specific integrated circuits, such as an application specific integrated circuit (ASIC), a digital signal processing device (DSPD), a programmable logic device (PLD), a field programmable gate array (FPGA) and / or a separate electronic component and device for implementing the functionality according to any one of the embodiments.

[0071] Many electrical devices (such as electric power systems) and their components may include processors and memories, which may be used to implement the functionality of various embodiments described herein. Therefore, at least some modifications and configurations that may be required to implement the embodiments may be performed as software routines, which may be implemented as added or updated software routines. If at least the functional components of any embodiment in the embodiments are implemented by software, such software may be provided as a computer program product including a computer program code, which, when run on a computer, causes the computer or corresponding device to perform the functionality of the embodiments described herein. Such computer program code may be stored in or generally embodied in a computer-readable medium, such as a suitable memory, such as a flash memory or an optical memory, from which it may be loaded to one or more units that execute the program code. In addition, such computer program code of any embodiment in the implementation embodiments may be loaded to one or more units that execute the computer program code via, for example, a suitable data network, and it may replace or update the program code that may exist. Embodiments may provide a computer program embodied on any client-readable distribution / data storage medium or memory unit(s) or article(s), comprising program instructions executable by one or more processors / computers, which when loaded into a device constitute a monitoring device, or any corresponding unit or entity providing corresponding functionality, or at least part of the corresponding functionality. Programs, also referred to as program products, including software routines, program fragments constituting "program libraries", applets and macros, may be stored in any medium and may be downloaded to a device. In other words, for example, by means of Figures 1 to 7 Any one and any combination thereof, each or some or one of the possible units / sub-units and / or algorithms for one or more of the above functions / operations may be an element including one or more arithmetic logic units, multiple special registers and control circuits.

[0072] It is obvious to those skilled in the art that, as technology advances, the concepts of the present invention can be implemented in various ways. In addition, it is clear to those skilled in the art that the described exemplary embodiments can but need not be combined with other exemplary embodiments in various ways. The present invention and its embodiments are not limited to the above examples, but can be changed within the scope of the claims. If any exemplary embodiments and / or features described herein should not fall within the scope of the independent claims, these will be interpreted as examples that help understand the various embodiments of the present invention.

Claims

1. A computer-implemented method for estimating cyclic thermal stress of a power semiconductor device, the method comprising: receiving temperature data indicative of a temperature associated with the power semiconductor device; extracting thermal cycle data about more than a characteristic quantity of the thermal cycle of the power semiconductor device from the received temperature data; determining a thermal cycling operating point of the power semiconductor device based on the extracted thermal cycling data, the determining of the thermal cycling operating point of the power semiconductor device comprising averaging the thermal cycling data for more than one thermal cycle of the power semiconductor device over a period of time; and An estimate of the cyclic thermal stress of the power semiconductor device is determined based on the determined thermal cycling operating point of the power semiconductor device and a cyclic thermal stress model of the power semiconductor device, wherein the cyclic thermal stress model includes data indicating a stress level of the power semiconductor device at a predetermined thermal cycling operating point of the power semiconductor device. 2 . The computer-implemented method of claim 1 , wherein the characteristic quantity comprises a minimum or maximum temperature of a thermal cycle, a temperature variation of the thermal cycle, and a cycle length of the thermal cycle.

3. The computer-implemented method of claim 1 or 2, wherein the thermal cycling operating point of the power semiconductor device is defined by a single value of the minimum or maximum temperature of the power semiconductor device, the temperature variation, and a thermal cycling frequency. 4 . The computer-implemented method of claim 1 , wherein the data of the cyclic thermal stress model comprises at least one continuous set of predetermined thermal cycling operating points of the power semiconductor device defining a predetermined stress threshold level.

5. The computer-implemented method of claim 4 , wherein the data of the cyclic thermal stress model comprises a first contiguous set of predetermined thermal cycling operating points of the power semiconductor device and a second contiguous set of predetermined thermal cycling operating points of the power semiconductor device, the first contiguous set defining a first predetermined stress threshold level and the second contiguous set defining a second predetermined stress threshold level.

6. The computer-implemented method of claim 4 , wherein determining the estimated value of the cyclic thermal stress of the power semiconductor device comprises determining a relative position of the determined thermal cycling operating point of the power semiconductor device relative to at least one predetermined stress threshold level defined by at least one continuous set of the predetermined thermal cycling operating points of the power semiconductor.

7. The computer-implemented method of claim 4 , wherein determining the estimated value of the cyclic thermal stress of the power semiconductor device comprises determining a distance between the determined thermal cycling operating point of the power semiconductor device and at least one predetermined stress threshold level defined by at least one continuous set of the predetermined thermal cycling operating points of the power semiconductor.

8. A computer program product comprising program instructions, which, when executed by a computing device, cause the computing device to perform the method according to any one of claims 1 to 7.

9. A computer-readable medium comprising program instructions for causing a computing device to execute the method according to any one of the preceding claims 1 to 7.

10. An apparatus for estimating cyclic thermal stress of a power semiconductor device, the apparatus comprising: a device configured to receive temperature data indicative of a temperature associated with the power semiconductor device; means configured to extract thermal cycle data regarding characteristic quantities of more than one thermal cycle of the power semiconductor device from the received temperature data; a device configured to determine a thermal cycling operating point of the power semiconductor device based on the extracted thermal cycling data, the determination of the thermal cycling operating point of the power semiconductor device comprising averaging the thermal cycling data of the more than one thermal cycles of the power semiconductor device over a period of time; as well as A device configured to determine an estimate of the cyclic thermal stress of the power semiconductor device based on the determined thermal cycling operating point of the power semiconductor device and a cyclic thermal stress model of the power semiconductor device, wherein the cyclic thermal stress model includes data indicative of a stress level of the power semiconductor device at a predetermined thermal cycling operating point of the power semiconductor device.

11. The apparatus according to claim 11, further comprising means configured to perform the method according to any one of claims 2 to 8.

12. A system comprising: one or more power semiconductor devices; as well as A device according to claim 10 or 11. 13 . The system of claim 12 , further comprising one or more temperature sensors configured to measure a temperature associated with the power semiconductor device and transmit temperature data to the apparatus.

14. The system of claim 12, wherein the power semiconductor device comprises an insulated gate bipolar transistor.

Images