Temperature-independent reference current source and application thereof

Abstract

The invention discloses a temperature-independent reference current source and application thereof, the temperature-independent reference current source comprises a temperature-dependent resistor, a multi-voltage generation module and a compensation reference current generation module, and the temperature-dependent resistor is a temperature negative correlation resistor or a temperature positive correlation resistor; the multi-voltage generation module generates and outputs one or more of temperature positive correlation voltage, temperature negative correlation voltage and temperature-independent reference voltage, and the compensation reference current generation module generates temperature-independent reference current based on the temperature positive correlation voltage and temperature positive correlation resistance or the temperature negative correlation voltage and temperature negative correlation resistance. The reference current source can effectively compensate the temperature coefficient of the resistor so as to obtain the reference current irrelevant to the temperature, and the reference current source is wide in application range, flexible and simple in structure, high in practical value and wide in application prospect.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular to a temperature-independent reference current source and application thereof. Background Art

[0002] The reference current source is a critical unit of the integrated circuit, and its accuracy directly affects whether the chip can work properly. Taking Nor flash memory as an example, after the chip is powered on, a series of accurate clock signals are needed to read the parameter values ​​stored inside. These stored parameter values ​​are the values ​​that the designer has adjusted to make the chip in the best state. The accurate clock is generally achieved through the relaxation oscillator inside the chip. The relaxation oscillator requires a current source that does not change with temperature, so the reference current source is crucial in the memory chip.

[0003] The existing traditional reference current source generally converts the reference voltage into the reference current. However, since a resistor is required in the conversion process and a resistor that does not change with temperature cannot be realized under the existing process, the reference current source in the existing design will have a large temperature deviation when the temperature changes.

[0004] Therefore, designing a reference current source whose current output is not affected by temperature has become an urgent problem to be solved. Summary of the invention

[0005] In view of the deficiencies of the prior art, the present invention provides a temperature-independent reference current source, which can perform temperature compensation on the current source according to the temperature characteristics of the resistor, thereby obtaining a temperature-independent reference current.

[0006] The present invention solves the technical problem by adopting the following technical solution:

[0007] The present invention provides a temperature-independent reference current source, comprising a temperature-dependent resistor, a multi-voltage generation module and a compensation reference current generation module, wherein:

[0008] The temperature-dependent resistor is a temperature-negatively-dependent resistor or a temperature-positively-dependent resistor;

[0009] The multi-voltage generation module is connected to the power supply circuit and is configured to generate and output one or more of a temperature-positively correlated voltage, a temperature-negatively correlated voltage, and a temperature-independent reference voltage, wherein the temperature coefficients of the temperature-positively correlated voltage and the temperature-positively correlated resistor, and the temperature coefficients of the temperature-negatively correlated voltage and the temperature-negatively correlated resistor are respectively equal;

[0010] The compensation reference current generation module is connected to the power supply circuit and is configured to generate a reference current independent of temperature based on a temperature positively correlated voltage and a temperature positively correlated resistor or a temperature negatively correlated voltage and a temperature negatively correlated resistor.

[0011] Preferably, the multi-voltage generation module includes a bandgap reference source submodule and a voltage modulation submodule, wherein the voltage modulation submodule is connected to the bandgap reference source submodule and generates one or more of a temperature positively correlated voltage, a temperature negatively correlated voltage and a temperature independent reference voltage;

[0012] The compensation reference current generation module includes one or more of a temperature positive correlation modulation submodule or a temperature negative correlation modulation submodule, wherein:

[0013] The temperature positive correlation modulation submodule is connected to the temperature positive correlation resistor, and generates a reference current that is independent of temperature based on the temperature positive correlation voltage modulation;

[0014] The temperature negative correlation modulation submodule is connected to the temperature negative correlation resistor and generates a reference current that is independent of temperature based on temperature negative correlation voltage modulation.

[0015] Preferably, the bandgap reference source submodule specifically includes PMOS transistors PM1-PM3, transistors Q1-Q2, NMOS transistor NM1, and resistor R1, wherein:

[0016] The PMOS tubes PM1, PM2, and PM3 share a common source terminal and are connected to a power supply circuit;

[0017] The PMOS tubes PM1, PM2, and PM3 have a common gate terminal and are connected to the drain terminal of PM1;

[0018] The drain ends of the PMOS tubes PM1, PM2, and PM3 are connected to the drain end of the NMOS tube NM1, the collector of the transistor Q1, and the collector of the transistor Q2 respectively;

[0019] The transistors Q1 and Q2 have a common base and are connected to the collector of Q1;

[0020] The gate terminal of the NMOS tube NM1 is connected to the collector of the transistor Q2;

[0021] The source end of the NMOS tube NM1 is connected to the emitter of the transistor Q1 and connected to one end of the resistor R1;

[0022] The other end of the resistor R1 is connected to the emitter of the transistor Q2 and connected to the common ground terminal;

[0023] The voltage modulation submodule specifically includes a PMOS tube PM4, a transistor Q3, and resistors R2-R4, wherein:

[0024] The source end of the PMOS tube PM4 is connected to the power supply circuit and shares a gate end with the PMOS tube PM3;

[0025] The drain end of the PMOS tube PM4 is connected to one end of the resistor R4 and serves as a first output node to output a temperature positively correlated voltage;

[0026] The other end of the resistor R4 is connected to one end of the resistor R3 and serves as a second output node to output a temperature-independent reference voltage;

[0027] The other end of the resistor R3 is connected to one end of the resistor R2 and serves as a third output node to output a temperature negatively correlated voltage;

[0028] The other end of the resistor R2 is connected to the collector of the transistor Q3 and connected to the base of Q3;

[0029] The emitter of the transistor Q3 is connected to the common ground terminal;

[0030] The transistors Q1, Q2 and Q3 are all NPN type.

[0031] Preferably, the bandgap reference source submodule specifically includes PMOS transistors PM1-PM2, transistors Q1-Q2, a resistor R1 and a first operational amplifier, wherein:

[0032] The PMOS tubes PM1 and PM2 share a common source terminal and are connected to a power supply circuit;

[0033] The PMOS tubes PM1 and PM2 share a common gate terminal and are connected to the output terminal of the first operational amplifier;

[0034] The drain end of the PMOS tube PM1 is connected to one end of the resistor R1 and connected to the non-inverting input end of the first operational amplifier;

[0035] The other end of the resistor R1 is connected to the emitter of the transistor Q1;

[0036] The drain end of the PMOS tube PM2 is connected to the emitter of the transistor Q2 and connected to the inverting input end of the first operational amplifier;

[0037] The collectors and bases of the transistors Q1 and Q2 are both connected to a common ground terminal;

[0038] The voltage modulation submodule specifically includes a PMOS tube PM3, a transistor Q3, and resistors R2-R4, wherein:

[0039] The source end of the PMOS tube PM3 is connected to the power supply circuit and shares a gate end with the PMOS tube PM2;

[0040] The drain end of the PMOS tube PM3 is connected to one end of the resistor R4 and serves as a first output node to output a temperature positively correlated voltage;

[0041] The other end of the resistor R4 is connected to one end of the resistor R3 and serves as a second output node to output a temperature-independent reference voltage;

[0042] The other end of the resistor R3 is connected to one end of the resistor R2 and serves as a third output node to output a temperature negatively correlated voltage;

[0043] The other end of the resistor R2 is connected to the emitter of the transistor Q3;

[0044] The collector and base of the transistor Q3 are both connected to a common ground terminal;

[0045] The transistors Q1, Q2 and Q3 are all of PNP type.

[0046] Preferably, the temperature positive correlation modulation submodule specifically includes a PMOS tube PM5 and a second operational amplifier, wherein:

[0047] The source end of the PMOS tube PM5 is connected to the power supply circuit;

[0048] The inverting input terminal of the second operational amplifier is connected to a temperature positively correlated voltage;

[0049] The non-inverting input terminal of the second operational amplifier is connected to the drain terminal of the PMOS tube PM5 and is connected to the temperature positively correlated resistor R PTAT At one end, the temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal;

[0050] The gate end of the PMOS transistor PM5 is connected to the output end of the second operational amplifier.

[0051] Preferably, the temperature positive correlation modulation submodule specifically includes a PMOS tube PM5, a second operational amplifier and an NMOS tube NM2, wherein:

[0052] The source end of the PMOS tube PM5 is connected to the power supply circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM2;

[0053] The non-inverting input terminal of the second operational amplifier is connected to a temperature positively correlated voltage;

[0054] The inverting input terminal of the second operational amplifier is connected to the source terminal of the NMOS tube NM2 and is connected to the temperature positively correlated resistor R PTAT At one end, the temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal;

[0055] The gate terminal of the NMOS transistor NM2 is connected to the output terminal of the second operational amplifier.

[0056] Preferably, the temperature negative correlation modulation submodule specifically includes a PMOS tube PM6 and a third operational amplifier, wherein:

[0057] The source end of the PMOS tube PM6 is connected to the power supply circuit;

[0058] The inverting input terminal of the third operational amplifier is connected to a temperature negatively correlated voltage;

[0059] The in-phase input terminal of the third operational amplifier is connected to the drain terminal of the PMOS tube PM6 and is connected to the temperature negatively correlated resistor R CTAT One end, the temperature is negatively correlated with the resistance R CTAT The other end is connected to the common ground terminal;

[0060] The gate terminal of the PMOS transistor PM6 is connected to the output terminal of the third operational amplifier.

[0061] Preferably, the temperature negative correlation modulation submodule specifically includes a PMOS tube PM6, a third operational amplifier and an NMOS tube NM3, wherein:

[0062] The source end of the PMOS tube PM6 is connected to the power supply circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM3;

[0063] The non-inverting input terminal of the third operational amplifier is connected to a temperature negatively correlated voltage;

[0064] The inverting input terminal of the third operational amplifier is connected to the source terminal of the NMOS tube NM3 and is connected to the temperature negatively correlated resistor R CTAT One end, the temperature is negatively correlated with the resistance R CTAT The other end is connected to the common ground terminal;

[0065] The gate terminal of the NMOS tube NM3 is connected to the output terminal of the third operational amplifier.

[0066] Preferably, the width-to-length ratios of the PMOS tubes are the same;

[0067] The area ratio of the transistors Q1 and Q2 is n:1, where n≥2.

[0068] The present invention further provides a chip circuit, wherein the chip circuit comprises the temperature-independent reference current source as described above.

[0069] Compared with the prior art, the present invention has the following beneficial effects:

[0070] The multi-voltage generation module designed in the present invention can select one or more of the temperature positively correlated voltage, temperature negatively correlated voltage and temperature independent reference voltage to output as needed. Specifically, on the one hand, it can adjust the temperature negatively correlated voltage V equal to the temperature coefficient of the resistor based on the bandgap reference for the resistor negatively correlated with temperature. CTAT, compensate the resistance temperature coefficient, and obtain a reference current that is independent of temperature. On the other hand, it can also adjust the resistance that is positively correlated with temperature based on the bandgap reference to obtain a voltage V that is negatively correlated with temperature and equal to the resistance temperature coefficient. PTAT , compensate the resistance temperature coefficient, and obtain a reference current that is independent of temperature. At the same time, the designed compensation reference current generation module has a flexible and simple structure and can effectively combine the temperature-positively correlated voltage and the temperature-positively correlated resistance or the temperature-negatively correlated voltage and the temperature-negatively correlated resistance, and finally generate and output a reference current that is independent of temperature. The circuit has high practical value and broad application prospects.

[0071] Other outstanding essential features and significant improvements of the present invention compared to the prior art are further described in detail in the embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0073] Figure 1 is a schematic diagram of the structure of the temperature-independent reference current source in Example 1;

[0074] Figure 2 Schematic diagram of the circuit structure of the temperature positive correlation modulation submodule in Example 1;

[0075] Figure 3 Schematic diagram of the circuit structure of the temperature negative correlation modulation submodule in Example 1;

[0076] Figure 4 Schematic diagram of the circuit structure of the multi-voltage generating module in Example 1;

[0077] Figure 5 It is a simulation schematic diagram of a reference current source without temperature compensation in the prior art between -40°C and 125°C;

[0078] Figure 6 It is a schematic diagram of simulation of the temperature-independent reference current source in Example 1 between -40°C and 125°C;

[0079] Figure 7 Schematic diagram of the circuit structure of the multi-voltage generating module in Example 2;

[0080] Figure 8 Schematic diagram of the circuit structure of the temperature positive correlation modulation submodule in Example 2;

[0081] Fig. 9 Schematic diagram of the circuit structure of the temperature negative correlation modulation submodule in Example 2. DETAILED DESCRIPTION

[0082] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0083] It should be noted that certain names are used in the specification and claims to refer to specific components. It should be understood that a person of ordinary skill in the art may use different names to refer to the same component. The specification and claims of this application do not use differences in names as a way to distinguish components, but use substantial differences in the functions of components as the criterion for distinguishing components. As used in the specification and claims of this application, "including" or "comprising" is an open term, which should be interpreted as "including but not limited to" or "including but not limited to". The embodiments described in the specific implementation section are preferred embodiments of the present invention and are not intended to limit the scope of the present invention.

[0084] Example 1

[0085] like Figure 1 As shown, this embodiment provides a temperature-independent reference current source, including a temperature-dependent resistor, a multi-voltage generation module and a compensation reference current generation module, wherein:

[0086] In the existing process, according to the different resistance-temperature characteristics, the resistor can be divided into resistors R PTAT and the resistance R which is negatively correlated with temperature CTAT In this embodiment, the temperature-dependent resistor is a temperature-negatively dependent resistor R CTAT Or temperature positively correlated resistance R PTAT One of the above, those skilled in the art may need to select it by themselves, and will not be elaborated here. After the resistor is selected, the specific structure of the multi-voltage generating module and the compensation reference current generating module is matched and selected according to the needs;

[0087] The multi-voltage generation module in this embodiment is connected to the power supply circuit and is configured to generate and output one or more of a temperature positively correlated voltage, a temperature negatively correlated voltage and a temperature-independent reference voltage. Specifically, the multi-voltage generation module includes a bandgap reference source submodule and a voltage modulation submodule. The voltage modulation submodule is connected to the bandgap reference source submodule and generates one or more of a temperature positively correlated voltage, a temperature negatively correlated voltage and a temperature-independent reference voltage. In this embodiment, the temperature coefficients of the temperature positively correlated voltage and the temperature positively correlated resistor, and the temperature negatively correlated voltage and the temperature negatively correlated resistor are respectively equal;

[0088] In this embodiment, the compensation reference current generation module is connected to the power supply circuit and is configured to generate a voltage V PTAT The resistance R is positively correlated with the temperature PTAT Or the temperature negatively correlated voltage V CTAT The temperature-independent resistor generates a reference current I ref Specifically, the compensation reference current generation module in this embodiment includes one or more of a temperature positive correlation modulation submodule or a temperature negative correlation modulation submodule, wherein:

[0089] The temperature positive correlation modulation submodule is connected to the temperature positive correlation resistor R PTAT , and based on the temperature positive correlation voltage V PTAT Modulation generates a temperature-independent reference current I ref ;

[0090] The temperature negative correlation modulation submodule is connected to the temperature negative correlation resistor R CTAT , and based on the temperature negatively correlated voltage V CTAT Modulation generates a temperature-independent reference current I ref .

[0091] like Figure 1 As shown in this embodiment, the circuit structure of the temperature-dependent resistor 1, the multi-voltage generating module 2 and the compensation reference current generating module 3 is further specifically introduced:

[0092] The temperature positively correlated voltage V in the multi-voltage generating module 2 in this embodiment PTAT The voltage V is negatively correlated with the temperature CTAT All are obtained from the bandgap reference source. In this embodiment, the current I PTAT Get the reference voltage BG , thus generating a temperature positively correlated voltage V PTAT The voltage V is negatively correlated with the temperature CTAT Based on this principle, the present invention focuses on introducing two types of multi-voltage generating modules. This embodiment introduces a multi-voltage generating module 2 of the first structure. The multi-voltage generating module of the second structure, that is, the multi-voltage generating module designed based on the bandgap reference source of the traditional architecture is specifically introduced in Example 2.

[0093] like Figure 4The bandgap reference source submodule in this embodiment specifically includes PMOS tubes PM1-PM3, transistors Q1-Q2, NMOS tube NM1, and resistor R1, wherein the PMOS tubes PM1, PM2, and PM3 have a common source terminal and are connected to the power supply circuit; the PMOS tubes PM1, PM2, and PM3 have a common gate terminal and are connected to the drain terminal of PM1; the drain terminals of the PMOS tubes PM1, PM2, and PM3 are respectively connected to the drain terminal of the NMOS tube NM1, the collector of the transistor Q1, and the collector of the transistor Q2; the transistors Q1 and Q2 have a common base terminal and are connected to the collector of Q1; the gate terminal of the NMOS tube NM1 is connected to the collector of the transistor Q2; the source terminal of the NMOS tube NM1 is connected to the emitter of the transistor Q1 and is connected to one end of the resistor R1; the other end of the resistor R1 is connected to the emitter of the transistor Q2 and is connected to the common ground terminal;

[0094] like Figure 4 The voltage modulation submodule in this embodiment specifically includes a PMOS transistor PM4, a triode Q3, and resistors R2-R4, wherein the source end of the PMOS transistor PM4 is connected to the power supply circuit and shares a gate end with the PMOS transistor PM3; the drain end of the PMOS transistor PM4 is connected to one end of the resistor R4 and serves as a first output node to output a temperature positively correlated voltage V PTAT The other end of resistor R4 is connected to one end of resistor R3 and serves as the second output node to output the temperature-independent reference voltage V BG The other end of resistor R3 is connected to one end of resistor R2 and serves as the third output node to output a temperature negatively correlated voltage V CTAT ; The other end of the resistor R2 is connected to the collector of the transistor Q3 and connected to the base of Q3; the emitter of the transistor Q3 is connected to the common ground terminal;

[0095] In this embodiment, transistors Q1, Q2, and Q3 are all NPN type, and the area ratio of transistors Q1 and Q2 is n:1, n≥2;

[0096] The PMOS transistors PM1 , PM2 , PM3 , and PM4 in this example have the same width-to-length ratio.

[0097] Specifically analyze the multi-voltage generation module 2 in this embodiment:

[0098] like Figure 4 It can be seen that the current flowing through resistor R1 is 2I PTAT , according to the bandgap reference knowledge, the base B collector voltage V of the transistor be Has a negative temperature coefficient, where

[0099]

[0100] I in the above formula S is the saturation current of the transistor, I PTAT is the current flowing through transistors Q1 and Q2, and

[0101]

[0102] V in the above formula T is the thermal voltage, which has a positive temperature coefficient, so I PTAT has a positive temperature coefficient, so

[0103] V BG =V be3 +I PTAT (R2+R3);

[0104] By adjusting the values ​​of R2 and R3, a temperature-independent bandgap reference voltage V can be obtained. BG ;

[0105] Further:

[0106] V CTAT =V be3 +I PTAT R2;

[0107] V PTAT =V be3 +I PTAT (R2+R3+R4).

[0108] The temperature positive correlation modulation submodule in this embodiment has two structures. This embodiment introduces the first structure, and the other structure is specifically described in Example 2. Figure 2 As shown, the temperature positive correlation modulation submodule of this embodiment specifically includes a PMOS tube PM5 and a second operational amplifier OPA2, wherein:

[0109] The source end of the PMOS tube PM5 is connected to the power supply circuit;

[0110] The inverting input of the second operational amplifier OPA2 is connected to the temperature positively correlated voltage V PTAT ;

[0111] The in-phase input terminal of the second operational amplifier OPA2 is connected to the drain terminal of the PMOS tube PM5 and is connected to the temperature positively correlated resistor R PTAT One end, temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal;

[0112] The gate terminal of the PMOS tube PM5 is connected to the output terminal of the second operational amplifier OPA2.

[0113] The temperature negative correlation modulation submodule in this embodiment has two structures. This embodiment introduces the first structure, and the other structure is specifically described in Example 2. Figure 3The temperature negative correlation modulation submodule of this embodiment specifically includes a PMOS tube PM6 and a third operational amplifier OPA3, wherein:

[0114] The source end of the PMOS tube PM6 is connected to the power supply circuit;

[0115] The inverting input terminal of the third operational amplifier OPA3 is connected to the temperature negatively correlated voltage V CTAT ;

[0116] The in-phase input terminal of the third operational amplifier OPA3 is connected to the drain terminal of the PMOS tube PM6 and is connected to the temperature negatively correlated resistor R CTAT One end of the temperature negatively correlated resistor R CTAT The other end is connected to the common ground terminal;

[0117] The gate terminal of the PMOS tube PM6 is connected to the output terminal of the third operational amplifier OPA3.

[0118] The working principle of the above circuit in this embodiment is further analyzed in detail:

[0119] In (T min ,T max ) Temperature range: To obtain a reference current I that is independent of temperature ref , the specific design adjustment process is as follows:

[0120] The resistance R is negatively correlated with temperature. CTAT For example, let

[0121]

[0122] where α R is the resistor R CTAT The temperature coefficient of R CTAT , α R is a negative number; R Tmax The temperature is T max When the resistance R CTAT The resistance value, R Tmin The temperature is T min When the resistance R CTAT The resistance value, R avg Yes (T min ,T max )Interval resistance R CTAT The average value of the resistance;

[0123] ΔT=T max -T min

[0124] Adjust the voltage V that is negatively correlated with temperature CTAT ,make

[0125]

[0126] where α V It is a voltage V that is negatively correlated with temperature. CTAT The temperature coefficient of V CTAT , α V is a negative number; V Tmax The temperature is T max When voltage V CTAT The voltage value, V Tmin The temperature is T min When voltage V CTAT The voltage value, V avg Yes (T min ,T max )Interval resistance V CTAT The average voltage value of

[0127] α R is the inherent characteristic of the resistor, α V The resistance ratio can be adjusted to achieve different temperature coefficients. In the specific design, for the resistor R CTAT Alpha R , the ratio of resistors R1 and R2 can be adjusted so that

[0128] α R =α V

[0129] This results in a current source that is independent of temperature.

[0130] Similarly, the resistance R is positively correlated with temperature. PTAT , also using the above method, by adjusting the size of the resistor R3

[0131] α R =α V , thereby obtaining a current source that is independent of temperature, which will not be described in detail here.

[0132] In order to further compare and verify the superiority of this embodiment, the present invention simulates the reference current source without temperature compensation in the prior art, such as Figure 5 As shown, between -40℃ and 125℃, the reference current shows a positive correlation with temperature, and the current deviation is 303nA within this temperature range.

[0133] The reference current source of this embodiment is simulated and verified under the same conditions, and the reference current obtained is as follows: Figure 6 As shown in the figure, between -40℃ and 125℃, the current deviation is only 32nA, and the reference current is well compensated and basically independent of temperature.

[0134] Therefore, through the above simulation verification, it can be further confirmed that the reference current source in this embodiment can effectively perform temperature compensation, thereby achieving stable output of the reference current at different temperatures.

[0135] Example 2

[0136] In this embodiment, except for the module structure clearly indicated, the parts not specifically described are the same as those in Embodiment 1.

[0137] In this embodiment, the multi-voltage generation module includes a bandgap reference source submodule and a voltage modulation submodule. Specifically, Figure 7 The bandgap reference source submodule shown specifically includes PMOS transistors PM1-PM2, transistors Q1-Q2, a resistor R1 and a first operational amplifier OPA1;

[0138] Among them, the PMOS tubes PM1 and PM2 in this embodiment share a common source terminal and are connected to the power supply circuit; the PMOS tubes PM1 and PM2 share a common gate terminal and are connected to the output terminal of the first operational amplifier OPA1; the drain terminal of the PMOS tube PM1 is connected to one end of the resistor R1 and is connected to the non-inverting input terminal of the first operational amplifier OPA1; the other end of the resistor R1 is connected to the emitter of the transistor Q1; the drain terminal of the PMOS tube PM2 is connected to the emitter of the transistor Q2 and is connected to the inverting input terminal of the first operational amplifier OPA1; the collectors and bases of the transistors Q1 and Q2 are both connected to the common ground terminal;

[0139] like Figure 7 The voltage modulation submodule in the embodiment shown in the figure specifically includes a PMOS tube PM3, a triode Q3, and resistors R2-R4, wherein the source end of the PMOS tube PM3 is connected to the power supply circuit and shares a gate end with the PMOS tube PM2;

[0140] Specifically, the drain end of the PMOS tube PM3 is connected to one end of the resistor R4 and serves as the first output node to output a temperature positively correlated voltage V PTAT The other end of resistor R4 is connected to one end of resistor R3 and serves as the second output node to output the temperature-independent reference voltage V BG The other end of resistor R3 is connected to one end of resistor R2 and serves as the third output node to output a temperature negatively correlated voltage V CTAT ; The other end of the resistor R2 is connected to the emitter of the transistor Q3; the collector and base of the transistor Q3 are both connected to the common ground terminal;

[0141] In this embodiment, transistors Q1, Q2, and Q3 are all PNP type, and the area ratio of transistors Q1 and Q2 is n:1, n≥2;

[0142] The PMOS transistors PM1, PM2, and PM3 in this example have the same width-to-length ratio.

[0143] Similar to Example 1, in this embodiment

[0144]

[0145] like Figure 8 As shown in this embodiment, the temperature positive correlation modulation submodule specifically includes a PMOS tube PM5, a second operational amplifier OPA2 and an NMOS tube NM2, wherein:

[0146] The source end of the PMOS tube PM5 is connected to the power circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM2;

[0147] A voltage positively correlated to temperature is connected to the non-inverting input terminal of the second operational amplifier OPA2;

[0148] The inverting input terminal of the second operational amplifier OPA2 is connected to the source terminal of the NMOS tube NM2 and is connected to the temperature positively correlated resistor R PTAT One end, temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal;

[0149] The gate terminal of the NMOS tube NM2 is connected to the output terminal of the second operational amplifier OPA2.

[0150] like Fig. 9 As shown, the temperature negative correlation modulation submodule in this embodiment specifically includes a PMOS tube PM6, a third operational amplifier OPA3 and an NMOS tube NM3, wherein:

[0151] The source end of the PMOS tube PM6 is connected to the power circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM3;

[0152] A voltage negatively correlated to temperature is connected to a non-inverting input terminal of the third operational amplifier OPA3;

[0153] The inverting input terminal of the third operational amplifier OPA3 is connected to the source terminal of the NMOS tube NM3 and is connected to the temperature negatively correlated resistor R CTAT One end of the temperature negatively correlated resistor R CTAT The other end is connected to the common ground terminal;

[0154] The gate terminal of the NMOS tube NM3 is connected to the output terminal of the third operational amplifier OPA3.

[0155] The working principle and adjustment method of the circuit in this embodiment are the same as those in Example 1, and will not be described in detail here.

[0156] Example 3

[0157] This embodiment provides a chip circuit, which includes the temperature-independent reference current source as described in the above embodiments.

[0158] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0159] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A temperature-independent reference current source, characterized in that: It includes a temperature-dependent resistor, a multi-voltage generation module and a compensation reference current generation module, wherein: The temperature-dependent resistor is a temperature-negatively-dependent resistor or a temperature-positively-dependent resistor; The multi-voltage generation module is connected to the power supply circuit and is configured to generate and output one or more of a temperature-positively correlated voltage, a temperature-negatively correlated voltage, and a temperature-independent reference voltage, wherein the temperature coefficients of the temperature-positively correlated voltage and the temperature-positively correlated resistor, and the temperature coefficients of the temperature-negatively correlated voltage and the temperature-negatively correlated resistor are respectively equal; The compensation reference current generation module is connected to the power supply circuit and is configured to generate a reference current independent of temperature based on a temperature positively correlated voltage and a temperature positively correlated resistor or a temperature negatively correlated voltage and a temperature negatively correlated resistor.

2. A temperature-independent reference current source according to claim 1, characterized in that: The multi-voltage generation module includes a bandgap reference source submodule and a voltage modulation submodule, wherein the voltage modulation submodule is connected to the bandgap reference source submodule and generates one or more of a temperature positively correlated voltage, a temperature negatively correlated voltage and a temperature independent reference voltage; The compensation reference current generation module includes one or more of a temperature positive correlation modulation submodule or a temperature negative correlation modulation submodule, wherein: The temperature positive correlation modulation submodule is connected to the temperature positive correlation resistor, and generates a reference current that is independent of temperature based on the temperature positive correlation voltage modulation; The temperature negative correlation modulation submodule is connected to the temperature negative correlation resistor and generates a reference current that is independent of temperature based on temperature negative correlation voltage modulation.

3. A temperature-independent reference current source according to claim 2, characterized in that: The bandgap reference source submodule specifically includes PMOS tubes PM1-PM3, transistors Q1-Q2, NMOS tube NM1, and resistor R1, wherein: The PMOS tubes PM1, PM2, and PM3 share a common source terminal and are connected to a power supply circuit; The PMOS tubes PM1, PM2, and PM3 have a common gate terminal and are connected to the drain terminal of PM1; The drain ends of the PMOS tubes PM1, PM2, and PM3 are connected to the drain end of the NMOS tube NM1, the collector of the transistor Q1, and the collector of the transistor Q2 respectively; The transistors Q1 and Q2 have a common base and are connected to the collector of Q1; The gate terminal of the NMOS tube NM1 is connected to the collector of the transistor Q2; The source end of the NMOS tube NM1 is connected to the emitter of the transistor Q1 and connected to one end of the resistor R1; The other end of the resistor R1 is connected to the emitter of the transistor Q2 and connected to the common ground terminal; The voltage modulation submodule specifically includes a PMOS tube PM4, a transistor Q3, and resistors R2-R4, wherein: The source end of the PMOS tube PM4 is connected to the power supply circuit and shares a gate end with the PMOS tube PM3; The drain end of the PMOS tube PM4 is connected to one end of the resistor R4 and serves as a first output node to output a temperature positively correlated voltage; The other end of the resistor R4 is connected to one end of the resistor R3 and serves as a second output node to output a temperature-independent reference voltage; The other end of the resistor R3 is connected to one end of the resistor R2 and serves as a third output node to output a temperature negatively correlated voltage; The other end of the resistor R2 is connected to the collector of the transistor Q3 and connected to the base of Q3; The emitter of the transistor Q3 is connected to the common ground terminal; The transistors Q1, Q2 and Q3 are all NPN type.

4. A temperature-independent reference current source according to claim 2, characterized in that: The bandgap reference source submodule specifically includes PMOS tubes PM1-PM2, transistors Q1-Q2, a resistor R1 and a first operational amplifier, wherein: The PMOS tubes PM1 and PM2 share a common source terminal and are connected to a power supply circuit; The PMOS tubes PM1 and PM2 share a common gate terminal and are connected to the output terminal of the first operational amplifier; The drain end of the PMOS tube PM1 is connected to one end of the resistor R1 and connected to the non-inverting input end of the first operational amplifier; The other end of the resistor R1 is connected to the emitter of the transistor Q1; The drain end of the PMOS tube PM2 is connected to the emitter of the transistor Q2 and connected to the inverting input end of the first operational amplifier; The collectors and bases of the transistors Q1 and Q2 are both connected to a common ground terminal; The voltage modulation submodule specifically includes a PMOS tube PM3, a transistor Q3, and resistors R2-R4, wherein: The source end of the PMOS tube PM3 is connected to the power supply circuit and shares a gate end with the PMOS tube PM2; The drain end of the PMOS tube PM3 is connected to one end of the resistor R4 and serves as a first output node to output a temperature positively correlated voltage; The other end of the resistor R4 is connected to one end of the resistor R3 and serves as a second output node to output a temperature-independent reference voltage; The other end of the resistor R3 is connected to one end of the resistor R2 and serves as a third output node to output a temperature negatively correlated voltage; The other end of the resistor R2 is connected to the emitter of the transistor Q3; The collector and base of the transistor Q3 are both connected to a common ground terminal; The transistors Q1, Q2 and Q3 are all of PNP type.

5. A temperature-independent reference current source according to claim 2, characterized in that: The temperature positive correlation modulation submodule specifically includes a PMOS tube PM5 and a second operational amplifier, wherein: The source end of the PMOS tube PM5 is connected to the power supply circuit; The inverting input terminal of the second operational amplifier is connected to a temperature positively correlated voltage; The non-inverting input terminal of the second operational amplifier is connected to the drain terminal of the PMOS tube PM5 and is connected to the temperature positively correlated resistor R PTAT At one end, the temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal; The gate end of the PMOS transistor PM5 is connected to the output end of the second operational amplifier.

6. A temperature-independent reference current source according to claim 2, characterized in that: The temperature positive correlation modulation submodule specifically includes a PMOS tube PM5, a second operational amplifier and an NMOS tube NM2, wherein: The source end of the PMOS tube PM5 is connected to the power supply circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM2; The non-inverting input terminal of the second operational amplifier is connected to a temperature positively correlated voltage; The inverting input terminal of the second operational amplifier is connected to the source terminal of the NMOS tube NM2 and is connected to the temperature positively correlated resistor R PTAT At one end, the temperature is positively correlated with the resistance R PTAT The other end is connected to the common ground terminal; The gate terminal of the NMOS transistor NM2 is connected to the output terminal of the second operational amplifier.

7. A temperature-independent reference current source according to claim 2, characterized in that: The temperature negative correlation modulation submodule specifically includes a PMOS tube PM6 and a third operational amplifier, wherein: The source end of the PMOS tube PM6 is connected to the power supply circuit; The inverting input terminal of the third operational amplifier is connected to a temperature negatively correlated voltage; The in-phase input terminal of the third operational amplifier is connected to the drain terminal of the PMOS tube PM6 and is connected to the temperature negatively correlated resistor R CTAT One end, the temperature is negatively correlated with the resistance R CTAT The other end is connected to the common ground terminal; The gate terminal of the PMOS transistor PM6 is connected to the output terminal of the third operational amplifier.

8. A temperature-independent reference current source according to claim 2, characterized in that: The temperature negative correlation modulation submodule specifically includes a PMOS tube PM6, a third operational amplifier and an NMOS tube NM3, wherein: The source end of the PMOS tube PM6 is connected to the power supply circuit, and the drain end is connected to the gate end and connected to the drain end of the NMOS tube NM3; The non-inverting input terminal of the third operational amplifier is connected to a temperature negatively correlated voltage; The inverting input terminal of the third operational amplifier is connected to the source terminal of the NMOS tube NM3 and is connected to the temperature negatively correlated resistor R CTAT One end, the temperature is negatively correlated with the resistance R CTAT The other end is connected to the common ground terminal; The gate terminal of the NMOS tube NM3 is connected to the output terminal of the third operational amplifier.

9. A temperature-independent reference current source according to claim 3 or 4, characterized in that: The width-to-length ratios of the PMOS tubes are the same; The area ratio of the transistors Q1 and Q2 is n:1, where n≥2.

10. A chip circuit, characterized in that: The chip circuit includes a temperature-independent reference current source as described in any one of claims 1-9.

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