Cholesteric liquid crystal display screen driving framework and driving method thereof

By using specific combinations of PMOS and NMOS tubes and diodes in the cholesteric liquid crystal display driver architecture and generating and controlling multiple control signals, the problem of high span voltage requirements in the prior art has been solved, and a wider span voltage range and higher compatibility are achieved.

CN119559912AActive Publication Date: 2025-03-04ANHUI YUTU TECH CO LTD
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Patent Information

Application Number
CN202411880073.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2025-03-04
Estimated Expiration
2044-12-19

AI Technical Summary

Technical Problem

The existing cholesteric LCD display driver architecture requires high transducer pressure, resulting in very few supported source ICs and limited compatibility.

Method used

A cholesteric liquid crystal display driving architecture is proposed, including a specific combination of PMOS and NMOS tubes and diodes. By generating and controlling multiple control signals, the power supply switching of the common ACVcom electrode signal and the combination of synchronization with the source driving signal is realized, ensuring that the display screen enters the P state to enter the refresh scanning stage.

Benefits of technology

The cross-pressure range of cholesteric LCD display has been expanded and the compatibility of the display has been improved.

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Abstract

The invention discloses a cholesteric liquid crystal display screen driving architecture and a driving method thereof, the cholesteric liquid crystal display screen driving architecture comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a first diode and a second diode, the source electrode of the first PMOS transistor is connected with a power supply forward voltage, the drain electrode of the first PMOS transistor is electrically connected with a common end ACVcom of a cholesteric liquid crystal display screen, and the drain electrode of the first PMOS transistor is electrically connected with a common end ACVcom of the cholesteric liquid crystal display screen. The grid electrode of the first PMOS tube is connected with a first control signal used for controlling the connection of the forward voltage of the power supply. The source electrode of the first NMOS tube is connected with the negative voltage of the power supply, the drain electrode of the first NMOS tube is electrically connected with the common end ACVcom of the cholesteric liquid crystal display screen, and the grid electrode of the first NMOS tube is connected with a first control signal for controlling the connection of the negative voltage of the power supply; the source electrode of the second PMOS tube is grounded, and the drain electrode of the second PMOS tube is electrically connected with the negative electrode of the first diode. According to the cholesteric liquid crystal display screen driving framework and the driving method thereof, the cross-voltage range of the cholesteric liquid crystal display screen is expanded, and the compatibility of the cholesteric liquid crystal display screen is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of display screen driving, and in particular to a cholesteric liquid crystal display screen driving architecture and a driving method thereof. Background Art

[0002] Figure 1 It is a conventional cholesteric LCD single pixel drive architecture, which mainly consists of source line, gate line, com, TFT and pixel electrode. The source line is used to send data to the drain of TFT, the gate line controls the gate of TFT to control the TFT on or off, and the pixel electrode is connected to the source of TFT to receive and store data signals and form an electric field with the com electrode to control the deflection of the liquid crystal: the driving timing is as follows Figure 2 As shown in the figure, since com is DC, the voltage generated is small, only aV. Existing cholesteric liquid crystal products require a higher voltage, so the source ICs that support them are very rare, which limits the compatibility of liquid crystal active drive solutions. Summary of the invention

[0003] In order to solve the technical problems existing in the background technology, the present invention provides a cholesteric liquid crystal display screen driving architecture and a driving method thereof.

[0004] The present invention proposes a cholesteric liquid crystal display driving architecture, comprising a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube, a first diode, and a second diode. The source of the first PMOS tube is connected to a positive voltage of a power supply, the drain of the first PMOS tube is electrically connected to a common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the first PMOS tube is connected to a first control signal for controlling the positive voltage of the power supply to be turned on; the source of the first NMOS tube is connected to a negative voltage of the power supply, the drain of the first NMOS tube is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the first NMOS tube is connected to a first control signal for controlling the positive voltage of the power supply to be turned on. The first control signal for controlling the negative voltage of the power supply to be turned on; the source of the second PMOS tube is grounded, the drain of the second PMOS tube is electrically connected to the cathode of the first diode, the anode of the first diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the second PMOS tube is connected to the third control signal for controlling the common terminal ACVcom to be grounded; the drain of the second NMOS tube is grounded, the source of the second NMOS tube is electrically connected to the anode of the second diode, and the cathode of the second diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display; the gate of the first NMOS tube controls the third control signal for grounding the common terminal ACVcom.

[0005] Preferably, the absolute value of the negative voltage of the power supply is equal to the absolute value of the positive voltage of the power supply.

[0006] Preferably, the method further includes accessing a source driving signal for controlling a cholesteric liquid crystal display screen through a source driver.

[0007] A driving method of a cholesteric liquid crystal display screen driving architecture proposed in the present invention is applied to any of the cholesteric liquid crystal display screen driving architectures described above, and the method comprises:

[0008] Obtaining a common electrode signal and a preset source driving signal preset at the common terminal ACVcom;

[0009] Generate a first control signal, a second control signal, a third control signal, and a fourth control signal according to a voltage change corresponding to the common electrode signal;

[0010] The cholesteric liquid crystal display is powered on, and the power supply corresponding to the common electrode signal is switched on the common terminal ACVcom according to the first control signal, the second control signal, the third control signal, and the fourth control signal, and the preset source drive signal is synchronously combined to enable the cholesteric liquid crystal display to enter the P state to enter the refresh scanning stage.

[0011] Preferably, the voltage change corresponding to the common electrode signal is specifically converted from grounding to accessing a forward voltage, and the first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal, specifically, the first control signal is converted from grounding to a high level, the second control signal remains at a low level, the third control signal remains grounded, and the fourth control signal remains at a low level.

[0012] Preferably, the voltage change corresponding to the common electrode signal is specifically converted from the connected forward voltage to the ground, and the first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal, specifically, the first control signal is converted from a high level to the ground, the second control signal remains at a low level, the third control signal is converted from the ground to a high level, and the fourth control signal remains at a low level.

[0013] Preferably, the voltage change corresponding to the common electrode signal is specifically converted from grounding to connecting to a negative voltage, and the first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal, specifically, the first control signal remains grounded, the second control signal is converted from a low level to ground, the third control signal is converted from a high level to ground, and the fourth control signal remains at a low level.

[0014] Preferably, the voltage change corresponding to the common electrode signal is specifically converted from accessing a negative voltage to grounding, and the first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal, specifically, the first control signal remains grounded, the second control signal is converted from grounding to a low level, the third control signal remains grounded, and the fourth control signal is converted from a low level to a high level.

[0015] Preferably, before the cholesteric liquid crystal display screen enters the p-state, the common electrode signal and the source driving signal voltage at the same moment have opposite polarities.

[0016] In the present invention, the proposed cholesteric liquid crystal display driving architecture and driving method obtain the common electrode signal preset at the common terminal ACVcom and the preset source driving signal; generate the first control signal, the second control signal, the third control signal, and the fourth control signal according to the voltage change corresponding to the common electrode signal; power on the cholesteric liquid crystal display, perform power supply switching corresponding to the common electrode signal on the common terminal ACVcom according to the first control signal, the second control signal, the third control signal, and the fourth control signal, and synchronously combine the preset source driving signal to make the cholesteric liquid crystal display enter the P state to enter the refresh scanning stage. The cross-voltage range of the cholesteric liquid crystal display is expanded, and the compatibility of the cholesteric liquid crystal display is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 Schematic diagram of the prior art cholesteric liquid crystal display screen driving architecture;

[0018] Figure 2 It is a schematic diagram of the driving timing of a cholesteric liquid crystal display screen in the prior art;

[0019] Figure 3 A schematic diagram of a driving timing sequence of a cholesteric liquid crystal display screen proposed by the present invention;

[0020] Figure 4 A schematic diagram of the common-end Acvcom electric field structure of a cholesteric liquid crystal display screen driving architecture proposed by the present invention;

[0021] Figure 5 A schematic diagram of the positive and negative voltage switching structure of the common terminal Acvcom of a cholesteric liquid crystal display screen driving architecture proposed by the present invention;

[0022] Figure 6 A schematic diagram of the common-end Acvcom grounding structure of a cholesteric liquid crystal display driving architecture proposed by the present invention;

[0023] Figure 7 The present invention provides a driving timing structure diagram of a driving method of a cholesteric liquid crystal display screen driving architecture.

[0024] Legend: 1. Common line; 2. Gate line; 3. TFT transistor; 4. Source line; 5. Pixel unit. DETAILED DESCRIPTION

[0025] Reference Figure 1-7 The present invention proposes a cholesteric liquid crystal display driving architecture, comprising a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube, a first diode, and a second diode. The source of the first PMOS tube is connected to a positive voltage of a power supply, the drain of the first PMOS tube is electrically connected to a common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the first PMOS tube is connected to a first control signal for controlling the positive voltage of the power supply to be turned on; the source of the first NMOS tube is connected to a negative voltage of the power supply, the drain of the first NMOS tube is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the first NMOS tube is connected to a first control signal for controlling the positive voltage of the power supply to be turned on. The first control signal for controlling the negative voltage of the power supply to be turned on; the source of the second PMOS tube is grounded, the drain of the second PMOS tube is electrically connected to the cathode of the first diode, the anode of the first diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display, and the gate of the second PMOS tube is connected to the third control signal for controlling the common terminal ACVcom to be grounded; the drain of the second NMOS tube is grounded, the source of the second NMOS tube is electrically connected to the anode of the second diode, and the cathode of the second diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display; the gate of the first NMOS tube controls the third control signal for grounding the common terminal ACVcom.

[0026] Specifically, the absolute value of the negative voltage of the power supply is equal to the absolute value of the positive voltage of the power supply.

[0027] Specifically, it also includes accessing a source driving signal for controlling a cholesteric liquid crystal display screen through a source driver.

[0028] Figure 4 To determine the direction of the electric field during driving, an alternating voltage of equal amplitude can be provided between the two substrates of the LCD.

[0029] Reference Figure 1-7 The present invention provides a driving method of a cholesteric liquid crystal display screen driving architecture, which is applied to any of the above-mentioned cholesteric liquid crystal display screen driving architectures, and the method comprises:

[0030] Obtaining a common electrode signal and a preset source driving signal preset at the common terminal ACVcom;

[0031] Generate a first control signal, a second control signal, a third control signal, and a fourth control signal according to a voltage change corresponding to the common electrode signal;

[0032] The cholesteric liquid crystal display is powered on, and the power supply corresponding to the common electrode signal is switched on the common terminal ACVcom according to the first control signal, the second control signal, the third control signal, and the fourth control signal, and the preset source drive signal is synchronously combined to enable the cholesteric liquid crystal display to enter the P state to enter the refresh scanning stage.

[0033] In this embodiment, when the voltage change corresponding to the common electrode signal is specifically converted from grounding to connecting to a forward voltage, the first control signal is converted from grounding to a high level, the second control signal remains at a low level, the third control signal remains grounded, and the fourth control signal remains at a low level.

[0034] In this embodiment, when the voltage change corresponding to the common electrode signal is specifically converted from the connected forward voltage to the ground, the first control signal is converted from a high level to the ground, the second control signal remains at a low level, the third control signal is converted from the ground to a high level, and the fourth control signal remains at a low level.

[0035] In this embodiment, when the voltage change corresponding to the common electrode signal is specifically converted from grounding to connecting to a negative voltage, the first control signal remains grounded, the second control signal is converted from a low level to grounding, the third control signal is converted from a high level to grounding, and the fourth control signal remains at a low level.

[0036] In this embodiment, when the voltage change corresponding to the common electrode signal is specifically converted from connecting to a negative voltage to grounding, the first control signal remains grounded, the second control signal is converted from grounding to a low level, the third control signal remains grounded, and the fourth control signal is converted from a low level to a high level.

[0037] Specifically, before the cholesteric liquid crystal display screen enters the p-state, the common electrode signal and the source driving signal voltage polarities at the same moment are opposite.

[0038] In the specific working process of the cholesteric liquid crystal display driving architecture and driving method of the present embodiment, when Acvcom is a positive voltage, the first control signal is grounded, the second control signal is low level Low, the third control signal is high level High, and the fourth control signal is Low; before Acvcom is converted to a negative voltage, it is first connected to the ground for discharge, at which time the first control signal is high level High, the second control signal is low level Low, the third control signal is high level High, and the fourth control signal is Low; then Acvcom is converted to a negative voltage, at which time the first control signal is grounded, the second control signal is grounded, the third control signal is grounded, and the fourth control signal is Low; finally, Acvcom discharges to the ground, at which time the first control signal is grounded, the second control signal is low level Low, the third control signal is grounded, and the fourth control signal is High; after the discharge is completed, Acvcom will remain in a grounded state until the next picture is refreshed.

[0039] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A cholesteric liquid crystal display screen driving architecture, characterized in that: It includes a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube, a first diode, and a second diode. The source of the first PMOS tube is connected to the forward voltage of the power supply. The drain of the first PMOS tube is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display. The gate of the first PMOS tube is connected to a first control signal for controlling the forward voltage of the power supply to be turned on. The source of the first NMOS tube is connected to the negative voltage of the power supply, the drain of the first NMOS tube is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display screen, and the gate of the first NMOS tube is connected to the first control signal for controlling the negative voltage of the power supply to be turned on; the source of the second PMOS tube is grounded, the drain of the second PMOS tube is electrically connected to the cathode of the first diode, the anode of the first diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display screen, and the gate of the second PMOS tube is connected to the third control signal for controlling the grounding of the common terminal ACVcom; the drain of the second NMOS tube is grounded, the source of the second NMOS tube is electrically connected to the anode of the second diode, and the cathode of the second diode is electrically connected to the common terminal ACVcom of the cholesteric liquid crystal display screen; the gate of the first NMOS tube controls the third control signal for grounding the common terminal ACVcom.

2. The cholesteric liquid crystal display driving architecture according to claim 1, characterized in that: The absolute value of the negative voltage of the power supply is equal to the absolute value of the positive voltage of the power supply.

3. The cholesteric liquid crystal display driving architecture according to claim 2, characterized in that: The method also includes accessing a source driving signal for controlling a cholesteric liquid crystal display screen through a source driver.

4. A driving method of a cholesteric liquid crystal display screen driving architecture, characterized in that: Applied to the cholesteric liquid crystal display driving architecture according to any one of claims 1 to 3, the method comprises: Obtaining a common electrode signal and a preset source driving signal preset at the common terminal ACVcom; Generate a first control signal, a second control signal, a third control signal, and a fourth control signal according to a voltage change corresponding to the common electrode signal; The cholesteric liquid crystal display is powered on, and the power supply corresponding to the common electrode signal is switched on the common terminal ACVcom according to the first control signal, the second control signal, the third control signal, and the fourth control signal, and the preset source drive signal is synchronously combined to enable the cholesteric liquid crystal display to enter the P state to enter the refresh scanning stage.

5. The driving method of the cholesteric liquid crystal display driving architecture according to claim 4, characterized in that: The voltage change corresponding to the common electrode signal is specifically converted from grounding to accessing a forward voltage. The first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal. Specifically, the first control signal is converted from grounding to a high level, the second control signal remains at a low level, the third control signal remains grounded, and the fourth control signal remains at a low level.

6. The driving method of the cholesteric liquid crystal display driving architecture according to claim 4, characterized in that: The voltage change corresponding to the common electrode signal is specifically converted from the connected forward voltage to the ground. The first control signal, the second control signal, the third control signal, and the fourth control signal are generated according to the voltage change corresponding to the common electrode signal. Specifically, the first control signal is converted from a high level to the ground, the second control signal remains at a low level, the third control signal is converted from the ground to a high level, and the fourth control signal remains at a low level.

7. The driving method of the cholesteric liquid crystal display driving architecture according to claim 4, characterized in that: The voltage change corresponding to the common electrode signal is specifically converted from grounding to connecting to a negative voltage. According to the voltage change corresponding to the common electrode signal, a first control signal, a second control signal, a third control signal, and a fourth control signal are generated. Specifically, the first control signal remains grounded, the second control signal is converted from a low level to grounding, the third control signal is converted from a high level to grounding, and the fourth control signal remains at a low level.

8. The driving method of the cholesteric liquid crystal display driving architecture according to claim 4, characterized in that: The voltage change corresponding to the common electrode signal is specifically converted from the connected negative voltage to the ground. According to the voltage change corresponding to the common electrode signal, the first control signal, the second control signal, the third control signal, and the fourth control signal are generated. Specifically, the first control signal remains grounded, the second control signal is converted from ground to a low level, the third control signal remains grounded, and the fourth control signal is converted from a low level to a high level.

9. The driving method of the cholesteric liquid crystal display driving architecture according to claim 4, characterized in that: Before the cholesteric liquid crystal display screen enters the p-state, the common electrode signal and the source driving signal voltage have opposite polarities at the same time.

Citation Information

Patent Citations

  • LCD panel of thin-film transistor

    CN101441374A

  • Multi-voltage generation circuit and liquid crystal display device

    CN106057158A

  • Bistable chiral nematic liquid crystal display and method of driving the same

    CN1397060A

  • Voltage level shifting device for cholesteric liquid crystal display, has high voltage PMOS thick gate-oxide transistors and high voltage NMOS transistors, where gate of one NMOS transistor is connected to control input through inverter

    FR2884078A1

  • Display device, method of driving the same and electric equipment

    US20050068279A1