Bottom layer anti-tilting pretreatment process for electro-deposition of refractory metal layer on surface of wafer-level chip
By enhancing interface strength and preventing hydrogen diffusion on the wafer-level chip surface, the problems of electrodeposition refractory metal layer lifting, peeling and surface defects on the wafer-level chip surface are solved, and the adhesion and reliability of the film are improved.
Patent Information
- Application Number
- CN202411733126.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-03-04
AI Technical Summary
During the process of electrodeposition of refractory metal layers on the surface of wafer-level chips, problems such as lifting, peeling and surface defects often occur, which affect the reliability and performance of the device.
Methods of enhancing interface strength and preventing hydrogen diffusion are adopted, and specific steps include cleaning, magnetron sputtering SiO2 film, annealing treatment of bonding transition layer film, deposition of inorganic ceramic layer film, and electrodeposition of metal conductive layer film.
By enhancing the interface bonding force and preventing hydrogen diffusion, the adhesion between the metal layer and the substrate is significantly improved, effectively avoiding the peeling and lifting of the film during electrodeposition.
Smart Images
Figure HDA0005160797170000011 
Figure HDA0005160797170000012 
Figure HDA0005160797170000021
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of wafer-level chip surface metallization, in particular to a pre-treatment process for preventing warping of a base layer of a wafer-level chip surface by electro-depositing a refractory metal layer. Background Art
[0002] With the rapid development of semiconductor technology and microelectronic devices, wafer-level chips play a vital role in the fields of microelectronics, optoelectronics and micro-electromechanical systems. Wafer-level chips are usually processed on large-area wafer surfaces to achieve batch manufacturing of a large number of single chips. This processing method can effectively reduce production costs and improve chip consistency and reliability. In the production process of semiconductor manufacturing and microelectronic devices, surface electrodeposition of refractory metal layers is used to improve the electrical properties, high temperature resistance and corrosion resistance of chips, which has become a key technology. Electrodeposition technology is a process in which a layer of metal film is deposited on the surface of some plated objects through the action of electricity. Through electrodeposition, it can protect the plated object, effectively prevent the substrate from being corroded and worn, improve the electrical and thermal conductivity of the plated object (metal or non-metal), and increase hardness and durability. However, in practical applications, especially in the processing of wafer-level chips, the electrodeposited metal layer often faces problems such as warping, peeling and surface defects, which can significantly affect the reliability and performance of the device.
[0003] Traditional pre-treatment processes include cleaning of the substrate and deposition of the bottom metal. Although these methods can improve the adhesion and uniformity of the electrodeposited layer to a certain extent, they cannot solve the problem of huge compressive stress fluctuations in the base metal film caused by hydrogen infiltration during the electrodeposition process, resulting in peeling and warping. In order to solve these problems, the present invention proposes a pre-treatment process for preventing warping of the bottom layer for electrodepositing refractory metal layers on the surface of wafer-level chips. The process aims to enhance the adhesion between the metal layer and the substrate by enhancing the interface strength and inhibiting hydrogen diffusion, reduce the stress problem caused by hydrogen diffusion, and effectively prevent the warping and peeling of the electrodeposited refractory metal layer. Summary of the invention
[0004] The present invention provides a pretreatment process for preventing warping of a base layer of a refractory metal layer electrodeposited on a wafer-level chip surface, which adopts a method of enhancing interface strength and preventing hydrogen diffusion, thereby ensuring the adhesion of the film during the electrodeposition process and effectively avoiding peeling and warping of the film during the electrodeposition process.
[0005] The technical solution of the present invention is as follows:
[0006] A pre-treatment process for preventing the bottom layer from warping by electrodepositing a refractory metal layer on a wafer-level chip surface, the specific steps are as follows:
[0007] 1) Clean the surface of wafer-level chips: remove stains and grease on the chip surface;
[0008] 2) Magnetron sputtering of SiO on the surface of wafer-level chips 2 Thin film: Enhance interface bonding strength;
[0009] 3) In SiO 2 Magnetron sputtering bonding transition layer film on the film surface: enhance the interface bonding force and prevent the film from falling off;
[0010] 4) Annealing of the bonding transition layer film: annealing is used to promote the reaction between the bonding transition layer film and the chip, thereby enhancing the adhesion of the bonding transition layer film;
[0011] 5) Atomic layer deposition of inorganic ceramic film on the surface of bonding transition layer film: prevent hydrogen from penetrating into the bonding transition layer film during the electrodeposition process, and reduce the stress caused by hydrogen;
[0012] 6) Magnetron sputtering of a metal conductive layer film on the surface of an inorganic ceramic layer film: the inorganic ceramic layer film is non-conductive, and the metal conductive layer film serves as a seed layer for electrodeposition of a refractory metal layer;
[0013] 7) After the surface of the metal conductive layer film is subjected to photoresist mask patterning, the high melting point refractory metal (W, Mo, Ir and Re) and its alloy layer are prepared by electrodeposition technology.
[0014] Furthermore, cleaning the surface of the wafer-level chip includes: rinsing the wafer-level chip with deionized water, acetone and isopropyl ketone for 5-10 minutes respectively, and then drying at 150° C. for 20-40 minutes.
[0015] Furthermore, SiO2 is magnetron sputtered on the surface of the wafer-level chip. 2 The film includes: placing the cleaned wafer-level chip into the magnetron sputtering coating machine to magnetron sputter SiO 2 Thin film, film thickness is 10-20nm.
[0016] Furthermore, in SiO 2 The magnetron sputtering bonding transition layer film on the film surface is a Ti, Ta, Cr or Co layer; the film thickness is 10-200nm.
[0017] Furthermore, the bonding transition layer film annealing treatment includes: placing the bonding transition layer film in a forming gas (95% Ar + 5% H 2 ) for 10-150 minutes.
[0018] Furthermore, the inorganic ceramic layer film of the bonding transition layer film surface atomic layer deposition includes: using atomic layer deposition method to deposit Al on the surface of the annealed wafer-level chip 2 O3 、SiO 2 、TiO 2 Cr 2 O 3 An inorganic ceramic layer film selected from BN or TiC, with a film thickness of 10-50nm.
[0019] Furthermore, magnetron sputtering NiFe, NiCo, CoFe or Au metal conductive layer film on the surface of the inorganic ceramic layer film includes: placing a wafer-level chip deposited with a metal conductive layer film into a magnetron sputtering coating machine to magnetron sputter the metal conductive layer film, and the film thickness is 10-100nm.
[0020] Furthermore, the electrodeposition of a refractory metal layer on the surface of the metal conductive layer film includes: subjecting the wafer-level chip deposited with the metal conductive layer film to photoresist mask patterning processing, and then placing the chip in an electrolyte to electrodeposit a high-melting-point refractory metal (W, Mo, Ir and Re) and its alloy layer, wherein the film thickness is 0.1-5 μm.
[0021] The beneficial effects of the present invention are:
[0022] 1) The present invention deposits a bonding transition layer film (Ti, Ta, Cr or Co) on the surface of a wafer-level chip and performs an annealing treatment on it. By promoting the reaction between the bonding transition layer film and the chip during the annealing process, a stronger chemical bond is formed. Annealing causes the oxygen in the silicon dioxide layer of the chip to react with the bonding transition layer (Ti, Ta, Cr and Co, etc.) to generate titanium oxide (tantalum, chromium and cobalt, etc.), thereby enhancing the adhesion of the bonding transition layer film.
[0023] 2) The present invention deposits a layer of Al on the Ti (Ta, Cr and Co bonding transition layer) film 2 O 3 (SiO 2 、TiO 2 Cr 2 O 3 , BN and TiC and other inorganic ceramic layers) thin films as hydrogen diffusion barriers. 2 O 3 (SiO 2 、TiO 2 Cr 2 O 3 , BN and TiC and other inorganic ceramic layers) prevent hydrogen from penetrating into the Ti (Ta, Cr and Co and other bonding transition layers) film during the electrodeposition process, reducing the stress caused by hydrogen, ensuring the adhesion of the film during the electrodeposition process, and effectively avoiding the peeling and warping of the film during the electrodeposition process. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1The schematic diagram of the surface structure of the wafer-level chip of the present invention. 1-wafer-level chip; 2-SiO 2 film; 3-transition metal layer film; 4-inorganic ceramic layer film; 5-seed layer; 6-refractory metal layer.
[0025] Figure 2 This is a macroscopic photograph of the refractory metal film prepared in Example 1.
[0026] Figure 3 SEM image of the surface of the refractory metal film prepared in Comparative Example 1
[0027] Figure 4 SEM image of the surface of the refractory metal film prepared in Comparative Example 2
[0028] Figure 5 This is the surface SEM image of the refractory metal film prepared in Example 2.
[0029] Figure 6 This is the cross-sectional SEM image of the refractory metal film prepared in Comparative Example 3.
[0030] Figure 7 Surface SEM image and EDS point scan of the refractory metal film prepared in Comparative Example 4. DETAILED DESCRIPTION
[0031] In order to make the purpose, technical solution and advantages of the invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0032] Example 1
[0033] In this embodiment, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10 mm × 10 mm × 1 mm. The structural design is shown in Figure 1 , the implementation steps are:
[0034] Step S1: Rinse the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then dry it at 150° C. for 30 minutes.
[0035] Step S2: Place the cleaned wafer-level chip into a magnetron sputtering coating machine and evacuate the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0036] Step S3: Place the cleaned wafer-level chip into a magnetron sputtering coating machine and evacuate the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0037] Step S4: Place the Ti film in a forming gas (95% Ar + 5% H 2 ) and annealed for 10 minutes.
[0038] Step S5: After saturated vapor of trimethylaluminum is introduced into the reaction chamber as a precursor gas, the chip is flushed with argon gas, oxygen is introduced as an oxygen source, and the chip is flushed with argon gas again. The working pressure is 1.2 Pa, the microwave power is 50 W, the RF power is 100 W, the deposition temperature is 200 ° C, and Al 2 O 3 The film thickness is 40 nm.
[0039] Step S6: depositing Al 2 O 3 The wafer-level chip of the thin film is placed in the magnetron sputtering coating machine, and the coating equipment is evacuated (<4.0×10 -4 Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0040] Step S7: placing the wafer-level chip deposited with NiFe film in an Ir plating solution for electroplating; the Ir plating solution composition includes: 5g / L iridium salt aqueous solution; the process conditions for electroplating Ir: the anode material is platinum sheet, the current density is 0.3A / dm 2 , temperature is 60℃, pH is 2.5; coating thickness is 1.5μm.
[0041] Experimental results: Figure 2 As shown in the figure, the refractory metal was successfully deposited to form a film with a smooth surface and dense structure. The film was tightly bonded to the substrate without any peeling or delamination observed, showing good interfacial adhesion.
[0042] Comparative Example 1
[0043] Comparative Example 1 is different from Example 1 in that the Ti film is not placed in a forming gas (95% Ar + 5% H 2) and other operations are the same as in Example 1.
[0044] In this comparative example, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10mm×10mm×1mm. The implementation steps are as follows:
[0045] Step S1: Rinse the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then dry it at 150° C. for 30 minutes.
[0046] Step S2: Place the cleaned wafer-level chip into a magnetron sputtering coating machine and evacuate the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0047] Step S3 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0048] Step S4 specifically includes: after introducing trimethylaluminum saturated vapor as a precursor gas into the reaction chamber, the chip is flushed with argon gas, oxygen is introduced as an oxygen source, and the chip is flushed with argon gas again, the working gas pressure is 1.2 Pa, the microwave power is 50 W, the radio frequency power is 100 W, the deposition temperature is 200 ° C, Al 2 O 3 The film thickness is 40 nm.
[0049] Step S5 specifically includes: depositing Al 2 O 3 The wafer-level chip of the thin film is placed in the magnetron sputtering coating machine, and the coating equipment is evacuated (<4.0×10 -4 Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0050] Step S6 specifically includes: placing the wafer-level chip deposited with NiFe film in an Ir plating solution for electroplating; the Ir plating solution composition includes: 5g / L iridium salt aqueous solution; the process conditions for electroplating Ir: the anode material is platinum sheet, the current density is 0.3A / dm 2 , temperature is 60℃, pH is 2.5; coating thickness is 1.5μm.
[0051] Figure 3 Experimental results: The film peeled off during the electrodeposition process.
[0052] Comparative Example 2
[0053] Comparative Example 2 is different from Example 1 in that Al is not deposited on the surface of the Ti film. 2 O 3 film.
[0054] In this comparative example, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10mm×10mm×1mm. The implementation steps are as follows:
[0055] Step S1 specifically includes: washing the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then drying at 150° C. for 30 minutes.
[0056] Step S2 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0057] Step S3 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0058] Step S4 specifically includes: placing the Ti film in a forming gas (95% Ar + 5% H 2 ) and annealed for 10 minutes.
[0059] Step S5 includes: placing the wafer-level chip deposited with the Ti film into a magnetron sputtering coating machine, evacuating the coating equipment (<4.0×10 -4 Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0060] Step S6 specifically includes: placing the wafer-level chip deposited with NiFe film in an Ir plating solution for electroplating; the Ir plating solution composition includes: 5g / L iridium salt aqueous solution; the process conditions for electroplating Ir: the anode material is platinum sheet, the current density is 0.3A / dm 2 , temperature is 60℃, pH is 2.5; coating thickness is 1.5μm.
[0061] Figure 4 Experimental results: The film peeled off during the electrodeposition process.
[0062] Example 2
[0063] In this embodiment, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10 mm × 10 mm × 1 mm. The structural design is shown in Figure 1 , the implementation steps are:
[0064] Step S1 specifically includes: washing the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then drying at 150° C. for 30 minutes.
[0065] Step S2 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0066] Step S3 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0067] Step S4 specifically includes: placing the Ti film in a forming gas (95% Ar + 5% H 2 ) and annealed for 10 minutes.
[0068] Step S5 specifically includes: after introducing trimethylaluminum saturated vapor as a precursor gas into the reaction chamber, the chip is flushed with argon gas, oxygen is introduced as an oxygen source, and the chip is flushed with argon gas again, the working gas pressure is 1.2 Pa, the microwave power is 50 W, the radio frequency power is 100 W, the deposition temperature is 200 ° C, Al 2 O 3 The film thickness is 40 nm.
[0069] Step S6 specifically includes: depositing Al 2 O 3 The wafer-level chip of the thin film is placed in the magnetron sputtering coating machine, and the coating equipment is evacuated (<4.0×10 -4 Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0070] Step S7 specifically includes: placing the wafer-level chip on which the NiFe film has been deposited in a Ni-W plating solution for electroplating; the Ni-W plating solution comprises: nickel sulfate (NiSO 4 )2.5g / L, sodium tungstate (Na 2 WO 4 )130g / L and sodium citrate (Na 3 C 6 H 5 O 7 )150g / L; Process conditions for electroplating Ni-W: anode material is platinum sheet, current density is 1A / dm 2 , temperature is 75℃, pH is 8; coating thickness is 1.5μm.
[0071] Experimental results: Figure 5 As shown in the figure, the refractory metal was successfully deposited to form a film with a smooth surface and dense structure. The film was tightly bonded to the substrate without any peeling or delamination observed, showing good interfacial adhesion.
[0072] Comparative Example 3
[0073] In this comparative example, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10mm×10mm×1mm. The implementation steps are as follows:
[0074] Step S1 specifically includes: washing the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then drying at 150° C. for 30 minutes.
[0075] Step S2 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0076] Step S3 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0077] Step S4 specifically includes: after introducing trimethylaluminum saturated vapor as a precursor gas into the reaction chamber, the chip is flushed with argon gas, oxygen is introduced as an oxygen source, and the chip is flushed with argon gas again, the working gas pressure is 1.2 Pa, the microwave power is 50 W, the radio frequency power is 100 W, the deposition temperature is 200 ° C, Al 2 O 3 The film thickness is 40 nm.
[0078] Step S5 specifically includes: depositing Al 2 O 3 The wafer-level chip of the thin film is placed in the magnetron sputtering coating machine, and the coating equipment is evacuated (<4.0×10 -4 Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0079] Step S6 specifically includes: placing the wafer-level chip on which the NiFe film has been deposited in a Ni-W plating solution for electroplating; the Ni-W plating solution comprises: nickel sulfate (NiSO 4 )2.5g / L, sodium tungstate (Na 2 WO 4 )130g / L and sodium citrate (Na 3 C6 H 5 O 7 )150g / L; Process conditions for electroplating Ni-W: anode material is platinum sheet, current density is 1A / dm 2 , temperature is 75℃, pH is 8; coating thickness is 1.5μm.
[0080] Experimental results: Figure 6 As shown, the film peels off during the electrodeposition process.
[0081] Comparative Example 4
[0082] In this comparative example, the sample used is a wafer-level chip, which is a rectangular parallelepiped with a size of 10mm×10mm×1mm. The implementation steps are as follows:
[0083] Step S1 specifically includes: washing the wafer-level chip with deionized water, acetone and isopropyl ketone for 5 minutes respectively, and then drying at 150° C. for 30 minutes.
[0084] Step S2 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<4.5×10 -4 Pa), the sputtering gas is argon, and the other reaction gas is oxygen. SiO is prepared on the chip surface. 2 The film was deposited at a sputtering rate of 0.13 nm / s, an argon flow rate of 31 sccm, an oxygen flow rate of 37 sccm, a sputtering time of 2 min, and SiO 2 The thickness of the film is 15 nm.
[0085] Step S3 specifically includes: placing the cleaned wafer-level chip into a magnetron sputtering coating machine, evacuating the coating equipment (<9.3×10 -6 Pa), the target material is a titanium target with a purity of 99.9%, and argon is used as the working gas to prepare a metal Ti film on the chip surface, wherein the sputtering temperature is 200°C, the target-substrate distance is 7 cm, the current is 1.0 A, the sputtering power is 130 W, the sputtering time is 50 min, and the thickness of the Ti film is 200 nm.
[0086] Step S4 specifically includes: placing the Ti film in a forming gas (95% Ar + 5% H 2 ) and annealed for 10 minutes.
[0087] Step S5 includes: placing the wafer-level chip deposited with the Ti film into a magnetron sputtering coating machine, evacuating the coating equipment (<4.0×10 -4Pa), the target material is NiFe with a purity of 99.9%, argon is used as the working gas, the sputtering temperature is 300°C, the target-substrate distance is 11 cm, the current is 0.8 A, the sputtering power is 180 W, the sputtering time is 10 min, and the thickness of the NiFe film is 10 nm.
[0088] Step S6 specifically includes: placing the wafer-level chip on which the NiFe film has been deposited in a Ni-W plating solution for electroplating; the Ni-W plating solution comprises: nickel sulfate (NiSO 4 )2.5g / L, sodium tungstate (Na 2 WO 4 )130g / L and sodium citrate (Na 3 C 6 H 5 O 7 )150g / L; Process conditions for electroplating Ni-W: anode material is platinum sheet, current density is 1A / dm 2 , temperature is 75℃, pH is 8; coating thickness is 1.5μm.
[0089] Experimental results: Figure 7 As shown, the film peels off during the electrodeposition process, and the elemental Si in the substrate is exposed.
[0090] According to the results of the examples and comparative examples, the method of combining enhanced interface strength and suppressed hydrogen diffusion can significantly reduce the stress problem caused by hydrogen penetration. The method effectively improves the adhesion of the film during the electrodeposition process and avoids the peeling and warping of the film during the electrodeposition process.
[0091] Comparative Example 5
[0092] Compared with Example 1, Comparative Example 5 differs in that the thickness of the bonding transition layer is 600 nm, and other operations are the same as those of Example 1.
[0093] The results show that if the bonding transition layer is too thick, it may lead to a large difference in thermal expansion coefficients between the iridium metal layer and the substrate, and the iridium film may peel off and warp during the electrodeposition process.
[0094] Comparative Example 6
[0095] Compared with Example 1, Comparative Example 6 has the following difference: the thickness of the inorganic ceramic layer is 100 nm, and other operations are the same as those of Example 1.
[0096] The results show that excessive thickness of the inorganic ceramic layer may lead to increased stress, which may cause the Ir film to peel off and warp during the electrodeposition process.
[0097] Comparative Example 7
[0098] Compared with Example 1, Comparative Example 7 differs in that the inorganic ceramic layer is prepared first and the bonding transition layer is prepared later. Other operations are the same as those in Example 1.
[0099] The preparation of an adhesive transition layer on an inorganic ceramic layer will face the problem of weak interface bonding, which increases the difficulty of subsequent deposition of the metal layer. The deposition of the iridium layer thin film may cause peeling and warping.
[0100] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.
Claims
1. A pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip, characterized in that: The specific steps are as follows: (1) Cleaning the surface of wafer-level chips; (2) magnetron sputtering SiO2 layer on the surface of wafer-level chip; (3) magnetron sputtering bonding transition layer on the surface of SiO2 layer; the bonding transition layer is Ti, Cr or Co layer; (4) Annealing the bonding transition layer; (5) an inorganic ceramic layer deposited by atomic layer deposition on the surface of the bonding transition layer; the inorganic ceramic layer is one of Al2O3, SiO2, TiO2, Cr2O3, BN or TiC; (6) magnetron sputtering a metal conductive layer on the surface of the inorganic ceramic layer, the metal conductive layer serving as a seed layer for electrodeposition of a refractory metal layer; (7) The surface of the metal conductive layer is subjected to a photoresist mask patterning process, and a high melting point refractory metal and its alloy layer are prepared by an electrodeposition technique; the high melting point refractory metal is one or more of W, Mo, Ir and Re.
2. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip according to claim 1, characterized in that: The cleaning step (1) is as follows: the wafer-level chip is rinsed with deionized water, acetone and isopropyl ketone for 5-10 minutes respectively, and then dried at 150° C. for 20-40 minutes.
3. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip according to claim 1, characterized in that: Step (2) The thickness of the SiO2 layer is 10-20 nm.
4. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on a wafer-level chip surface according to claim 1, characterized in that: The thickness of the bonding transition layer is 10-200nm.
5. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip according to claim 1, characterized in that: Step (4) annealing treatment is: placing the bonding transition layer in a 95% Ar+5% H2 mixed gas at 200-700°C and annealing for 10-150 minutes.
6. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip according to claim 1, characterized in that: Step (5) is to use atomic layer deposition to deposit an inorganic ceramic layer on the surface of the wafer-level chip after annealing, and the thickness of the inorganic ceramic layer is 10-50nm.
7. The pre-treatment process for preventing the base layer from warping by electrodepositing a refractory metal layer on the surface of a wafer-level chip according to claim 1, characterized in that: The metal conductive layer is one of NiFe, NiCo, CoFe and Au conductive layers, and the thickness of the metal conductive layer is 10-100nm.
8. The pre-treatment process for preventing the bottom layer from warping by electrodepositing a refractory metal layer on a wafer-level chip surface according to claim 1, characterized in that: The thickness of the electrodeposited high melting point refractory metal or high melting point refractory metal alloy layer is 0.1-5 μm.