Light-emitting substrate and manufacturing method thereof

Abstract

The invention discloses a light-emitting substrate and a manufacturing method thereof. The light-emitting substrate comprises a base layer; the light-emitting chips are arranged on the base layer, each light-emitting chip comprises a first electrode, a second electrode and a light-emitting main body, the first electrode is located between the light-emitting main body and the base layer, and the light-emitting main body comprises a first semiconductor layer, a light-emitting functional layer and a second semiconductor layer which are sequentially arranged in the direction away from the first electrode; the second electrode is electrically connected with the second semiconductor layer; a groove is formed in the light-emitting main body and at least penetrates through the first semiconductor layer and the light-emitting functional layer in the thickness direction of the light-emitting main body, so that the light-emitting functional layer is divided into a plurality of light-emitting parts, and the first semiconductor layer is divided into a plurality of first semiconductor parts; the first electrode comprises a plurality of first sub-electrodes which are arranged at intervals, and the first sub-electrodes are connected with the first semiconductor parts in a one-to-one correspondence manner; and the plurality of first sub-electrodes of the same light-emitting chip are configured to load voltages in the same state.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a light-emitting substrate and a manufacturing method thereof. Background Art

[0002] Micro inorganic light-emitting diodes include MiniLED and MicroLED. MiniLED refers to light-emitting diode (LED) chips with a grain size of about 100 to 300 microns. MicroLED refers to light-emitting diode chips with a grain size of less than 100 microns. MiniLED / MicroLED display devices have the advantages of low power consumption, high brightness, high resolution, high color saturation, fast response speed, long life, and high efficiency. Summary of the invention

[0003] In a first aspect, the present disclosure provides a light-emitting substrate, comprising:

[0004] Grassroots;

[0005] A plurality of light-emitting chips are arranged on the base layer, the light-emitting chips comprising: a first electrode, a second electrode and a light-emitting body, the first electrode is located between the light-emitting body and the base layer, the light-emitting body comprises a first semiconductor layer, a light-emitting functional layer and a second semiconductor layer arranged in sequence in a direction away from the first electrode; the second electrode is electrically connected to the second semiconductor layer; a groove is provided on the light-emitting body, the groove at least penetrates the first semiconductor layer and the light-emitting functional layer in a thickness direction of the light-emitting body, so as to divide the light-emitting functional layer into a plurality of light-emitting parts, and divide the first semiconductor layer into a plurality of first semiconductor parts; the first electrode comprises a plurality of first sub-electrodes spaced from each other, and the first sub-electrodes are connected to the first semiconductor parts in a one-to-one correspondence;

[0006] The plurality of first sub-electrodes of the same light-emitting chip are configured to load voltages of the same state, so that the light-emitting states of the plurality of light-emitting portions are the same.

[0007] In some embodiments, the light emitting body and the second electrode are located on the same side of the second semiconductor layer.

[0008] In some embodiments, the second electrode is located on a side of the second semiconductor layer away from the light emitting body.

[0009] In some embodiments, the sum of the light emitting areas of the plurality of light emitting portions is 50% to 80% of the orthographic projection area of ​​the second semiconductor layer on the base layer.

[0010] In some embodiments, the light emitting chip further includes a reflective layer, which is disposed in the groove and is used to reflect the light irradiated from the light emitting portion to the reflective layer toward the second semiconductor layer.

[0011] In some embodiments, the light emitting chip further comprises: a plurality of current spreading layers, the current spreading layers corresponding to the first sub-electrodes one by one, and the first sub-electrodes being electrically connected to the first semiconductor layer through the current spreading layers;

[0012] The trench has a first opening facing away from the second semiconductor layer, and an orthographic projection of the current spreading layer on the base layer overlaps with an orthographic projection of the first opening on the base layer;

[0013] An orthographic projection of the reflective layer on the base layer has no overlap with an orthographic projection of the current spreading layer on the base layer.

[0014] In some embodiments, the maximum distance from the reflective layer to the base layer is greater than or equal to the distance from the surface of the light emitting portion away from the base layer to the base layer;

[0015] The minimum distance from the reflective layer to the base layer is less than or equal to the distance from the surface of the light emitting portion close to the base layer to the base layer.

[0016] In some embodiments, the reflective layer is conformal to the inner wall of the groove, and the cross-sectional area of ​​the groove gradually decreases in a direction away from the base layer;

[0017] The cross section of the groove is a cross section of the groove parallel to the base layer.

[0018] In some embodiments, an orthographic projection of the first electrode on the base layer has no overlap with an orthographic projection of the reflective layer on the base layer.

[0019] In some embodiments, the first electrode and the reflective layer are made of the same material.

[0020] In some embodiments, the light-emitting chip also includes a passivation layer, which covers at least the side walls of the groove and the surface of the current spreading layer away from the first semiconductor layer. The reflective layer is arranged on the surface of the passivation layer away from the inner wall of the groove, and the first sub-electrode is electrically connected to the current spreading layer through a via hole penetrating the passivation layer.

[0021] In some embodiments, the current spreading layer includes a first surface facing the first semiconductor layer, a second surface facing away from the first semiconductor layer, and a side surface connected therebetween, the first surface includes a first subsurface in contact with the first semiconductor layer, and a second subsurface not in contact with the first semiconductor layer;

[0022] The passivation layer also covers at least a portion of the second sub-surface and at least a portion of the side surface.

[0023] In some embodiments, the first semiconductor layer includes a third surface away from the light-emitting functional layer, and the maximum size of the third surface in the first direction is L-(N-1)*5 μm; the maximum size of the third surface in the second direction is W-(M-1)*5 μm;

[0024] The first direction is perpendicular to the second direction, L is the size of the light-emitting chip in the first direction, W is the size of the light-emitting chip in the second direction, N is the maximum number of the light-emitting parts in the first direction, and M is the maximum number of the light-emitting parts in the second direction.

[0025] In some embodiments, the orthographic projection of the groove on the base layer is a ring;

[0026] The light emitting chip comprises a plurality of the grooves, and the plurality of grooves are nested in sequence.

[0027] In some embodiments, the light-emitting chip is a mini-LED light-emitting chip or a Micro-LED light-emitting chip.

[0028] In some embodiments, the light-emitting substrate is a display panel, the display panel includes a plurality of pixel areas, the pixel areas include a red sub-pixel area, a green sub-pixel area and a blue sub-pixel area, and the light-emitting chip is disposed in at least one of the sub-pixel areas.

[0029] In a second aspect, the present disclosure also provides a method for manufacturing a light-emitting substrate, which includes:

[0030] forming a plurality of light-emitting bodies on the first substrate, wherein the light-emitting bodies include a second semiconductor layer, a light-emitting functional layer and a first semiconductor layer which are sequentially arranged in a direction away from the first substrate;

[0031] forming a groove on each of the light-emitting bodies, wherein the groove penetrates at least the first semiconductor layer and the light-emitting functional layer along the thickness direction of the light-emitting body, so as to divide the light-emitting functional layer into a plurality of light-emitting portions and divide the first semiconductor layer into a plurality of first semiconductor portions;

[0032] A first electrode is formed on a side of each of the light-emitting bodies away from the first substrate, wherein the first electrode includes a plurality of first sub-electrodes, and the first sub-electrodes are connected to the first semiconductor parts in a one-to-one correspondence;

[0033] Disposing a second substrate on the first electrode, and removing the first substrate;

[0034] forming a second electrode on each of the second semiconductor layers to obtain a plurality of light-emitting chips including a first electrode, a second electrode and a light-emitting body;

[0035] Transferring a plurality of the light-emitting chips to a substrate;

[0036] The plurality of first sub-electrodes of the same light-emitting chip are configured to load voltages of the same state, so that the light-emitting states of the plurality of light-emitting parts of the light-emitting chip are the same.

[0037] In some embodiments, the manufacturing method further comprises:

[0038] A reflective layer is formed in the groove, and the reflective layer is used to reflect the light irradiated from the light-emitting functional layer to the reflective layer toward the second semiconductor layer.

[0039] In some embodiments, the step of forming a groove on the light emitting body includes:

[0040] forming a current spreading layer corresponding one-to-one to the first semiconductor portion;

[0041] Using the current spreading layer as a mask, etching the light emitting body to form the groove;

[0042] The groove has a first opening facing away from the second semiconductor layer, and an orthographic projection of the current spreading layer on the first substrate overlaps with an orthographic projection of the first opening on the first substrate;

[0043] An orthographic projection of the reflective layer on the first substrate has no overlap with an orthographic projection of the current spreading layer on the first substrate.

[0044] In some embodiments, the reflective layer and the first sub-electrode are formed synchronously, and the steps of synchronously forming include:

[0045] A conductive material layer is formed, a portion of which is located on a side of the current spreading layer away from the light-emitting functional layer to serve as the first sub-electrode; another portion of the conductive material layer is located in the groove to serve as the reflective layer.

[0046] In some embodiments, before the step of forming a plurality of first electrodes, the method further includes:

[0047] forming a passivation layer, wherein the passivation layer at least covers the inner wall of the groove and the surface of the current spreading layer away from the light-emitting functional layer;

[0048] forming a via hole corresponding to the current spreading layer on the passivation layer;

[0049] The reflective layer is arranged on a surface of the passivation layer away from the inner wall of the groove, and the first electrode is electrically connected to the current spreading layer by penetrating the via hole. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0051] Figure 1 This is a schematic diagram of a light-emitting substrate provided in some embodiments of the present disclosure.

[0052] Figure 2 It is a schematic diagram of a single light-emitting chip provided in some embodiments of the present disclosure.

[0053] Figure 3 Schematic diagram of a single light-emitting chip provided in some other embodiments of the present disclosure.

[0054] Figure 4 This is the relationship curve between luminous efficiency and current density under different luminous areas.

[0055] Figure 5 Schematic diagram of a groove provided in some embodiments of the present disclosure.

[0056] Figure 6 This is a schematic diagram of the positional relationship between the grooves of the light-emitting chip and the light-emitting functional layer provided in some examples of the present disclosure.

[0057] Figure 7 Schematic diagram of the positional relationship between the grooves of the light-emitting chip and the light-emitting functional layer provided in some other examples of the present disclosure.

[0058] FIG. 8A to FIG. 8I A schematic diagram of the manufacturing process of the light-emitting substrate provided in some embodiments of the present disclosure. DETAILED DESCRIPTION

[0059] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0060] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0061] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not represent any order, quantity or importance, but are only used to distinguish different components. Similarly, "including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0062] As used herein, "parallel" and "perpendicular" include the described situation and the situation similar to the described situation, and the range of the similar situation is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of a specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 10°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 10°.

[0063] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0064] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0065] Micro inorganic light-emitting diodes include MiniLED and MicroLED. Mini LED refers to light-emitting diode (LED) chips with a grain size of about 100 to 300 microns. MicroLED refers to light-emitting diode chips with a grain size of less than 100 microns. The use of MiniLED / MicroLED display devices has the advantages of low power consumption, high brightness, high resolution, high color saturation, fast response speed, long life, and high efficiency. In addition, multiple Mini-LED / Micro-LED display devices can be seamlessly spliced ​​to achieve ultra-large-size display products, which have broad application prospects in large-size display fields such as command and monitoring centers, commercial centers, high-end conferences, and theaters.

[0066] Among them, the luminous efficiency of light-emitting diode chips has always been a concern in the display field.

[0067] Figure 1 is a schematic diagram of a light-emitting substrate provided in some embodiments of the present disclosure, Figure 2 is a schematic diagram of a single light-emitting chip provided in some embodiments of the present disclosure, Figure 3 Schematic diagram of a single light-emitting chip provided in some other embodiments of the present disclosure, such as Figures 1 to 3 As shown, the light emitting substrate includes a base layer 10 and a plurality of light emitting chips arranged on the base layer 10 .

[0068] The light-emitting chip 20 includes: a first electrode 21, a second electrode 22, and a light-emitting body electrically connected to the first electrode 21, the first electrode 21 is located between the light-emitting body and the base layer 10, and the light-emitting body includes a first semiconductor layer 23, a light-emitting functional layer 25, and a second semiconductor layer 24 arranged in sequence in a direction away from the first electrode 21. One of the first semiconductor layer 23 and the second semiconductor layer 24 is an N-type semiconductor layer, and the other is a P-type semiconductor layer. The second electrode 22 is electrically connected to the second semiconductor layer 24.

[0069] like Figure 2 and Figure 3As shown, a groove V is provided on the light-emitting body, and the groove V at least penetrates the first semiconductor layer 23 and the light-emitting functional layer 25 along the thickness direction of the light-emitting body, so as to divide the light-emitting functional layer 25 into a plurality of light-emitting portions 251, and divide the first semiconductor layer 23 into a plurality of first semiconductor portions 231. The first electrode 21 includes a plurality of first sub-electrodes 211 spaced from each other, and the first sub-electrodes 211 are connected to the first semiconductor portions 231 in a one-to-one correspondence. Among them, the groove V does not completely penetrate the second semiconductor layer 24. For example, the depth of the groove V may be greater than or equal to the sum of the thickness of the first semiconductor layer 23 and the light-emitting functional layer 25, and the depth of the groove V is less than the sum of the thickness of the first semiconductor layer 23, the second semiconductor layer 24 and the light-emitting functional layer 25.

[0070] The multiple first sub-electrodes 211 of the same light-emitting chip 20 are configured to load voltages of the same state, so that the light-emitting states of the multiple light-emitting portions 251 of the light-emitting chip 20 are the same.

[0071] It should be noted that the light-emitting state of the light-emitting unit 251 refers to the state of being on or off; and the voltage in the same state refers to the voltage that can make the light-emitting states of the plurality of light-emitting units 251 the same.

[0072] In some embodiments, the plurality of first sub-electrodes 211 are specifically configured to load the same or approximately the same voltage, so that the light-emitting states of the plurality of light-emitting portions 251 of the same light-emitting chip 20 are the same, and the brightness when emitting light is the same or substantially the same. The "approximately the same" voltage refers to a voltage whose difference does not exceed 10%.

[0073] The base layer 10 may be a driving backplane, which may provide voltage to the first electrode 21 and the second electrode 22 of each light emitting chip 20 to drive the light emitting chip 20 to light up or turn off.

[0074] In the embodiment of the present disclosure, a groove V is provided on the light-emitting body, thereby dividing the light-emitting functional layer 25 into a plurality of light-emitting portions 251. Compared with the light-emitting functional layer 25 in which the groove V is not provided, the total light-emitting area of ​​the plurality of light-emitting portions 251 is reduced, that is, the total resistance of the plurality of light-emitting portions 251 is reduced, thereby increasing the current density of the light-emitting chip 20, and further improving the luminous efficiency (EQE) of the light-emitting chip 20.

[0075] Figure 4 is a curve showing the relationship between the luminous efficiency and the current density under different luminous areas. In the embodiment of the present disclosure, the current density of the light emitting chip is less than 50A / cm 2 ,according to Figure 4 It can be seen that when the current density increases, the luminous efficiency of the light emitting chip 20 is improved.

[0076] In some embodiments, the above N-type semiconductor layer may include n-type GaN, and the P-type semiconductor layer may include In x Al y Ga 1-x-y a p-type nitride semiconductor layer of N (0 ≤ x < 1, 0 ≤ y < 1, 0 ≤ x + y < 1), and the p-type dopant may be magnesium. For example, the P-type semiconductor layer may be a single-layer structure, but in some exemplary embodiments, it may have a multi-layer structure containing different components. The light-emitting portion 251 may include a light-emitting layer, and the light-emitting layer may be a multi-quantum well light-emitting layer. In the multi-quantum well light-emitting layer, the quantum well layer and the quantum barrier layer are stacked alternately with each other. For example, the quantum well layer and the quantum barrier layer may respectively include In x Al y Ga 1-x-y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1) of different components. In a certain example, the quantum well layer may include In x Ga 1-x N (0 < x ≤ 1) component, and the quantum barrier layer may include GaN or AlGaN.

[0077] In addition, the light-emitting portion 251 may further include other film layer structures. For example, an electron blocking layer located between the light-emitting layer and the first semiconductor layer 23, and a hole blocking layer located between the light-emitting layer and the second semiconductor layer 24.

[0078] It should be noted that the light-emitting area of the light-emitting portion 251 can be regarded as the surface area of the light-emitting layer in the light-emitting portion 251 close to the first semiconductor layer 23.

[0079] In some embodiments, the thickness of the P-type semiconductor layer may be between and the thickness of the light-emitting functional layer 25 is between and the thickness of the N-type semiconductor layer may be between 2.5 μm and 3.5 μm.

[0080] In some embodiments, as Figure 2 shown, the second electrode 22 may be disposed on the side of the second semiconductor layer 24 away from the light-emitting body.

[0081] In some embodiments, the total light-emitting area of the plurality of light-emitting portions 251 is 50% to 80% of the orthographic projection area of the second semiconductor layer 24 on the base layer 10, so as to maximize the light-emitting efficiency of the light-emitting chip 20. For example, the total light-emitting area of the plurality of light-emitting portions 251 is 50%, or 60%, or 70%, or 80% of the orthographic projection area of the second semiconductor layer 24 on the base layer 10.

[0082] In some embodiments, as Figure 2 and Figure 3As shown, the light-emitting chip 20 may further include a reflective layer 40, which is disposed in the groove V and is used to reflect the light irradiated from the light-emitting portion 251 to the reflective layer 40 toward the second semiconductor layer 24, so that the light of the light-emitting portion 251 is emitted through the second semiconductor layer 24 as much as possible, thereby improving the light extraction efficiency.

[0083] The reflective layer 40 may be made of a metal with high reflectivity to improve the light reflection effect. For example, the material of the reflective layer 40 may include at least one of aluminum (Al), gold (Au), chromium (Cr), titanium (Ti), silver (Ag), zinc (Zn), and platinum (Pt).

[0084] Among them, Figure 2 As shown, the second electrode 22 can be located on the side of the second semiconductor layer 24 away from the base layer 10. In this case, the second electrode 22 can be made of a transparent conductive material such as indium tin oxide (ITO) to prevent affecting the light emitting effect of the light emitting chip 20. In other embodiments, such as Figure 3 As shown, the light emitting body and the second electrode 22 may be located on the same side of the second semiconductor layer 24 .

[0085] In some embodiments, the maximum distance D1 from the reflective layer 40 to the base layer 10 is greater than or equal to the distance D2 from the surface of the light-emitting portion 251 away from the base layer 10 to the base layer 10, and the minimum distance D4 from the reflective layer 40 to the base layer 10 is less than or equal to the distance D3 from the surface of the light-emitting portion 251 close to the base layer 10 to the reference surface, so that as much light from the light-emitting portion 251 as possible can be reflected by the reflective layer 40.

[0086] In one example, the light-emitting portion 251 includes a first surface facing the base layer 10, a second surface facing away from the base layer 10, and a side surface connected between the first surface and the second surface, wherein the orthographic projection of the reflective layer 40 on the base layer 10 can completely cover the side surface of the light-emitting portion 251, thereby maximizing the light reflection effect of the light-emitting portion 251.

[0087] In some embodiments, Figure 2 and Figure 3 As shown, the reflective layer 40 is conformal to the inner wall of the groove V, and the cross-sectional area of ​​the groove V gradually decreases in the direction approaching the reference plane to ensure that the reflective layer 40 in the groove V can reflect the light of the light-emitting portion 251 toward the second semiconductor layer 24 .

[0088] The cross section of the groove V is a cross section of the groove V parallel to the base layer 10 .

[0089] Here, conformal means that the surface of the reflective layer 40 facing the groove V has the same or substantially the same morphology as the inner wall of the groove V. For example, a passivation layer 30 is provided between the reflective layer 40 and the inner wall of the groove V, and the thickness of the passivation layer 30 at each position is uniformly distributed, so that the surface of the reflective layer 40 facing the groove V has the same morphology as the inner wall of the groove V.

[0090] In one example, the longitudinal section of the groove V can be a triangle, a trapezoid, or other shapes, for example, the side of the longitudinal section is an arc. The longitudinal section of the groove V refers to a section perpendicular to the base layer 10 and perpendicular to the extension direction of the groove V. Figure 5 Schematic diagram of the grooves provided in some embodiments of the present disclosure, such as Figure 5 As shown, the side S of the longitudinal section of the groove V may be a concave arc.

[0091] In some embodiments, Figure 2 and Figure 3 As shown, the light-emitting chip 20 may further include a plurality of current spreading layers 50, the current spreading layers 50 correspond to the first sub-electrodes 211 one by one, and the first sub-electrodes 211 are electrically connected to the first semiconductor layer 23 through the current spreading layers 50. The groove V has a first opening facing away from the second semiconductor layer 24, and the orthographic projection of the current spreading layer 50 on the base layer 10 overlaps with the orthographic projection of the first opening on the base layer 10. The orthographic projection of the reflective layer 40 on the base layer 10 does not overlap with the orthographic projection of the current spreading layer 50 on the base layer 10. The non-overlapping here may be that there is a gap between the two orthographic projections, or the two orthographic projections are in contact but have no overlapping area.

[0092] During the manufacturing process of the reflective layer 40, Figure 2 and Figure 3 The current spreading layer 50 in the embodiment can be used as a blocking layer to prevent the reflective layer 40 from being electrically connected to the first sub-electrode 211 and thus interfering with the electric field between the first sub-electrode 211 and the second electrode 22 .

[0093] In some embodiments, the current spreading layer 50 may be made of a metal material, so that the light-emitting body may be etched using the current spreading layer 50 as a mask to form a groove V whose opening overlaps with the projection of the current spreading layer 50 .

[0094] In some embodiments, the orthographic projection of the first electrode 21 on the base layer 10 does not overlap with the orthographic projection of the reflective layer 40 on the base layer 10 , so as to prevent the first electrode 21 from being electrically connected to the reflective layer 40 .

[0095] In some embodiments, the reflective layer 40 and the first sub-electrode 211 are made of the same material, so that the two can be formed simultaneously, simplifying the preparation process. For example, a conductive material layer can be deposited, so that a portion of the conductive material layer is deposited on the side of the current spreading layer 50 away from the light-emitting portion 251, thereby serving as the first sub-electrode 211; another portion of the conductive material layer is located in the groove V, thereby serving as the reflective layer 40.

[0096] In some embodiments, the overlap width of the orthographic projection of the current spreading layer 50 on the base layer 10 and the orthographic projection of the first opening on the base layer 10 is greater than or equal to 1 μm, so as to ensure that the current spreading layer 50 can play a blocking role in the deposition process of the conductive material layer, and prevent the reflective layer 40 in the groove V from being electrically connected to the first sub-current. However, it should be understood that the provision of the current spreading layer 50 should not affect the deposition of the reflective layer 40. For example, the orthographic projection of the current spreading layer 50 on the base layer 10 is located within the orthographic projection range of the surface of the light emitting portion 251 facing the base layer 10 on the base layer 10.

[0097] In some embodiments, Figure 2 and Figure 3 As shown, the light emitting chip 20 further includes a passivation layer 30, which at least covers the sidewalls of the groove V and the surface of the current spreading layer 50 away from the light emitting functional layer 23, and the reflective layer 40 is disposed on the surface of the passivation layer 30 away from the inner wall of the groove V, and the first sub-electrode 211 is electrically connected to the current spreading layer 50 through a via hole penetrating the passivation layer 30. By disposing the passivation layer 30, the reflective layer 40 can be insulated and spaced apart from the light emitting portion 251, and the side of the light emitting functional layer 25 can be protected.

[0098] The passivation layer 30 may be made of silicon oxynitride (SiON), silicon oxide (SiOx), silicon nitride (SiNx), silicon oxycarbide (SiOxCy), etc. The passivation layer 30 may be one layer or multiple layers.

[0099] In some embodiments, the current spreading layer 50 includes a first surface facing the first semiconductor layer 23, a second surface facing away from the first semiconductor layer 23, and a side surface connected therebetween, the first surface includes a first sub-surface in contact with the first semiconductor layer 23, and a second sub-surface not in contact with the first semiconductor layer 23; the passivation layer 30 also covers at least a portion of the second sub-surface and at least a portion of the side surface. That is, the passivation layer 30 is in a state of half-wrapping the current spreading layer 50, thereby improving the stability of the light-emitting chip 20.

[0100] In some embodiments, the first semiconductor layer 23 includes a third surface away from the light-emitting functional layer 25, and the third surface is the sum of the surfaces of the plurality of first semiconductor portions 231 away from the light-emitting functional layer 25. Due to the process precision problem, the width of the first opening of the groove V between two adjacent light-emitting portions 251 needs to be at least 5 μm. When the groove V is located at the edge of the light-emitting chip 20, and is only adjacent to the light-emitting portion 251 on one side, and no light-emitting portion 251 is provided on the other side, the first opening of the groove V needs to be at least 2.5 μm. In this case, the maximum value of the size of the third surface in the first direction is L-(N-1)*5 μm; the maximum value of the size of the third surface in the second direction is W-(M-1)*5 μm, so as to ensure that the required groove V can be formed on the light-emitting body. Among them, the first direction and the second direction are both parallel to the base layer 10, and the first direction and the second direction are perpendicular to each other, L is the size of the light-emitting chip 20 in the first direction, W is the size of the light-emitting chip 20 in the second direction, N is the maximum number of light-emitting portions 251 in the first direction, and M is the maximum number of light-emitting portions 251 in the second direction.

[0101] In practical applications, the shape and distribution of the grooves V can be set according to actual needs.

[0102] Figure 6 Schematic diagram of the positional relationship between the grooves of the light-emitting chip and the light-emitting functional layer provided in some examples of the present disclosure, such as Figure 6 As shown, in some examples, the light-emitting functional layer 25 is divided into a plurality of light-emitting portions 251, and the plurality of light-emitting portions 251 are arranged in a row and multiple columns, or multiple rows and one column, or multiple rows and multiple columns, wherein one of the first direction and the second direction can be a row direction, and the other can be a column direction.

[0103] Figure 7 Schematic diagram of the positional relationship between the grooves of the light-emitting chip and the light-emitting functional layer provided in some other examples of the present disclosure, such as Figure 7 As shown, in other examples, the orthographic projection of the groove V on the base layer 10 is a ring, which may be a rectangular ring, a circular ring, or an elliptical ring; the light-emitting chip 20 includes a plurality of grooves V, which are nested in sequence.

[0104] In some embodiments, the light-emitting chip 20 is a mini-LED light-emitting chip or a Micro-LED light-emitting chip. In one example, the driving backplane may be a silicon substrate provided with a driving circuit, and the driving circuit may be embedded in the silicon substrate. In another example, the driving backplane may include a substrate substrate and a driving circuit provided on the substrate substrate, and the substrate substrate may be a glass substrate or a flexible substrate made of materials such as polyimide (PI). In the process of making the light-emitting substrate, the driving backplane may be made first, and a plurality of light-emitting chips 20 may be made on other substrates, and then the plurality of light-emitting chips 20 may be transferred to the driving backplane. Among them, a first pad and a second pad are provided on the driving backplane, and the first sub-electrode 211 of the light-emitting chip is electrically connected to the above-mentioned driving circuit through the first pad, and the second electrode 22 is electrically connected to the above-mentioned driving circuit through the second pad.

[0105] In some embodiments of the present disclosure, the light-emitting substrate can be used in a backlight module of a display device and serve as a backlight panel. The display device can also include a liquid crystal panel, which is arranged on the light-emitting side of the light-emitting substrate. For example, the light-emitting chip 20 can emit white light.

[0106] In other embodiments, the light-emitting substrate can be used as a display panel, wherein the display panel includes a plurality of pixel areas, and the pixel area can include a plurality of sub-pixel areas, and the plurality of sub-pixel areas include, for example, a red sub-pixel area, a plurality of green sub-pixel areas, and a plurality of blue sub-pixel areas. The light-emitting chip 20 is provided in at least one sub-pixel area. For example, a light-emitting chip 20 is provided in each red sub-pixel area, each green sub-pixel area, and each sub-blue pixel area. The light-emitting color of the light-emitting chip 20 in each sub-pixel area is the same as the color of the sub-pixel area.

[0107] The embodiment of the present disclosure also provides a method for manufacturing a light-emitting substrate, comprising the following steps S10 to S60:

[0108] S10, forming a plurality of light-emitting bodies on the first substrate, wherein the light-emitting bodies include a second semiconductor layer, a light-emitting functional layer and a first semiconductor layer which are sequentially arranged in a direction away from the first substrate.

[0109] S20, forming a groove on each light-emitting body, wherein the groove at least penetrates the first semiconductor layer and the light-emitting functional layer along the thickness direction of the light-emitting body, so as to divide the light-emitting functional layer into a plurality of light-emitting parts and divide the first semiconductor layer into a plurality of first semiconductor parts.

[0110] S30, forming a first electrode on a side of each light-emitting body away from the first substrate, the first electrode comprising a plurality of first sub-electrodes, and the first sub-electrodes are connected to the first semiconductor parts in a one-to-one correspondence.

[0111] S40, disposing a second substrate on the first electrode, and removing the first substrate.

[0112] S50, forming a second electrode connected to each second semiconductor layer to obtain a plurality of light-emitting chips including a first electrode, a second electrode and a light-emitting body.

[0113] S60, transferring a plurality of light-emitting chips to the base layer.

[0114] The multiple first sub-electrodes of the same light-emitting chip are configured to load voltages of the same state, so that the light-emitting states of the multiple light-emitting parts of the light-emitting chip are the same.

[0115] FIG. 8A to FIG. 8I Schematic diagram of the manufacturing process of the light-emitting substrate provided in some embodiments of the present disclosure, the manufacturing process includes: preparing a plurality of light-emitting chips 20, and then transferring the plurality of light-emitting chips 20 to the base layer 10. Specifically, the manufacturing method of the light-emitting substrate includes:

[0116] S100, such as Fig. 8A As shown, a plurality of light emitting bodies 20a are formed on the first substrate SUB1, and the light emitting bodies 20a include a second semiconductor layer 24, a light emitting functional layer 25 and a first semiconductor layer 23 which are sequentially arranged in a direction away from the first substrate SUB1.

[0117] The first substrate SUB1 may be a glass substrate, and the light-emitting body 20a may be disposed on the first substrate SUB1 by adhesive bonding, metal bonding, etc. A plurality of light-emitting bodies 20a may be transferred to the first substrate SUB1, or a whole light-emitting body may be transferred to the first substrate SUB1, and a plurality of light-emitting bodies 20a may be formed by patterning.

[0118] S200, forming a groove V on each light-emitting body 20a. Specifically, this step includes:

[0119] S210, such as Figure 8B As shown, a plurality of current spreading layers 50 are formed on the light emitting body 20a, wherein the material of the current spreading layer 50 may include metal.

[0120] S220, such as Figure 8C As shown, the light-emitting body is etched with the current spreading layer 50 as a mask to form a groove V. The groove V at least penetrates the first semiconductor layer 23 and the light-emitting functional layer 25 along the thickness direction of the light-emitting body 20a, so as to divide the light-emitting functional layer 25 into a plurality of light-emitting portions 251, and divide the first semiconductor layer 23 into a plurality of first semiconductor portions 231, and the first semiconductor portions 231 correspond to the current spreading layer 50 one by one.

[0121] The trench V has a first opening facing away from the second semiconductor layer 24 , and the orthographic projection of the current spreading layer 50 on the first substrate SUB1 overlaps with the orthographic projection of the first opening on the first substrate SUB1 .

[0122] S300, such as Fig.8D As shown, a passivation layer 30 is formed, and the passivation layer 30 at least covers the inner wall of the trench V and the surface of the current spreading layer 50 away from the light-emitting functional layer 25 .

[0123] S400, such as Fig. 8E As shown, a via hole 30 v corresponding to the current spreading layer 50 is formed on the passivation layer 30 .

[0124] In some embodiments, the current spreading layer 50 includes a first surface facing the first semiconductor layer 23, a second surface facing away from the first semiconductor layer 23, and a side surface connected therebetween, the first surface includes a first sub-surface in contact with the first semiconductor layer 23, and a second sub-surface not in contact with the first semiconductor layer 23. After forming the via hole 30v, the passivation layer 30 also covers at least a portion of the second sub-surface and at least a portion of the side surface.

[0125] S500 , forming a reflective layer 40 in the groove V, and forming a first electrode 21 on a side of each light emitting body away from the first substrate SUB1 . The reflective layer 40 is used to reflect the light irradiated from the light emitting functional layer 25 to the reflective layer 40 toward the second semiconductor layer 24 .

[0126] The reflective layer 40 and the first electrode 21 are formed synchronously. Specifically, the process of synchronously forming the reflective layer 40 and the first electrode 21 includes: Figure 8F As shown, a conductive material layer is formed, a portion of which is located on a side of the current spreading layer 50 away from the light-emitting functional layer 25 to serve as a first sub-electrode 211 ; another portion of the conductive material layer is located in the groove V to serve as a reflective layer 40 .

[0127] The conductive material layer may be a metal material layer.

[0128] S600, such as Figure 8G As shown, a second substrate SUB2 is disposed on the first electrode 21, and the first substrate SUB1 is removed. The second substrate SUB2 can be disposed on the first electrode 21 by adhesive bonding, metal bonding, etc. The second substrate SUB2 can be a glass substrate.

[0129] S700, such as Figure 8H As shown, a second electrode 22 is formed on each second semiconductor layer 24 , thereby obtaining a plurality of light emitting chips 20 including a first electrode 21 , a second electrode 22 and a light emitting body.

[0130] S800, such as Figure 8I As shown, a plurality of light-emitting chips 20 are transferred to a base layer 10. The base layer 10 includes a plurality of pixel regions, and the pixel regions are provided with light-emitting chips 20. In addition, a plurality of first sub-electrodes 211 of the same light-emitting chip 20 are configured to load voltages of the same state, so that the light-emitting states of the plurality of light-emitting portions 251 of the light-emitting chip 20 are the same.

[0131] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A light-emitting substrate, comprising: Grassroots; A plurality of light-emitting chips are arranged on the base layer, the light-emitting chips comprising: a first electrode, a second electrode and a light-emitting body, the first electrode is located between the light-emitting body and the base layer, the light-emitting body comprises a first semiconductor layer, a light-emitting functional layer and a second semiconductor layer arranged in sequence in a direction away from the first electrode; the second electrode is electrically connected to the second semiconductor layer; a groove is provided on the light-emitting body, the groove at least penetrates the first semiconductor layer and the light-emitting functional layer in a thickness direction of the light-emitting body, so as to divide the light-emitting functional layer into a plurality of light-emitting parts, and divide the first semiconductor layer into a plurality of first semiconductor parts; the first electrode comprises a plurality of first sub-electrodes spaced from each other, and the first sub-electrodes are connected to the first semiconductor parts in a one-to-one correspondence; The plurality of first sub-electrodes of the same light-emitting chip are configured to load voltages of the same state, so that the light-emitting states of the plurality of light-emitting portions are the same.

2. The light-emitting substrate according to claim 1, wherein: The light emitting body and the second electrode are located on the same side of the second semiconductor layer.

3. The light-emitting substrate according to claim 1, wherein: The second electrode is located at a side of the second semiconductor layer away from the light emitting body.

4. The light-emitting substrate according to any one of claims 1 to 3, wherein The sum of the light emitting areas of the plurality of light emitting portions is 50% to 80% of the orthographic projection area of ​​the second semiconductor layer on the base layer.

5. The light-emitting substrate according to any one of claims 1 to 3, wherein The light emitting chip further includes a reflective layer, which is disposed in the groove and is used to reflect the light irradiated by the light emitting portion to the reflective layer toward the second semiconductor layer.

6. The light emitting substrate according to claim 5, wherein: The light emitting chip further comprises: a plurality of current spreading layers, the current spreading layers corresponding to the first sub-electrodes one by one, and the first sub-electrodes being electrically connected to the first semiconductor layer through the current spreading layers; The trench has a first opening facing away from the second semiconductor layer, and an orthographic projection of the current spreading layer on the base layer overlaps with an orthographic projection of the first opening on the base layer; An orthographic projection of the reflective layer on the base layer has no overlap with an orthographic projection of the current spreading layer on the base layer.

7. The light-emitting substrate according to claim 5, wherein: The maximum distance from the reflective layer to the base layer is greater than or equal to the distance from the surface of the light-emitting portion away from the base layer to the base layer; The minimum distance from the reflective layer to the base layer is less than or equal to the distance from the surface of the light emitting portion close to the base layer to the base layer.

8. The light emitting substrate according to claim 5, wherein: The reflective layer is conformal to the inner wall of the groove, and the cross-sectional area of ​​the groove gradually decreases in a direction away from the base layer; The cross section of the groove is a cross section of the groove parallel to the base layer.

9. The light emitting substrate according to claim 5, wherein: An orthographic projection of the first electrode on the base layer has no overlap with an orthographic projection of the reflective layer on the base layer.

10. The light emitting substrate according to claim 5, wherein: The first electrode and the reflective layer are made of the same material.

11. The light emitting substrate according to claim 5, wherein: The light-emitting chip also includes a passivation layer, which covers at least the side walls of the groove and the surface of the current spreading layer away from the first semiconductor layer. The reflective layer is arranged on the surface of the passivation layer away from the inner wall of the groove. The first sub-electrode is electrically connected to the current spreading layer through a via hole penetrating the passivation layer.

12. The light emitting substrate according to claim 11, wherein: The current spreading layer comprises a first surface facing the first semiconductor layer, a second surface facing away from the first semiconductor layer, and a side surface connected therebetween, wherein the first surface comprises a first subsurface in contact with the first semiconductor layer, and a second subsurface not in contact with the first semiconductor layer; The passivation layer also covers at least a portion of the second sub-surface and at least a portion of the side surface.

13. The light-emitting substrate according to any one of claims 1 to 3, wherein: The first semiconductor layer includes a third surface away from the light-emitting functional layer, the maximum size of the third surface in the first direction is L-(N-1)*5 μm; the maximum size of the third surface in the second direction is W-(M-1)*5 μm; The first direction is perpendicular to the second direction, L is the size of the light-emitting chip in the first direction, W is the size of the light-emitting chip in the second direction, N is the maximum number of the light-emitting parts in the first direction, and M is the maximum number of the light-emitting parts in the second direction.

14. The light-emitting substrate according to any one of claims 1 to 3, wherein: The orthographic projection of the groove on the base layer is a ring; The light emitting chip comprises a plurality of the grooves, and the plurality of grooves are nested in sequence.

15. The light-emitting substrate according to any one of claims 1 to 3, wherein: The light-emitting chip is a mini-LED light-emitting chip or a Micro-LED light-emitting chip.

16. The light-emitting substrate according to any one of claims 1 to 3, wherein: The light-emitting substrate is a display panel, which includes a plurality of pixel areas, including a red sub-pixel area, a green sub-pixel area and a blue sub-pixel area, and the light-emitting chip is disposed in at least one of the sub-pixel areas.

17. A method for manufacturing a light-emitting substrate, wherein: include: forming a plurality of light-emitting bodies on the first substrate, wherein the light-emitting bodies include a second semiconductor layer, a light-emitting functional layer and a first semiconductor layer which are sequentially arranged in a direction away from the first substrate; forming a groove on each of the light-emitting bodies, wherein the groove penetrates at least the first semiconductor layer and the light-emitting functional layer along the thickness direction of the light-emitting body, so as to divide the light-emitting functional layer into a plurality of light-emitting portions and divide the first semiconductor layer into a plurality of first semiconductor portions; A first electrode is formed on a side of each of the light-emitting bodies away from the first substrate, wherein the first electrode includes a plurality of first sub-electrodes, and the first sub-electrodes are connected to the first semiconductor parts in a one-to-one correspondence; Disposing a second substrate on the first electrode, and removing the first substrate; forming a second electrode on each of the second semiconductor layers to obtain a plurality of light-emitting chips including a first electrode, a second electrode and a light-emitting body; Transferring a plurality of the light-emitting chips to a substrate; The plurality of first sub-electrodes of the same light-emitting chip are configured to load voltages of the same state, so that the light-emitting states of the plurality of light-emitting parts of the light-emitting chip are the same.

18. The method according to claim 17, wherein: The production method further comprises: A reflective layer is formed in the groove, and the reflective layer is used to reflect the light irradiated from the light-emitting functional layer to the reflective layer toward the second semiconductor layer.

19. The method according to claim 18, wherein: The step of forming a groove on the light emitting body comprises: forming a current spreading layer corresponding one-to-one to the first semiconductor portion; Using the current spreading layer as a mask, etching the light emitting body to form the groove; The groove has a first opening facing away from the second semiconductor layer, and an orthographic projection of the current spreading layer on the first substrate overlaps with an orthographic projection of the first opening on the first substrate; An orthographic projection of the reflective layer on the first substrate has no overlap with an orthographic projection of the current spreading layer on the first substrate.

20. The method according to claim 19, wherein: The reflective layer is formed synchronously with the first sub-electrode, and the steps of synchronously forming the reflective layer and the first sub-electrode include: A conductive material layer is formed, a portion of which is located on a side of the current spreading layer away from the light-emitting functional layer to serve as the first sub-electrode; another portion of the conductive material layer is located in the groove to serve as the reflective layer.

21. The method according to claim 19, wherein: Before the step of forming a plurality of first electrodes, the method further includes: forming a passivation layer, wherein the passivation layer at least covers the inner wall of the groove and the surface of the current spreading layer away from the light-emitting functional layer; forming a via hole corresponding to the current spreading layer on the passivation layer; The reflective layer is arranged on a surface of the passivation layer away from the inner wall of the groove, and the first electrode is electrically connected to the current spreading layer by penetrating the via hole.

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