Power amplifier module

Abstract

The invention relates to the technical field of wireless communication, and provides a power amplifier module which comprises an input matching circuit, a first-stage amplifier, a first inter-stage matching circuit, a second-stage amplifier, a second inter-stage matching circuit, a third-stage amplifier and an output matching circuit which are electrically connected in sequence. The output matching circuit is connected to a load; the power amplifier further comprises a control module and a direct-current power supply module. The direct-current power supply module is used for supplying power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier. The input end of the control module is used for receiving an external logic enable signal and controlling the direct-current power supply module to provide direct-current bias voltage for the first-stage amplifier, the second-stage amplifier and the third-stage amplifier according to the external logic enable signal. The power amplifier module can improve the PVT index performance of the power amplifier and improve the communication quality.

Description

Technical Field

[0001] The present invention relates to the technical field of wireless communications, and in particular to a power amplifier module. Background Art

[0002] In wireless communication systems, RF power amplifier modules are key components for wireless transmission of RF signals. As an important component of mobile communication systems, RF power amplifiers (PAs) are mainly used to amplify signals. With the continuous development of mobile communication systems, the power requirements for mobile power amplifiers are constantly increasing.

[0003] At present, the relevant power amplifier generally enhances the power of the RF signal through the input matching circuit, the first-stage amplifier, the second-stage amplifier, the third-stage amplifier and the output matching circuit that are electrically connected in sequence, and outputs the enhanced RF signal to the load. In the power amplifier, the PVT index refers to Power Vs Time, which represents the power-time relationship curve. The PVT index mainly measures the thermal stability of the PA. With good thermal stability, linear indicators such as EVM (Error Vector Magnitude) and ACP (Adjacent Channel Power Ratio) are stable and not easily affected by thermal interference.

[0004] However, as the PA power increases, the heat generated by the PA will inevitably increase. As the PA working time increases, the PVT caused by the PA heating deteriorates, which leads to the deterioration of indicators such as EVM and ACP. Summary of the invention

[0005] In view of the above shortcomings of the prior art, the present invention proposes a power amplifier module to solve the problem of PVT index deterioration caused by heat in the prior power amplifier module.

[0006] In order to solve the above technical problems, the present invention adopts the following technical solutions: An embodiment of the present invention provides a power amplifier module, comprising an input matching circuit, a first-stage amplifier, a first-stage matching circuit, a second-stage amplifier, a second-stage matching circuit, a third-stage amplifier and an output matching circuit electrically connected in sequence; the power amplifier also includes a control module and a DC power supply module; the DC power supply module is used to supply power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively; the control module is used to receive an external logic enable signal, and control the DC power supply module to provide a DC bias voltage to the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively according to the external logic enable signal.

[0007] Preferably, the control module includes a first current mirror circuit, a first operational amplifier, a second current mirror circuit, a third current mirror circuit, a second operational amplifier and a bias adjustment circuit; The input end of the first current mirror circuit is used to connect to a power supply, the output end of the first current mirror is used to output current to the first input end of the first operational amplifier, the output end of the first operational amplifier amplifies the current and outputs it to the input end of the second current mirror circuit, the second input end of the first operational amplifier is connected to the feedback end of the second current mirror circuit; the output end of the second current mirror circuit is connected to the input end of the third current mirror circuit, the output end of the third current mirror circuit is respectively connected to the first input end of the second operational amplifier and the output end of the bias adjustment circuit, the second input end of the second operational amplifier serves as the input end of the control module, the output end of the second operational amplifier is connected to the input end of the bias adjustment circuit, and the output end of the bias adjustment circuit serves as the output end of the control module.

[0008] Preferably, the bias adjustment circuit includes a first MOS tube, a first resistor and a second resistor; the source of the first MOS tube is used to connect to the power supply, the gate of the first MOS tube serves as the input end of the bias adjustment circuit, and the drain of the first MOS tube serves as the output end of the bias adjustment circuit; the first end of the first resistor is connected to the drain of the first MOS tube, the second end of the first resistor is respectively connected to the first input end of the second operational amplifier, the first end of the second resistor and the output end of the third current mirror circuit, and the second end of the second resistor is grounded.

[0009] Preferably, the first current mirror circuit includes a second MOS transistor, a third MOS transistor and a third resistor; The source of the second MOS tube is connected to the source of the third MOS tube and serves as the input end of the first current mirror circuit, the drain of the second MOS tube is grounded after being connected in series with the current source, and the gate of the second MOS tube is respectively connected to the gate of the third MOS tube and the drain of the second MOS tube; the drain of the third MOS tube serves as the output end of the first current mirror circuit, and the drain of the third MOS tube is also grounded after being connected in series with the third resistor.

[0010] Preferably, the second current mirror circuit includes a fourth MOS transistor, a fifth MOS transistor and a fourth resistor; The gate of the fourth MOS tube serves as the input end of the second current mirror circuit, the source of the fourth MOS tube is connected to the source of the fifth MOS tube and is used to connect to the power supply; the drain of the fourth MOS tube is respectively connected to the second input end of the first operational amplifier and the first end of the fourth resistor, and the second end of the fourth resistor is grounded; the gate of the fourth MOS tube is connected to the gate of the fifth MOS tube, and the drain of the fifth MOS tube serves as the output end of the second current mirror circuit.

[0011] Preferably, the third current mirror circuit includes a sixth MOS tube and a seventh MOS tube; the drain of the sixth MOS tube is respectively connected to the gate of the sixth MOS tube and the gate of the seventh MOS tube and serves as the input end of the third current mirror circuit, the source of the sixth MOS tube is connected to the source of the seventh MOS tube and is grounded together, and the drain of the seventh MOS tube serves as the output end of the third current mirror circuit.

[0012] Preferably, the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube and the fifth MOS tube are all PMOS tubes; and the sixth MOS tube and the seventh MOS tube are all NMOS tubes.

[0013] Preferably, the reference voltage connected to the second input terminal of the second operational amplifier is defined as VA , the drain current of the seventh MOS tube is I f; the resistance of the first resistor, the resistance of the second resistor, the resistance of the third resistor and the resistance of the fourth resistor are respectively R 1. R 2. R 3 and R 4; The drain current of the second MOS tube is I 0; the number of the second MOS tube and the fourth MOS tube are both X The number of the third MOS tube and the number of the fifth MOS tube are Y , the number of the sixth MOS tube is M , the number of the seventh MOS tube is N ;in, X, Y, M and N All are greater than or equal to 1; The actual value of the DC bias voltage is V L , then the following conditions are met: ; but, ; ; When the resistance of the first resistor is a fixed value, by presetI f obtains the corresponding voltage increment, and the current is obtained according to the voltage increment I f, meets the following conditions: ; in, V ref is the reference voltage value, then we get ; The voltage increment .

[0014] Preferably, the power amplifier module further comprises a first back hole, a second back hole and a third back hole, and the first back hole, the second back hole and the third back hole are respectively connected in parallel with the first stage amplifier, the second stage amplifier and the third stage amplifier and then grounded.

[0015] Preferably, the input matching circuit is a first capacitor, the first end of the first capacitor serves as the input end of the input matching circuit and is used to connect the radio frequency signal, and the second end of the first capacitor serves as the output end of the input matching circuit and is connected to the input end of the first stage amplifier.

[0016] Compared with the related art, in the embodiment of the present invention, a DC power supply module is used to supply power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively; the input end of the control module is used to receive an external logic enable signal, and control the DC power supply module to provide a DC bias voltage to the first-stage amplifier, the second-stage amplifier and the third-stage amplifier respectively according to the external logic enable signal; the DC power supply module supplies DC power to the control module and the power amplifiers at each stage, and then the control module receives the logic enable signal to start working, and provides a DC bias voltage to the power amplifiers at each stage through the LDO voltage regulator circuit, so that the power amplifier starts to amplify the input received signal, and finally outputs the power after output matching; the control module controls the increase of the bias voltage in real time, and compensates for the gain and power lost by the power amplifier due to thermal effects, thereby obtaining a stable output power, which can improve the PVT index performance, and greatly optimize the EVM linear index, reaching an optimization of more than 10dB, which can significantly improve the communication quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings: Figure 1 A circuit structure block diagram of a power amplifier module provided in an embodiment of the present invention; Figure 2 A circuit diagram of a control module of a power amplifier module provided in an embodiment of the present invention; Figure 3 A waveform diagram of logic enable, bias voltage and output power of a power amplifier module provided in an embodiment of the present invention; Figure 4 Waveform diagram of thermal effect bias voltage and output power of the power amplifier module provided by the embodiment of the present invention; Figure 5 A control bias voltage and output power waveform diagram of a control module of a power amplifier module provided in an embodiment of the present invention; Figure 6 A curve diagram showing the relationship between output power and time before and after control by a control module of a power amplifier module provided in an embodiment of the present invention; Figure 7 This is a diagram showing the effect of boost bias of the control module of the power amplifier module provided in an embodiment of the present invention.

[0018] Among them, 100, power amplifier module, 1, input matching circuit, 2, first stage amplifier, 3, first inter-stage matching circuit, 4, second stage amplifier, 5, second inter-stage matching circuit, 6, third stage amplifier, 7, output matching circuit, 8, control module, 81, first current mirror circuit, 82, first operational amplifier, 83, second current mirror circuit, 84, third current mirror circuit, 85, second operational amplifier, 86, bias adjustment circuit, 9, DC power supply module, 10, first back hole, 11, second back hole, 12, third back hole. DETAILED DESCRIPTION

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present application or the above-mentioned drawings are used to distinguish different objects, not to describe a specific order.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] See also Figure 1-Figure 7 As shown, an embodiment of the present invention provides a power amplifier module 100, comprising an input matching circuit 1, a first-stage amplifier 2, a first-stage inter-stage matching circuit 3, a second-stage amplifier 4, a second-stage inter-stage matching circuit 5, a third-stage amplifier 6, and an output matching circuit 7, which are electrically connected in sequence. The input end of the input matching circuit 1 is used to access the radio frequency signal to achieve the impedance matching function, and the output end of the output matching circuit 7 is used to connect to the load. The power amplifier also includes a control module 8 and a DC power supply module 9, and the DC power supply module 9 is used to supply power to the control module 8, the first-stage amplifier 2, the second-stage amplifier 4, and the third-stage amplifier 6 respectively. The input end of the control module 8 is used to receive an external logic enable signal, and according to the external logic enable signal, the DC power supply module 9 is controlled to provide a DC bias voltage to the first-stage amplifier 2, the second-stage amplifier 4, and the third-stage amplifier 6 respectively.

[0023] Specifically, the DC power supply module 9 supplies DC power to the control module 8 and each level of power amplifiers. Then the control module 8 receives the logic enable signal and starts working, and provides a DC bias voltage to each level of power amplifiers through the LDO voltage regulator circuit, so that the power amplifier starts to amplify the input received signal, and finally outputs the power after output matching. The control module 8 controls the increase of the bias voltage in real time, and compensates for the gain and power lost by the power amplifier due to thermal effects, so as to obtain a stable output power. The PVT index performance can be improved, and the EVM linear index optimization is also huge, reaching an optimization of more than 10dB, which can significantly improve the communication quality.

[0024] Among them, Figure 3 As shown in the figure, the commonly used power amplifier logic enable voltage and output bias voltage are proportional to the output power per unit time. In a single logic enable time, after the normal bias voltage supplies power to the power amplifier, a stable output power that does not change over time will be output. However, due to the thermal effect of the power amplifier, the output power increases as the power amplifier works longer or the output power increases, thereby generating heat. It is often difficult to achieve stable gain and power output, and the output power of the power amplifier decreases as time increases, such as Figure 4 shown.

[0025] Therefore, it is necessary to change the control mode of the control module 8. Generally, the bias voltage is increased to improve the gain and power output of the power amplifier. Based on this principle, the control module 8 needs to provide the power amplifier with a bias voltage that increases with time, thereby improving the gain and output power of the power amplifier. Figure 5 As shown, due to the increase of the bias voltage, the gain and power lost by the power amplifier due to the thermal effect are compensated, thereby obtaining a stable output power.

[0026] In this embodiment, the control module 8 includes a first current mirror circuit 81 , a first operational amplifier 82 , a second current mirror circuit 83 , a third current mirror circuit 84 , a second operational amplifier 85 and a bias adjustment circuit 86 .

[0027] The input end of the first current mirror circuit 81 is used to connect to the power supply, the output end of the first current mirror is used to output current to the first input end of the first operational amplifier 82, the output end of the first operational amplifier 82 amplifies the current and outputs it to the input end of the second current mirror circuit 83, and the second input end of the first operational amplifier 82 is connected to the feedback end of the second current mirror circuit 83. The output end of the second current mirror circuit 83 is connected to the input end of the third current mirror circuit 84, and the output end of the third current mirror circuit 84 is respectively connected to the first input end of the second operational amplifier 85 and the output end of the bias adjustment circuit 86. The second input end of the second operational amplifier 85 serves as the input end of the control module 8, the output end of the second operational amplifier 85 is connected to the input end of the bias adjustment circuit 86, and the output end of the bias adjustment circuit 86 serves as the output end of the control module 8.

[0028] In this embodiment, the bias adjustment circuit 86 includes a first MOS transistor Q1, a first resistor R1, and a second resistor R2. The source of the first MOS transistor Q1 is used to connect to the power supply. The gate of the first MOS transistor Q1 serves as the input end of the bias adjustment circuit 86, and the drain of the first MOS transistor Q1 serves as the output end of the bias adjustment circuit 86. The first end of the first resistor R1 is connected to the drain of the first MOS transistor Q1, the second end of the first resistor R1 is respectively connected to the first input end of the second operational amplifier 85, the first end of the second resistor R2, and the output end of the third current mirror circuit 84, and the second end of the second resistor R2 is grounded.

[0029] In this embodiment, the first current mirror circuit 81 includes a second MOS transistor Q2, a third MOS transistor Q3 and a third resistor R3.

[0030] The source of the second MOS transistor Q2 is connected to the source of the third MOS transistor Q3 and serves as the input end of the first current mirror circuit 81. The drain of the second MOS transistor Q2 is connected to the ground after being connected in series with the current source. The gate of the second MOS transistor Q2 is connected to the gate of the third MOS transistor Q3 and the drain of the second MOS transistor Q2 respectively. The drain of the third MOS transistor Q3 serves as the output end of the first current mirror circuit 81. The drain of the third MOS transistor Q3 is connected to the ground after being connected in series with the third resistor R3.

[0031] In this embodiment, the second current mirror circuit 83 includes a fourth MOS transistor Q4, a fifth MOS transistor Q5 and a fourth resistor R4.

[0032] The gate of the fourth MOS tube Q4 serves as the input end of the second current mirror circuit 83, the source of the fourth MOS tube Q4 is connected to the source of the fifth MOS tube Q5 and is used to connect to the power supply. The drain of the fourth MOS tube Q4 is respectively connected to the second input end of the first operational amplifier 82 and the first end of the fourth resistor R4, and the second end of the fourth resistor R4 is grounded; the gate of the fourth MOS tube Q4 is connected to the gate of the fifth MOS tube Q5, and the drain of the fifth MOS tube Q5 serves as the output end of the second current mirror circuit 83.

[0033] In this embodiment, the third current mirror circuit 84 includes a sixth MOS transistor Q6 and a seventh MOS transistor Q7, the drain of the sixth MOS transistor Q6 is respectively connected to the gate of the sixth MOS transistor Q6 and the gate of the seventh MOS transistor Q7 and serves as the input end of the third current mirror circuit 84, the source of the sixth MOS transistor Q6 is connected to the source of the seventh MOS transistor Q7, and the drain of the seventh MOS transistor Q7 serves as the output end of the third current mirror circuit 84.

[0034] In this embodiment, the first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4 and the fifth MOS transistor Q5 are all PMOS transistors; the sixth MOS transistor Q6 and the seventh MOS transistor Q7 are all NMOS transistors.

[0035] In this embodiment, the reference voltage connected to the second input terminal of the second operational amplifier 85 is defined as VA , the drain current of the seventh MOS tube Q7 is I f; the resistance of the first resistor R1, the resistance of the second resistor R2, the resistance of the third resistor R3 and the resistance of the fourth resistor R4 are respectively R 1. R 2. R 3 and R4; the drain current of the second MOS tube Q2 is I0; the number of the second MOS tube Q2 and the fourth MOS tube Q4 is X The number of the third MOS tube Q3 and the fifth MOS tube Q5 are both Y , the number of the sixth MOS tube Q6 is M , the number of the seventh MOS tube Q7 is N ;in, X, Y, M and N Are greater than or equal to 1. Optional, X, Y, M and N Can be the same or different.

[0036] Specifically, by ignoring I f, the gain of the second operational amplifier 85 is designed to be sufficient, VA and the voltage across the second resistor R2 are equal, and the formula can be obtained VREG 2 voltage, this voltage is the LDO output voltage before Boost; to achieve the boost effect, it is extracted from the LDO loop I f current, obtained by the formula VREG Therefore, the actual value of the DC bias voltage is V L , then the following conditions are met: ; but, ; ; According to the already obtained V L When the resistance of the first resistor R1 is a fixed value, the I f gets the corresponding voltage increment, preset I f can be a reasonably designed fixed current, and the current is obtained according to the voltage increment I f, meets the following conditions: ; in, V ref is the reference voltage value, which can be obtained by combining the above; ; Through the above series of formulas, starting from the design requirements, given a reasonable resistance value and the proportional number of MOS tube current mirrors, as long as the reference voltage is finally determined V The value of ref can be used to obtain the voltage increment V L The reference voltage value uses the constant current of the first current mirror circuit 81, and then injects this current into the third resistor R3, and the voltage can be calculated according to Ohm's law. V ref; The voltage increment .

[0037] In summary, if Figure 7 As shown, the boost bias generated by the control module 8 has a good effect, compensating for the gain and power lost by the power amplifier due to thermal effects, thereby obtaining a stable output power.

[0038] In this embodiment, the power amplifier module 100 further includes a first back hole 10, a second back hole 11 and a third back hole 12, which are respectively connected in parallel to the first stage amplifier 2, the second stage amplifier 4 and the third stage amplifier 6 and then grounded.

[0039] In this embodiment, the input matching circuit 1 is a first capacitor C1. The first end of the first capacitor C1 serves as the input end of the input matching circuit 1 and is used to connect the radio frequency signal. The second end of the first capacitor C1 serves as the output end of the input matching circuit 1 and is connected to the input end of the first stage amplifier 2. The input matching circuit 1 can also be an inductor or a resistor. The output matching circuit 7 can be an inductor, a capacitor, a resistor, etc.

[0040] In this embodiment, Figure 6 This is a comparison chart of the data before and after the actual improvement, and the comparison of EVM indicators. It can be seen from the figure that the PVT curve has been improved, and the optimization of the EVM linear indicator is also huge, reaching an optimization of more than 10dB, which can significantly improve the communication quality.

[0041] It should be noted that the various embodiments described above with reference to the accompanying drawings are only used to illustrate the present invention rather than to limit the scope of the present invention. Those skilled in the art should understand that any modification or equivalent substitution of the present invention without departing from the spirit and scope of the present invention should be included within the scope of the present invention. In addition, unless otherwise indicated by the context, words appearing in the singular include the plural form, and vice versa. In addition, unless otherwise specified, all or part of any embodiment may be used in combination with all or part of any other embodiment.

Claims

1. A power amplifier module, comprising an input matching circuit, a first-stage amplifier, a first-stage matching circuit, a second-stage amplifier, a second-stage matching circuit, a third-stage amplifier, and an output matching circuit, which are electrically connected in sequence; characterized in that: The power amplifier further includes a control module and a DC power supply module; the DC power supply module is used to respectively supply power to the control module, the first-stage amplifier, the second-stage amplifier and the third-stage amplifier; the control module is used to receive an external logic enable signal, and control the DC power supply module to respectively provide a DC bias voltage to the first-stage amplifier, the second-stage amplifier and the third-stage amplifier according to the external logic enable signal; The control module includes a first current mirror circuit, a first operational amplifier, a second current mirror circuit, a third current mirror circuit, a second operational amplifier and a bias adjustment circuit; The input end of the first current mirror circuit is used to connect to a power supply, the output end of the first current mirror is used to output current to the first input end of the first operational amplifier, the output end of the first operational amplifier amplifies the current and outputs it to the input end of the second current mirror circuit, the second input end of the first operational amplifier is connected to the feedback end of the second current mirror circuit; the output end of the second current mirror circuit is connected to the input end of the third current mirror circuit, the output end of the third current mirror circuit is respectively connected to the first input end of the second operational amplifier and the output end of the bias adjustment circuit, the second input end of the second operational amplifier serves as the input end of the control module, the output end of the second operational amplifier is connected to the input end of the bias adjustment circuit, and the output end of the bias adjustment circuit serves as the output end of the control module.

2. The power amplifier module according to claim 1, characterized in that: The bias adjustment circuit includes a first MOS tube, a first resistor and a second resistor; the source of the first MOS tube is used to connect to the power supply, the gate of the first MOS tube serves as the input end of the bias adjustment circuit, and the drain of the first MOS tube serves as the output end of the bias adjustment circuit; the first end of the first resistor is connected to the drain of the first MOS tube, the second end of the first resistor is respectively connected to the first input end of the second operational amplifier, the first end of the second resistor and the output end of the third current mirror circuit, and the second end of the second resistor is grounded.

3. The power amplifier module according to claim 2, characterized in that: The first current mirror circuit includes a second MOS transistor, a third MOS transistor and a third resistor; The source of the second MOS tube is connected to the source of the third MOS tube and serves as the input end of the first current mirror circuit, the drain of the second MOS tube is grounded after being connected in series with the current source, and the gate of the second MOS tube is respectively connected to the gate of the third MOS tube and the drain of the second MOS tube; the drain of the third MOS tube serves as the output end of the first current mirror circuit, and the drain of the third MOS tube is also grounded after being connected in series with the third resistor.

4. The power amplifier module according to claim 3, characterized in that: The second current mirror circuit includes a fourth MOS transistor, a fifth MOS transistor and a fourth resistor; The gate of the fourth MOS tube serves as the input end of the second current mirror circuit, the source of the fourth MOS tube is connected to the source of the fifth MOS tube and is used to connect to the power supply; the drain of the fourth MOS tube is respectively connected to the second input end of the first operational amplifier and the first end of the fourth resistor, and the second end of the fourth resistor is grounded; the gate of the fourth MOS tube is connected to the gate of the fifth MOS tube, and the drain of the fifth MOS tube serves as the output end of the second current mirror circuit.

5. The power amplifier module according to claim 4, characterized in that: The third current mirror circuit includes a sixth MOS tube and a seventh MOS tube; the drain of the sixth MOS tube is respectively connected to the gate of the sixth MOS tube and the gate of the seventh MOS tube and serves as the input end of the third current mirror circuit, the source of the sixth MOS tube is connected to the source of the seventh MOS tube and is grounded together, and the drain of the seventh MOS tube serves as the output end of the third current mirror circuit.

6. The power amplifier module according to claim 5, characterized in that: The first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube and the fifth MOS tube are all PMOS tubes; the sixth MOS tube and the seventh MOS tube are all NMOS tubes.

7. The power amplifier module according to claim 5, characterized in that: The reference voltage connected to the second input terminal of the second operational amplifier is defined as VA , the drain current of the seventh MOS tube is I f; the resistance of the first resistor, the resistance of the second resistor, the resistance of the third resistor and the resistance of the fourth resistor are respectively R 1. R 2. R 3 and R 4; The drain current of the second MOS tube is I 0; the number of the second MOS tube and the number of the fourth MOS tube are both X The number of the third MOS tube and the number of the fifth MOS tube are Y , the number of the sixth MOS tube is M , the number of the seventh MOS tube is N ; in, X, Y, M and N All are greater than or equal to 1; The actual value of the DC bias voltage is VL, which satisfies the following conditions: ； but, ; ； When the resistance of the first resistor is a fixed value, by preset I f obtains the corresponding voltage increment, and the current is obtained according to the voltage increment I f, meets the following conditions: ； in, V ref is the reference voltage value, then we get ; The voltage increment .

8. The power amplifier module according to claim 1, characterized in that: The power amplifier module further includes a first back hole, a second back hole and a third back hole. The first back hole, the second back hole and the third back hole are respectively connected in parallel with the first stage amplifier, the second stage amplifier and the third stage amplifier and then grounded.

9. The power amplifier module according to claim 1, characterized in that: The input matching circuit is a first capacitor, the first end of the first capacitor serves as the input end of the input matching circuit and is used to connect the radio frequency signal, and the second end of the first capacitor serves as the output end of the input matching circuit and is connected to the input end of the first stage amplifier.

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